arch/arm/include/asm/hardware/ssp.h

11

unsigned int cr0;

arch/arm/mach-sa1100/ssp.c

160

ssp->cr0 = Ser4SSCR0;

arch/arm/mach-sa1100/ssp.c

176

Ser4SSCR0 = ssp->cr0 & ~SSCR0_SSE;

arch/arm/mach-sa1100/ssp.c

178

Ser4SSCR0 = ssp->cr0;

arch/parisc/include/asm/asmregs.h

117

rctr: .reg %cr0

arch/parisc/include/asm/asmregs.h

144

cr0: .reg %cr0

arch/parisc/include/asm/kgdb.h

52

unsigned long cr0;

arch/parisc/include/uapi/asm/ptrace.h

61

unsigned long cr0;

arch/parisc/kernel/ptrace.c

460

case RI(cr0): return mfctl(0);

arch/parisc/kernel/ptrace.c

513

case cr0, cr24, cr25, cr26, cr27, cr28, cr29, cr30, cr31;

arch/powerpc/boot/4xx.c

321

u32 cr0 = mfdcr(DCRN_CPC0_CR0);

arch/powerpc/boot/4xx.c

351

if (cr0 & CPC0_CR0_U0EC)

arch/powerpc/boot/4xx.c

356

uart0 = plb / CPC0_CR0_UDIV(cr0);

arch/powerpc/boot/4xx.c

358

if (cr0 & CPC0_CR0_U1EC)

arch/powerpc/boot/4xx.c

363

uart1 = plb / CPC0_CR0_UDIV(cr0);

arch/s390/include/asm/kvm_host.h

400

unsigned long cr0;

arch/s390/kernel/nmi.c

190

union ctlreg0 cr0, cr0_new;

arch/s390/kernel/nmi.c

200

local_ctl_store(0, &cr0.reg);

arch/s390/kernel/nmi.c

201

cr0_new = cr0;

arch/s390/kernel/nmi.c

215

local_ctl_load(0, &cr0.reg);

arch/s390/kernel/traps.c

313

struct ctlreg cr0;

arch/s390/kernel/traps.c

316

cr0 = local_ctl_clear_bit(0, CR0_LOW_ADDRESS_PROTECTION_BIT);

arch/s390/kernel/traps.c

321

local_ctl_load(0, &cr0);

arch/s390/kvm/guestdbg.c

132

vcpu->arch.guestdbg.cr0 = vcpu->arch.sie_block->gcr[0];

arch/s390/kvm/guestdbg.c

140

vcpu->arch.sie_block->gcr[0] = vcpu->arch.guestdbg.cr0;

arch/s390/kvm/vsie.c

1046

union ctlreg0 cr0;

arch/s390/kvm/vsie.c

1048

cr0.val = vcpu->arch.sie_block->gcr[0];

arch/s390/kvm/vsie.c

1049

edat = cr0.edat && test_kvm_facility(vcpu->kvm, 8);

arch/s390/kvm/vsie.c

1234

union ctlreg0 cr0;

arch/s390/kvm/vsie.c

1240

cr0.val = vcpu->arch.sie_block->gcr[0];

arch/s390/kvm/vsie.c

1241

edat = cr0.edat && test_kvm_facility(vcpu->kvm, 8);

arch/x86/boot/cpuflags.c

17

unsigned long cr0;

arch/x86/boot/cpuflags.c

19

asm volatile("mov %%cr0,%0" : "=r" (cr0));

arch/x86/boot/cpuflags.c

20

if (cr0 & (X86_CR0_EM|X86_CR0_TS)) {

arch/x86/boot/cpuflags.c

21

cr0 &= ~(X86_CR0_EM|X86_CR0_TS);

arch/x86/boot/cpuflags.c

22

asm volatile("mov %0,%%cr0" : : "r" (cr0));

arch/x86/coco/sev/core.c

832

vmsa->cr0 = AP_INIT_CR0_DEFAULT;

arch/x86/hyperv/hv_crash.c

168

asm volatile("movq %0, %%cr0" : : "r"(hv_crash_ctxt.cr0));

arch/x86/hyperv/hv_crash.c

204

ctxt->cr0 = native_read_cr0();

arch/x86/hyperv/hv_crash.c

59

ulong cr0;

arch/x86/hyperv/hv_vtl.c

166

input->vp_context.cr0 = native_read_cr0();

arch/x86/hyperv/ivm.c

335

vmsa->cr0 = native_read_cr0();

arch/x86/include/asm/kvm_host.h

1776

bool (*is_valid_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);

arch/x86/include/asm/kvm_host.h

1777

void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);

arch/x86/include/asm/kvm_host.h

2232

void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);

arch/x86/include/asm/kvm_host.h

2234

int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);

arch/x86/include/asm/kvm_host.h

805

unsigned long cr0;

arch/x86/include/asm/suspend_32.h

16

unsigned long cr0, cr2, cr3, cr4;

arch/x86/include/asm/suspend_64.h

42

unsigned long cr0, cr2, cr3, cr4;

arch/x86/include/asm/svm.h

340

u64 cr0;

arch/x86/include/asm/svm.h

397

u64 cr0;

arch/x86/include/uapi/asm/kvm.h

155

__u64 cr0, cr2, cr3, cr4, cr8;

arch/x86/include/uapi/asm/kvm.h

166

__u64 cr0, cr2, cr3, cr4, cr8;

arch/x86/kernel/asm-offsets_64.c

49

ENTRY(cr0);

arch/x86/kernel/cpu/cacheinfo.c

663

unsigned long cr0;

arch/x86/kernel/cpu/cacheinfo.c

673

cr0 = read_cr0() | X86_CR0_CD;

arch/x86/kernel/cpu/cacheinfo.c

674

write_cr0(cr0);

arch/x86/kernel/cpu/mtrr/cyrix.c

139

u32 cr0;

arch/x86/kernel/cpu/mtrr/cyrix.c

151

cr0 = read_cr0() | X86_CR0_CD;

arch/x86/kernel/cpu/mtrr/cyrix.c

153

write_cr0(cr0);

arch/x86/kernel/fpu/init.c

22

unsigned long cr0;

arch/x86/kernel/fpu/init.c

32

cr0 = read_cr0();

arch/x86/kernel/fpu/init.c

33

cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */

arch/x86/kernel/fpu/init.c

35

cr0 |= X86_CR0_EM;

arch/x86/kernel/fpu/init.c

36

write_cr0(cr0);

arch/x86/kernel/fpu/init.c

61

unsigned long cr0;

arch/x86/kernel/fpu/init.c

66

cr0 = read_cr0();

arch/x86/kernel/fpu/init.c

67

cr0 &= ~(X86_CR0_TS | X86_CR0_EM);

arch/x86/kernel/fpu/init.c

68

write_cr0(cr0);

arch/x86/kernel/process_32.c

62

unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;

arch/x86/kernel/process_32.c

80

cr0 = read_cr0();

arch/x86/kernel/process_32.c

85

log_lvl, cr0, cr2, cr3, cr4);

arch/x86/kernel/process_64.c

116

cr0 = read_cr0();

arch/x86/kernel/process_64.c

124

log_lvl, regs->cs, ds, es, cr0);

arch/x86/kernel/process_64.c

73

unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;

arch/x86/kernel/traps.c

1546

unsigned long cr0 = read_cr0();

arch/x86/kernel/traps.c

1552

if (!boot_cpu_has(X86_FEATURE_FPU) && (cr0 & X86_CR0_EM)) {

arch/x86/kernel/traps.c

1566

if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {

arch/x86/kernel/traps.c

1568

write_cr0(cr0 & ~X86_CR0_TS);

arch/x86/kvm/emulate.c

3411

ulong cr0;

arch/x86/kvm/emulate.c

3413

cr0 = ctxt->ops->get_cr(ctxt, 0);

arch/x86/kvm/emulate.c

3414

cr0 &= ~X86_CR0_TS;

arch/x86/kvm/emulate.c

3415

ctxt->ops->set_cr(ctxt, 0, cr0);

arch/x86/kvm/kvm_cache_regs.h

175

return vcpu->arch.cr0 & mask;

arch/x86/kvm/mmu.h

87

void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,

arch/x86/kvm/mmu/mmu.c

187

const unsigned long cr0;

arch/x86/kvm/mmu/mmu.c

206

BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG);

arch/x86/kvm/mmu/mmu.c

207

BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);

arch/x86/kvm/mmu/mmu.c

228

BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);

arch/x86/kvm/mmu/mmu.c

250

.cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS),

arch/x86/kvm/mmu/mmu.c

5873

void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,

arch/x86/kvm/mmu/mmu.c

5878

.cr0 = cr0,

arch/x86/kvm/smm.c

190

smram->cr0 = kvm_read_cr0(vcpu);

arch/x86/kvm/smm.c

243

smram->cr0 = kvm_read_cr0(vcpu);

arch/x86/kvm/smm.c

283

unsigned long cr0;

arch/x86/kvm/smm.c

323

cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);

arch/x86/kvm/smm.c

324

kvm_x86_call(set_cr0)(vcpu, cr0);

arch/x86/kvm/smm.c

420

u64 cr0, u64 cr3, u64 cr4)

arch/x86/kvm/smm.c

445

bad = kvm_set_cr0(vcpu, cr0);

arch/x86/kvm/smm.c

503

r = rsm_enter_protected_mode(vcpu, smstate->cr0,

arch/x86/kvm/smm.c

551

r = rsm_enter_protected_mode(vcpu, smstate->cr0, smstate->cr3, smstate->cr4);

arch/x86/kvm/smm.c

576

unsigned long cr0;

arch/x86/kvm/smm.c

58

CHECK_SMRAM32_OFFSET(cr0, 0xFFFC);

arch/x86/kvm/smm.c

616

cr0 = kvm_read_cr0(vcpu);

arch/x86/kvm/smm.c

617

if (cr0 & X86_CR0_PE)

arch/x86/kvm/smm.c

618

kvm_set_cr0(vcpu, cr0 & ~(X86_CR0_PG | X86_CR0_PE));

arch/x86/kvm/smm.c

98

CHECK_SMRAM64_OFFSET(cr0, 0xFF58);

arch/x86/kvm/smm.h

129

u64 cr0;

arch/x86/kvm/smm.h

65

u32 cr0;

arch/x86/kvm/svm/nested.c

1052

vmcb01->save.cr0 = kvm_read_cr0(vcpu);

arch/x86/kvm/svm/nested.c

1097

to_save->cr0 = from_save->cr0;

arch/x86/kvm/svm/nested.c

1165

vmcb12->save.cr0 = kvm_read_cr0(vcpu);

arch/x86/kvm/svm/nested.c

1290

svm_set_cr0(vcpu, vmcb01->save.cr0 | X86_CR0_PE);

arch/x86/kvm/svm/nested.c

1821

unsigned long cr0;

arch/x86/kvm/svm/nested.c

1879

cr0 = kvm_read_cr0(vcpu);

arch/x86/kvm/svm/nested.c

1880

if (((cr0 & X86_CR0_CD) == 0) && (cr0 & X86_CR0_NW))

arch/x86/kvm/svm/nested.c

1888

if (!(save->cr0 & X86_CR0_PG) ||

arch/x86/kvm/svm/nested.c

1889

!(save->cr0 & X86_CR0_PE) ||

arch/x86/kvm/svm/nested.c

376

if (CC((save->cr0 & X86_CR0_CD) == 0 && (save->cr0 & X86_CR0_NW)) ||

arch/x86/kvm/svm/nested.c

377

CC(save->cr0 & ~0xffffffffULL))

arch/x86/kvm/svm/nested.c

388

if ((save->efer & EFER_LME) && (save->cr0 & X86_CR0_PG)) {

arch/x86/kvm/svm/nested.c

390

CC(!(save->cr0 & X86_CR0_PE)) ||

arch/x86/kvm/svm/nested.c

510

to->cr0 = from->cr0;

arch/x86/kvm/svm/nested.c

695

svm_set_cr0(vcpu, svm->nested.save.cr0);

arch/x86/kvm/svm/svm.c

1714

static bool svm_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/svm/svm.c

1719

void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/svm/svm.c

1722

u64 hcr0 = cr0;

arch/x86/kvm/svm/svm.c

1727

if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {

arch/x86/kvm/svm/svm.c

1733

if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) {

arch/x86/kvm/svm/svm.c

1740

vcpu->arch.cr0 = cr0;

arch/x86/kvm/svm/svm.c

1756

svm->vmcb->save.cr0 = hcr0;

arch/x86/kvm/svm/svm.c

1766

if (hcr0 == cr0) {

arch/x86/kvm/svm/svm.c

2506

unsigned long cr0 = vcpu->arch.cr0;

arch/x86/kvm/svm/svm.c

2513

cr0 &= ~SVM_CR0_SELECTIVE_MASK;

arch/x86/kvm/svm/svm.c

2516

if (cr0 ^ val) {

arch/x86/kvm/svm/svm.c

3424

"cr0:", save->cr0, "cr2:", save->cr2);

arch/x86/kvm/svm/svm.c

3607

vcpu->arch.cr0 = svm->vmcb->save.cr0;

arch/x86/kvm/svm/svm.c

4625

unsigned long cr0, val;

arch/x86/kvm/svm/svm.c

4662

cr0 = vcpu->arch.cr0 & ~SVM_CR0_SELECTIVE_MASK;

arch/x86/kvm/svm/svm.c

4664

if (cr0 ^ val)

arch/x86/kvm/svm/svm.h

146

u64 cr0;

arch/x86/kvm/svm/svm.h

722

void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);

arch/x86/kvm/vmx/main.c

384

static bool vt_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/vmx/main.c

389

return vmx_is_valid_cr0(vcpu, cr0);

arch/x86/kvm/vmx/main.c

392

static void vt_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/vmx/main.c

397

vmx_set_cr0(vcpu, cr0);

arch/x86/kvm/vmx/vmx.c

2653

vcpu->arch.cr0 &= ~guest_owned_bits;

arch/x86/kvm/vmx/vmx.c

2654

vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & guest_owned_bits;

arch/x86/kvm/vmx/vmx.c

3491

bool vmx_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/vmx/vmx.c

3494

return nested_guest_cr0_valid(vcpu, cr0);

arch/x86/kvm/vmx/vmx.c

3497

return nested_host_cr0_valid(vcpu, cr0);

arch/x86/kvm/vmx/vmx.c

3502

void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/vmx/vmx.c

3510

hw_cr0 = (cr0 & ~KVM_VM_CR0_ALWAYS_OFF);

arch/x86/kvm/vmx/vmx.c

3518

if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE))

arch/x86/kvm/vmx/vmx.c

3521

if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE))

arch/x86/kvm/vmx/vmx.c

3525

vmcs_writel(CR0_READ_SHADOW, cr0);

arch/x86/kvm/vmx/vmx.c

3527

vcpu->arch.cr0 = cr0;

arch/x86/kvm/vmx/vmx.c

3532

if (!old_cr0_pg && (cr0 & X86_CR0_PG))

arch/x86/kvm/vmx/vmx.c

3534

else if (old_cr0_pg && !(cr0 & X86_CR0_PG))

arch/x86/kvm/vmx/vmx.c

3564

if (!(cr0 & X86_CR0_PG)) {

arch/x86/kvm/vmx/vmx.c

3576

if ((old_cr0_pg ^ cr0) & X86_CR0_PG)

arch/x86/kvm/vmx/vmx.c

3583

if (!(old_cr0_pg & X86_CR0_PG) && (cr0 & X86_CR0_PG))

arch/x86/kvm/vmx/vmx.c

4517

unsigned long cr0, cr3, cr4;

arch/x86/kvm/vmx/vmx.c

4519

cr0 = read_cr0();

arch/x86/kvm/vmx/vmx.c

4520

WARN_ON(cr0 & X86_CR0_TS);

arch/x86/kvm/vmx/vmx.c

4521

vmcs_writel(HOST_CR0, cr0); /* 22.2.3 */

arch/x86/kvm/vmx/vmx.h

356

void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);

arch/x86/kvm/vmx/x86_ops.h

66

bool vmx_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);

arch/x86/kvm/vmx/x86_ops.h

67

void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);

arch/x86/kvm/x86.c

1106

static bool kvm_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/x86.c

1109

if (cr0 & 0xffffffff00000000UL)

arch/x86/kvm/x86.c

1113

if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))

arch/x86/kvm/x86.c

1116

if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))

arch/x86/kvm/x86.c

1119

return kvm_x86_call(is_valid_cr0)(vcpu, cr0);

arch/x86/kvm/x86.c

1122

void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)

arch/x86/kvm/x86.c

1132

if ((cr0 ^ old_cr0) == X86_CR0_WP) {

arch/x86/kvm/x86.c

1133

if (!(cr0 & X86_CR0_PG))

arch/x86/kvm/x86.c

1142

if ((cr0 ^ old_cr0) & X86_CR0_PG) {

arch/x86/kvm/x86.c

1147

if (!(cr0 & X86_CR0_PG))

arch/x86/kvm/x86.c

1159

if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)

arch/x86/kvm/x86.c

1164

int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)

arch/x86/kvm/x86.c

1168

if (!kvm_is_valid_cr0(vcpu, cr0))

arch/x86/kvm/x86.c

1171

cr0 |= X86_CR0_ET;

arch/x86/kvm/x86.c

1174

cr0 &= ~CR0_RESERVED_BITS;

arch/x86/kvm/x86.c

1178

(cr0 & X86_CR0_PG)) {

arch/x86/kvm/x86.c

1188

if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&

arch/x86/kvm/x86.c

1189

is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&

arch/x86/kvm/x86.c

1193

if (!(cr0 & X86_CR0_PG) &&

arch/x86/kvm/x86.c

1197

if (!(cr0 & X86_CR0_WP) && kvm_is_cr4_bit_set(vcpu, X86_CR4_CET))

arch/x86/kvm/x86.c

1200

kvm_x86_call(set_cr0)(vcpu, cr0);

arch/x86/kvm/x86.c

1202

kvm_post_set_cr0(vcpu, old_cr0, cr0);

arch/x86/kvm/x86.c

12160

sregs->cr0 = kvm_read_cr0(vcpu);

arch/x86/kvm/x86.c

12331

if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {

arch/x86/kvm/x86.c

12351

kvm_is_valid_cr0(vcpu, sregs->cr0);

arch/x86/kvm/x86.c

12387

*mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;

arch/x86/kvm/x86.c

12388

kvm_x86_call(set_cr0)(vcpu, sregs->cr0);

arch/x86/kvm/x86.c

12453

bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&

arch/x86/power/cpu.c

125

ctxt->cr0 = read_cr0();

arch/x86/power/cpu.c

217

write_cr0(ctxt->cr0);

arch/x86/xen/enlighten_pv.c

1056

unsigned long cr0 = this_cpu_read(xen_cr0_value);

arch/x86/xen/enlighten_pv.c

1058

if (unlikely(cr0 == 0)) {

arch/x86/xen/enlighten_pv.c

1059

cr0 = native_read_cr0();

arch/x86/xen/enlighten_pv.c

1060

this_cpu_write(xen_cr0_value, cr0);

arch/x86/xen/enlighten_pv.c

1063

return cr0;

arch/x86/xen/enlighten_pv.c

1066

static void xen_write_cr0(unsigned long cr0)

arch/x86/xen/enlighten_pv.c

1070

this_cpu_write(xen_cr0_value, cr0);

arch/x86/xen/enlighten_pv.c

1076

MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);

drivers/clk/renesas/rcar-gen4-cpg.c

105

u32 cr0 = readl(pll_clk->pllcr0_reg);

drivers/clk/renesas/rcar-gen4-cpg.c

114

if (cr0 & CPG_PLLxCR0_SSMODE_FM) {

drivers/clk/renesas/rcar-gen4-cpg.c

139

u32 cr0 = readl(pll_clk->pllcr0_reg);

drivers/clk/renesas/rcar-gen4-cpg.c

143

if (cr0 & CPG_PLLxCR0_SSMODE_FM) {

drivers/clk/renesas/rcar-gen4-cpg.c

163

if (cr0 & CPG_PLLxCR0_SSMODE_FM)

drivers/clk/renesas/rcar-gen4-cpg.c

200

u32 cr0 = readl(pll_clk->pllcr0_reg);

drivers/clk/renesas/rcar-gen4-cpg.c

204

ni = FIELD_GET(CPG_PLLxCR0_NI9, cr0) + 1;

drivers/clk/renesas/rcar-gen4-cpg.c

206

if (cr0 & CPG_PLLxCR0_SSMODE_FM) {

drivers/clk/renesas/rcar-gen4-cpg.c

226

static const struct { u16 cr0, cr1; } pll_cr_offsets[] __initconst = {

drivers/clk/renesas/rcar-gen4-cpg.c

247

pll_clk->pllcr0_reg = base + pll_cr_offsets[index - 1].cr0;

drivers/clk/renesas/rcar-gen4-cpg.c

86

u32 cr0 = readl(pll_clk->pllcr0_reg);

drivers/clk/renesas/rcar-gen4-cpg.c

90

ni = (FIELD_GET(CPG_PLLxCR0_NI8, cr0) + 1) * 2;

drivers/clk/renesas/rcar-gen4-cpg.c

92

if (cr0 & CPG_PLLxCR0_SSMODE_FM) {

drivers/cpufreq/powernow-k6.c

105

unsigned long cr0;

drivers/cpufreq/powernow-k6.c

114

cr0 = read_cr0();

drivers/cpufreq/powernow-k6.c

115

write_cr0(cr0 | X86_CR0_CD);

drivers/cpufreq/powernow-k6.c

129

write_cr0(cr0);

drivers/crypto/ccp/ccp-dev-v3.c

111

iowrite32(cr0, ccp->io_regs + CMD_REQ0);

drivers/crypto/ccp/ccp-dev-v3.c

115

if (cr0 & REQ0_INT_ON_COMPLETE) {

drivers/crypto/ccp/ccp-dev-v3.c

79

u32 cr0, cmd;

drivers/crypto/ccp/ccp-dev-v3.c

89

cr0 = (cmd_q->id << REQ0_CMD_Q_SHIFT)

drivers/crypto/ccp/ccp-dev-v3.c

94

cr0 |= REQ0_STOP_ON_COMPLETE

drivers/crypto/ccp/ccp-dev-v3.c

98

cr0 |= REQ0_INT_ON_COMPLETE;

drivers/gpu/drm/mcde/mcde_display.c

637

u32 cr0, cr1;

drivers/gpu/drm/mcde/mcde_display.c

642

cr0 = MCDE_CRA0;

drivers/gpu/drm/mcde/mcde_display.c

647

cr0 = MCDE_CRB0;

drivers/gpu/drm/mcde/mcde_display.c

701

writel(val, mcde->regs + cr0);

drivers/input/touchscreen/mc13783_ts.c

102

x1, y1, 0x1000 - cr0);

drivers/input/touchscreen/mc13783_ts.c

109

cr0 ? 0x1000 - cr0 : cr0);

drivers/input/touchscreen/mc13783_ts.c

110

input_report_key(idev, BTN_TOUCH, cr0);

drivers/input/touchscreen/mc13783_ts.c

69

int cr0, cr1;

drivers/input/touchscreen/mc13783_ts.c

81

cr0 = (priv->sample[2] >> 12) & 0xfff;

drivers/input/touchscreen/mc13783_ts.c

86

x0, x1, x2, y0, y1, y2, cr0, cr1);

drivers/input/touchscreen/mc13783_ts.c

91

cr0 = (cr0 + cr1) / 2;

drivers/input/touchscreen/mc13783_ts.c

93

if (!cr0 || !sample_tolerance ||

drivers/input/touchscreen/mc13783_ts.c

97

if (cr0) {

drivers/irqchip/irq-gic-v5-irs.c

510

u32 selr, cr0;

drivers/irqchip/irq-gic-v5-irs.c

535

cr0 = FIELD_PREP(GICV5_IRS_PE_CR0_DPS, 0x1);

drivers/irqchip/irq-gic-v5-irs.c

536

irs_writel_relaxed(irs_data, cr0, GICV5_IRS_PE_CR0);

drivers/irqchip/irq-gic-v5-irs.c

551

u32 cr0, cr1;

drivers/irqchip/irq-gic-v5-irs.c

590

cr0 = FIELD_PREP(GICV5_IRS_CR0_IRSEN, 0x1);

drivers/irqchip/irq-gic-v5-irs.c

591

irs_writel_relaxed(irs_data, cr0, GICV5_IRS_CR0);

drivers/irqchip/irq-gic-v5-its.c

1059

u32 cr0 = FIELD_PREP(GICV5_ITS_CR0_ITSEN, enable);

drivers/irqchip/irq-gic-v5-its.c

1061

its_writel_relaxed(its, cr0, GICV5_ITS_CR0);

drivers/irqchip/irq-gic-v5-its.c

1124

u32 cr0, cr1;

drivers/irqchip/irq-gic-v5-its.c

1139

cr0 = its_readl_relaxed(its_node, GICV5_ITS_CR0);

drivers/irqchip/irq-gic-v5-its.c

1140

enabled = FIELD_GET(GICV5_ITS_CR0_ITSEN, cr0);

drivers/irqchip/irq-gic-v5-iwb.c

218

u32 nr_wires, idr0, cr0;

drivers/irqchip/irq-gic-v5-iwb.c

231

cr0 = iwb_readl_relaxed(iwb_node, GICV5_IWB_CR0);

drivers/irqchip/irq-gic-v5-iwb.c

232

if (!FIELD_GET(GICV5_IWB_CR0_IWBEN, cr0)) {

drivers/irqchip/irq-gic-v5.c

955

u64 cr0;

drivers/irqchip/irq-gic-v5.c

957

cr0 = FIELD_PREP(ICC_CR0_EL1_EN, 0);

drivers/irqchip/irq-gic-v5.c

958

write_sysreg_s(cr0, SYS_ICC_CR0_EL1);

drivers/irqchip/irq-gic-v5.c

963

u64 cr0, pcr;

drivers/irqchip/irq-gic-v5.c

973

cr0 = FIELD_PREP(ICC_CR0_EL1_EN, 1);

drivers/irqchip/irq-gic-v5.c

974

write_sysreg_s(cr0, SYS_ICC_CR0_EL1);

drivers/phy/freescale/phy-fsl-lynx-28g.c

1037

pll->cr0 = lynx_28g_pll_read(pll, PLLnCR0);

drivers/phy/freescale/phy-fsl-lynx-28g.c

422

u32 rstctl, cr0, cr1;

drivers/s390/char/sclp.c

716

struct ctlreg cr0, cr0_sync;

drivers/s390/char/sclp.c

742

local_ctl_store(0, &cr0);

drivers/s390/char/sclp.c

743

cr0_sync.val = cr0.val & ~CR0_IRQ_SUBCLASS_MASK;

drivers/s390/char/sclp.c

755

local_ctl_load(0, &cr0);

drivers/s390/char/sclp_early_core.c

34

union ctlreg0 cr0, cr0_new;

drivers/s390/char/sclp_early_core.c

36

local_ctl_store(0, &cr0.reg);

drivers/s390/char/sclp_early_core.c

37

cr0_new.val = cr0.val & ~CR0_IRQ_SUBCLASS_MASK;

drivers/s390/char/sclp_early_core.c

63

local_ctl_load(0, &cr0.reg);

drivers/spi/spi-dw-core.c

270

u32 cr0 = 0;

drivers/spi/spi-dw-core.c

274

cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_FRF_MASK, DW_SPI_CTRLR0_FRF_MOTO_SPI);

drivers/spi/spi-dw-core.c

282

cr0 |= DW_PSSI_CTRLR0_SCPOL;

drivers/spi/spi-dw-core.c

284

cr0 |= DW_PSSI_CTRLR0_SCPHA;

drivers/spi/spi-dw-core.c

288

cr0 |= DW_PSSI_CTRLR0_SRL;

drivers/spi/spi-dw-core.c

291

cr0 |= FIELD_PREP(DW_HSSI_CTRLR0_FRF_MASK, DW_SPI_CTRLR0_FRF_MOTO_SPI);

drivers/spi/spi-dw-core.c

299

cr0 |= DW_HSSI_CTRLR0_SCPOL;

drivers/spi/spi-dw-core.c

301

cr0 |= DW_HSSI_CTRLR0_SCPHA;

drivers/spi/spi-dw-core.c

305

cr0 |= DW_HSSI_CTRLR0_SRL;

drivers/spi/spi-dw-core.c

309

cr0 |= DW_HSSI_CTRLR0_MST;

drivers/spi/spi-dw-core.c

31

u32 cr0;

drivers/spi/spi-dw-core.c

312

return cr0;

drivers/spi/spi-dw-core.c

319

u32 cr0 = chip->cr0;

drivers/spi/spi-dw-core.c

324

cr0 |= (cfg->dfs - 1) << dws->dfs_offset;

drivers/spi/spi-dw-core.c

328

cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_TMOD_MASK, cfg->tmode);

drivers/spi/spi-dw-core.c

331

cr0 |= FIELD_PREP(DW_HSSI_CTRLR0_TMOD_MASK, cfg->tmode);

drivers/spi/spi-dw-core.c

333

dw_writel(dws, DW_SPI_CTRLR0, cr0);

drivers/spi/spi-dw-core.c

820

chip->cr0 = dw_spi_prepare_cr0(dws, spi);

drivers/spi/spi-dw-core.c

895

u32 cr0, tmp = dw_readl(dws, DW_SPI_CTRLR0);

drivers/spi/spi-dw-core.c

899

cr0 = dw_readl(dws, DW_SPI_CTRLR0);

drivers/spi/spi-dw-core.c

903

if (!(cr0 & DW_PSSI_CTRLR0_DFS_MASK)) {

drivers/spi/spi-ep93xx.c

150

u16 cr0;

drivers/spi/spi-ep93xx.c

158

cr0 = div_scr << SSPCR0_SCR_SHIFT;

drivers/spi/spi-ep93xx.c

160

cr0 |= SSPCR0_SPO;

drivers/spi/spi-ep93xx.c

162

cr0 |= SSPCR0_SPH;

drivers/spi/spi-ep93xx.c

163

cr0 |= dss;

drivers/spi/spi-ep93xx.c

167

dev_dbg(&host->dev, "setup: cr0 %#x\n", cr0);

drivers/spi/spi-ep93xx.c

170

writel(cr0, espi->mmio + SSPCR0);

drivers/spi/spi-pl022.c

1712

chip->cr0 = 0;

drivers/spi/spi-pl022.c

1745

SSP_WRITE_BITS(chip->cr0, chip_info->duplex,

drivers/spi/spi-pl022.c

1747

SSP_WRITE_BITS(chip->cr0, chip_info->ctrl_len,

drivers/spi/spi-pl022.c

1749

SSP_WRITE_BITS(chip->cr0, chip_info->iface,

drivers/spi/spi-pl022.c

1754

SSP_WRITE_BITS(chip->cr0, bits - 1,

drivers/spi/spi-pl022.c

1771

SSP_WRITE_BITS(chip->cr0, bits - 1,

drivers/spi/spi-pl022.c

1773

SSP_WRITE_BITS(chip->cr0, chip_info->iface,

drivers/spi/spi-pl022.c

1782

SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPO, 6);

drivers/spi/spi-pl022.c

1788

SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 7);

drivers/spi/spi-pl022.c

1790

SSP_WRITE_BITS(chip->cr0, clk_freq.scr, SSP_CR0_MASK_SCR, 8);

drivers/spi/spi-pl022.c

409

u32 cr0;

drivers/spi/spi-pl022.c

476

writel(chip->cr0, SSP_CR0(pl022->virtbase));

drivers/spi/spi-pl022.c

478

writew(chip->cr0, SSP_CR0(pl022->virtbase));

drivers/spi/spi-pxa2xx.c

1013

cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits);

drivers/spi/spi-pxa2xx.c

1017

/ (1 + ((cr0 & SSCR0_SCR(0xfff)) >> 8)),

drivers/spi/spi-pxa2xx.c

1022

/ (1 + ((cr0 & SSCR0_SCR(0x0ff)) >> 8)),

drivers/spi/spi-pxa2xx.c

1054

pxa2xx_spi_update(drv_data, SSCR0, GENMASK(31, 0), cr0);

drivers/spi/spi-pxa2xx.c

945

u32 cr0;

drivers/spi/spi-rockchip.c

535

u32 cr0 = CR0_FRF_SPI << CR0_FRF_OFFSET

drivers/spi/spi-rockchip.c

543

cr0 |= CR0_OPM_TARGET << CR0_OPM_OFFSET;

drivers/spi/spi-rockchip.c

546

cr0 |= rs->rsd << CR0_RSD_OFFSET;

drivers/spi/spi-rockchip.c

547

cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;

drivers/spi/spi-rockchip.c

549

cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;

drivers/spi/spi-rockchip.c

551

cr0 |= BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET;

drivers/spi/spi-rockchip.c

554

cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;

drivers/spi/spi-rockchip.c

556

cr0 |= CR0_XFM_RO << CR0_XFM_OFFSET;

drivers/spi/spi-rockchip.c

558

cr0 |= CR0_XFM_TO << CR0_XFM_OFFSET;

drivers/spi/spi-rockchip.c

562

cr0 |= CR0_DFS_4BIT << CR0_DFS_OFFSET;

drivers/spi/spi-rockchip.c

566

cr0 |= CR0_DFS_8BIT << CR0_DFS_OFFSET;

drivers/spi/spi-rockchip.c

570

cr0 |= CR0_DFS_16BIT << CR0_DFS_OFFSET;

drivers/spi/spi-rockchip.c

590

writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);

drivers/spi/spi-rockchip.c

732

u32 cr0;

drivers/spi/spi-rockchip.c

741

cr0 = readl_relaxed(rs->regs + ROCKCHIP_SPI_CTRLR0);

drivers/spi/spi-rockchip.c

743

cr0 &= ~(0x3 << CR0_SCPH_OFFSET);

drivers/spi/spi-rockchip.c

744

cr0 |= ((spi->mode & 0x3) << CR0_SCPH_OFFSET);

drivers/spi/spi-rockchip.c

746

cr0 |= BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET;

drivers/spi/spi-rockchip.c

748

cr0 &= ~(BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET);

drivers/spi/spi-rockchip.c

750

writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);

drivers/video/fbdev/sstfb.c

1019

cr0 & ~DACREG_CR0_PWDOWN & ~DACREG_CR0_EN_INDEXED);

drivers/video/fbdev/sstfb.c

1064

u8 cr0;

drivers/video/fbdev/sstfb.c

1072

cr0 = sst_dac_read(DACREG_RMR);

drivers/video/fbdev/sstfb.c

1082

sst_dac_write(DACREG_RMR, (cr0 & 0x0f) | DACREG_CR0_16BPP);

drivers/video/fbdev/sstfb.c

973

u8 cr0, cc;

drivers/video/fbdev/sstfb.c

981

cr0 = sst_dac_read(DACREG_RMR); /* 5 CR0 */

drivers/video/fbdev/sstfb.c

988

sst_dac_write(DACREG_RMR, (cr0 & 0xf0)

fs/smb/client/smb1pdu.h

2327

char cr0; /* \n */

include/hyperv/hvgdk_mini.h

874

u64 cr0;

include/hyperv/hvhdk.h

109

u64 cr0;

include/uapi/linux/acrn.h

288

__le64 cr0;

include/xen/interface/hvm/hvm_vcpu.h

23

uint32_t cr0;

include/xen/interface/hvm/hvm_vcpu.h

86

uint64_t cr0;

samples/acrn/vm-sample.c

86

regs.vcpu_regs.cr0 = 0x30U;

sound/soc/pxa/pxa-ssp.c

126

priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);

sound/soc/pxa/pxa-ssp.c

145

__raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);

sound/soc/pxa/pxa-ssp.c

46

uint32_t cr0;

tools/arch/x86/include/uapi/asm/kvm.h

155

__u64 cr0, cr2, cr3, cr4, cr8;

tools/arch/x86/include/uapi/asm/kvm.h

166

__u64 cr0, cr2, cr3, cr4, cr8;

tools/testing/selftests/kvm/include/x86/processor.h

553

uint64_t cr0;

tools/testing/selftests/kvm/include/x86/processor.h

556

: /* output */ [cr0]"=r"(cr0));

tools/testing/selftests/kvm/include/x86/processor.h

557

return cr0;

tools/testing/selftests/kvm/include/x86/svm.h

206

u64 cr0;

tools/testing/selftests/kvm/lib/x86/processor.c

141

sregs->cr0, sregs->cr2, sregs->cr3, sregs->cr4);

tools/testing/selftests/kvm/lib/x86/processor.c

659

sregs.cr0 = X86_CR0_PE | X86_CR0_NE | X86_CR0_PG;

tools/testing/selftests/kvm/lib/x86/svm.c

114

asm volatile ("mov %%cr0, %0" : "=r"(save->cr0) : : "memory");

tools/testing/selftests/kvm/lib/x86/vmx.c

130

unsigned long cr0;

tools/testing/selftests/kvm/lib/x86/vmx.c

138

__asm__ __volatile__("mov %%cr0, %0" : "=r"(cr0) : : "memory");

tools/testing/selftests/kvm/lib/x86/vmx.c

139

cr0 &= rdmsr(MSR_IA32_VMX_CR0_FIXED1);

tools/testing/selftests/kvm/lib/x86/vmx.c

140

cr0 |= rdmsr(MSR_IA32_VMX_CR0_FIXED0);

tools/testing/selftests/kvm/lib/x86/vmx.c

141

__asm__ __volatile__("mov %0, %%cr0" : : "r"(cr0) : "memory");

tools/testing/selftests/kvm/mmu_stress_test.c

134

sregs.cr0 ^= X86_CR0_WP;

tools/testing/selftests/kvm/x86/set_sregs_test.c

114

TEST_INVALID_CR_BIT(vcpu, cr0, sregs, BIT(i));

tools/testing/selftests/kvm/x86/set_sregs_test.c

117

TEST_INVALID_CR_BIT(vcpu, cr0, sregs, X86_CR0_NW);

tools/testing/selftests/kvm/x86/set_sregs_test.c

118

TEST_INVALID_CR_BIT(vcpu, cr0, sregs, X86_CR0_PG);

tools/testing/selftests/kvm/x86/set_sregs_test.c

83

sregs.cr0 &= ~(X86_CR0_CD | X86_CR0_NW);

tools/testing/selftests/kvm/x86/sev_smoke_test.c

35

guest_sev_test_reg(cr0);

tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_guest_state.c

60

if (!sregs.cr0)