clockevents_config_and_register
clockevents_config_and_register(ce, CONFIG_HZ, 0, 0);
clockevents_config_and_register(ce, NSEC_PER_SEC, 1000, LONG_MAX);
clockevents_config_and_register(clk, twd_timer_rate,
clockevents_config_and_register(ce, rate, 0x4, 0xffffff);
clockevents_config_and_register(&ckevt, rate, MIN_DELTA, MAX_DELTA);
clockevents_config_and_register(&clockevent_mpu_timer1, rate,
clockevents_config_and_register(&clockevent_32k_timer,
clockevents_config_and_register(&clkevt, tick_rate, 3, 0xfff0);
clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe);
clockevents_config_and_register(cd, const_clock_freq, min_delta, max_delta);
clockevents_config_and_register(cd, mips_hpt_frequency, min_delta, 0x7fffffff);
clockevents_config_and_register(&nios2_ce.ced, freq, 1, ULONG_MAX);
clockevents_config_and_register(evt, cpuinfo->clock_frequency,
clockevents_config_and_register(cd, cr16_clock_freq, min_delta, max_delta);
clockevents_config_and_register(dec, ppc_tb_freq, 2, decrementer_max);
clockevents_config_and_register(levt, tsc_khz * (1000 / TSC_DIVISOR), 0xF, ~0UL);
clockevents_config_and_register(&hc->evt, hpet_freq,
clockevents_config_and_register(evt, hpet_freq, HPET_MIN_PROG_DELTA,
clockevents_config_and_register(clockevent, ccount_freq,
clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMERN_MAX);
clockevents_config_and_register(clk, arch_timer_rate, 0xf, max_delta);
clockevents_config_and_register(&at->evt, at->rate, 0xf,
clockevents_config_and_register(clk, gt_target_rate,
clockevents_config_and_register(&event_dev, rate, 0x2c00, 0xfffffffe);
clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
clockevents_config_and_register(&kona_clockevent_timer,
clockevents_config_and_register(clkevt, HZ, 0, 0);
clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
clockevents_config_and_register(&mct_comp_device, clk_rate,
clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
clockevents_config_and_register(ce,
clockevents_config_and_register(&i8253_clockevent, PIT_TICK_RATE,
clockevents_config_and_register(&ost->cevt, rate, 4, 0xffffffff);
clockevents_config_and_register(&timer->cevt, rate, 10, 0xffff);
clockevents_config_and_register(&pit->ced, freq, 1, ULONG_MAX);
clockevents_config_and_register(cd, gic_frequency, 0x300, 0x7fffffff);
clockevents_config_and_register(&ce->clkevt, rate, 0xf, 0xffffffff);
clockevents_config_and_register(&mxs_clockevent_device,
clockevents_config_and_register(&nmdk_clkevt, rate, min_ticks,
clockevents_config_and_register(ced, timer_of_rate(to), 0xf,
clockevents_config_and_register(&time_event_device,
clockevents_config_and_register(ced, ch->tmu->rate, 0x300, 0xffffffff);
clockevents_config_and_register(evt, timer_clk, 1, 0xfffffffe);
clockevents_config_and_register(&clkevt, sclk_rate,
clockevents_config_and_register(&clkevt.clkevt, clkevt.rate, 1, BIT(bits) - 1);
clockevents_config_and_register(&ttcce->ce,
clockevents_config_and_register(ce, clint_timer_freq, 100, ULONG_MAX);
clockevents_config_and_register(&cs5535_clockevent, MFGPT_HZ,
clockevents_config_and_register(&clockevent->dev, tick_rate,
clockevents_config_and_register(&dc_timer_dev.ce, rate, 0, 0xffffffff);
clockevents_config_and_register(cd, econet_timer.freq_hz,
clockevents_config_and_register(&ep93xx_clockevent,
clockevents_config_and_register(&ftm_clockevent,
clockevents_config_and_register(&fttmr010->clkevt,
clockevents_config_and_register(&timerdrv->ced, NSEC_PER_SEC,
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), 2,
clockevents_config_and_register(&gxp_timer->evt, TIMER0_FREQ,
clockevents_config_and_register(ced, clk_get_rate(imxtm->clk_per),
clockevents_config_and_register(&to_sysctr.clkevt,
clockevents_config_and_register(&to_sysctr.clkevt,
clockevents_config_and_register(&to_tpm.clkevt,
clockevents_config_and_register(&integrator_clockevent,
clockevents_config_and_register(&tmr->clkevt, timer_freq,
clockevents_config_and_register(event_dev, rate, 1, ULONG_MAX);
clockevents_config_and_register(&to->clkevt, timer_of_rate(to),
clockevents_config_and_register(&lpc32xx_clk_event_ddata.evtdev,
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to),
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to),
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to),
clockevents_config_and_register(&meson6_clockevent, USEC_PER_SEC,
clockevents_config_and_register(&ce->clkevt, clk_rate, 1, ULONG_MAX);
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), 15,
clockevents_config_and_register(&to->clkevt, timer_of_rate(to),
clockevents_config_and_register(&to->clkevt, timer_of_rate(to),
clockevents_config_and_register(&npcm7xx_to.clkevt,
clockevents_config_and_register(&pit->ced, pit->rate, 2, 0xffffffff);
clockevents_config_and_register(&stm_timer->ced, stm_timer->rate,
clockevents_config_and_register(&orion_clkevt, rate,
clockevents_config_and_register(&owl_clockevent, rate,
clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
clockevents_config_and_register(evt, GPT_HZ, 4, 0xffffffff);
clockevents_config_and_register(&rda_ostimer_of.clkevt, rate,
clockevents_config_and_register(&rtk_timer_to.clkevt, SYSTIMER_RATE,
clockevents_config_and_register(ce, riscv_timebase, 100, ULONG_MAX);
clockevents_config_and_register(&rk_clkevt->ce,
clockevents_config_and_register(&to->clkevt, RTTM_TICKS_PER_SEC,
clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to),
clockevents_config_and_register(&priv->clkevt, rate, 0x1,
clockevents_config_and_register(&to->clkevt, timer_of_rate(to), 0x1,
clockevents_config_and_register(&to.clkevt, timer_of_rate(&to),
clockevents_config_and_register(&ce->clkevt, rate,
clockevents_config_and_register(&to->clkevt, timer_of_rate(to),
clockevents_config_and_register(&clkevt->dev, clkevt->t.rate,
clockevents_config_and_register(dev, t->rate, 3, ULONG_MAX);
clockevents_config_and_register(&clkevt->dev, timer->fclk_rate,
clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
clockevents_config_and_register(&timer->clkevt,
extern void clockevents_config_and_register(struct clock_event_device *dev,
EXPORT_SYMBOL_GPL(clockevents_config_and_register);