Symbol: clk_sel
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
111
uint64_t clk_sel:2;
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
360
uint64_t clk_sel:2;
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
374
uint64_t clk_sel:2;
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
53
uint64_t clk_sel:2;
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
67
uint64_t clk_sel:2;
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
97
uint64_t clk_sel:2;
drivers/clk/imx/clk-imx93.c
60
enum clk_sel sel;
drivers/clk/mvebu/armada-37xx-periph.c
67
u32 clk_sel;
drivers/clk/mvebu/armada-37xx-periph.c
705
data->clk_sel = readl(data->reg + CLK_SEL);
drivers/clk/mvebu/armada-37xx-periph.c
721
writel(data->clk_sel, data->reg + CLK_SEL);
drivers/clk/ralink/clk-mt7621.c
261
u32 clkcfg, clk_sel, curclk, ffiv, ffrac;
drivers/clk/ralink/clk-mt7621.c
266
clk_sel = FIELD_GET(CPU_CLK_SEL_MASK, clkcfg);
drivers/clk/ralink/clk-mt7621.c
272
switch (clk_sel) {
drivers/clk/sophgo/clk-cv18xx-ip.c
700
if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))
drivers/clk/sophgo/clk-cv18xx-ip.c
723
if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))
drivers/clk/sophgo/clk-cv18xx-ip.c
739
s8 clk_sel;
drivers/clk/sophgo/clk-cv18xx-ip.c
744
if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))
drivers/clk/sophgo/clk-cv18xx-ip.c
745
clk_sel = 0;
drivers/clk/sophgo/clk-cv18xx-ip.c
747
clk_sel = 1;
drivers/clk/sophgo/clk-cv18xx-ip.c
748
mux = &mmux->mux[clk_sel];
drivers/clk/sophgo/clk-cv18xx-ip.c
752
return mmux->sel2parent[clk_sel][cv1800_clk_regfield_get(reg, mux)];
drivers/clk/sophgo/clk-cv18xx-ip.c
761
s8 clk_sel = mmux->parent2sel[index];
drivers/clk/sophgo/clk-cv18xx-ip.c
763
if (index == 0 || clk_sel == -1) {
drivers/clk/sophgo/clk-cv18xx-ip.c
770
if (clk_sel)
drivers/clk/sophgo/clk-cv18xx-ip.c
771
cv1800_clk_clearbit(&mmux->common, &mmux->clk_sel);
drivers/clk/sophgo/clk-cv18xx-ip.c
773
cv1800_clk_setbit(&mmux->common, &mmux->clk_sel);
drivers/clk/sophgo/clk-cv18xx-ip.c
777
mux = &mmux->mux[clk_sel];
drivers/clk/sophgo/clk-cv18xx-ip.h
220
.clk_sel = CV1800_CLK_BIT(_clk_sel_reg, \
drivers/clk/sophgo/clk-cv18xx-ip.h
53
struct cv1800_clk_regbit clk_sel;
drivers/gpio/gpio-npcm-sgpio.c
297
iowrite8(clk_cfg->clk_sel[i] | tmp,
drivers/gpio/gpio-npcm-sgpio.c
53
unsigned int *clk_sel;
drivers/gpio/gpio-npcm-sgpio.c
588
.clk_sel = npcm750_CLK_SEL,
drivers/gpio/gpio-npcm-sgpio.c
594
.clk_sel = npcm845_CLK_SEL,
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c
83
uint32_t clk_sel = 0;
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c
85
REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel);
drivers/gpu/drm/i915/display/intel_ddi.c
1561
u32 clk_sel_mask, u32 clk_sel, u32 clk_off)
drivers/gpu/drm/i915/display/intel_ddi.c
1565
intel_de_rmw(display, reg, clk_sel_mask, clk_sel);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
141
ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
155
if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
161
clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
162
clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
167
clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
214
if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
302
ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
541
imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
542
if (IS_ERR(imx_ldb->clk_sel[i])) {
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
543
ret = PTR_ERR(imx_ldb->clk_sel[i]);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
544
imx_ldb->clk_sel[i] = NULL;
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
548
imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
drivers/gpu/drm/imx/ipuv3/imx-ldb.c
87
struct clk *clk_sel[4]; /* parent of display clock */
drivers/iio/adc/ad4170-4.c
2422
unsigned int clk_sel)
drivers/iio/adc/ad4170-4.c
2425
st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, clk_sel);
drivers/iio/adc/ad4170-4.c
2438
u32 clk_sel;
drivers/iio/adc/ad4170-4.c
2440
clk_sel = FIELD_GET(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, st->clock_ctrl);
drivers/iio/adc/ad4170-4.c
2441
return clk_sel == AD4170_CLOCK_CTRL_CLOCKSEL_INT_OUT;
drivers/iio/adc/ad7124.c
1328
unsigned int power_mode, clk_sel;
drivers/iio/adc/ad7124.c
1373
clk_sel = AD7124_ADC_CONTROL_CLK_SEL_INT;
drivers/iio/adc/ad7124.c
1403
clk_sel = AD7124_ADC_CONTROL_CLK_SEL_INT_OUT;
drivers/iio/adc/ad7124.c
1429
clk_sel = AD7124_ADC_CONTROL_CLK_SEL_EXT_DIV4;
drivers/iio/adc/ad7124.c
1432
clk_sel = AD7124_ADC_CONTROL_CLK_SEL_EXT;
drivers/iio/adc/ad7124.c
1436
clk_sel = AD7124_ADC_CONTROL_CLK_SEL_INT;
drivers/iio/adc/ad7124.c
1442
st->adc_control |= FIELD_PREP(AD7124_ADC_CONTROL_CLK_SEL, clk_sel);
drivers/iio/adc/ad7173.c
1596
unsigned int clk_sel)
drivers/iio/adc/ad7173.c
1601
st->adc_mode |= FIELD_PREP(AD7173_ADC_MODE_CLOCKSEL_MASK, clk_sel);
drivers/iio/adc/ad7173.c
1618
u32 clk_sel;
drivers/iio/adc/ad7173.c
1620
clk_sel = FIELD_GET(AD7173_ADC_MODE_CLOCKSEL_MASK, st->adc_mode);
drivers/iio/adc/ad7173.c
1621
return clk_sel == AD7173_ADC_MODE_CLOCKSEL_INT_OUTPUT;
drivers/iio/adc/stm32-adc-core.c
77
int (*clk_sel)(struct platform_device *, struct stm32_adc_priv *);
drivers/iio/adc/stm32-adc-core.c
783
ret = priv->cfg->clk_sel(pdev, priv);
drivers/iio/adc/stm32-adc-core.c
853
.clk_sel = stm32f4_adc_clk_sel,
drivers/iio/adc/stm32-adc-core.c
861
.clk_sel = stm32h7_adc_clk_sel,
drivers/iio/adc/stm32-adc-core.c
870
.clk_sel = stm32h7_adc_clk_sel,
drivers/iio/adc/stm32-adc-core.c
879
.clk_sel = stm32h7_adc_clk_sel,
drivers/iio/adc/vf610_adc.c
139
enum clk_sel clk_sel;
drivers/iio/adc/vf610_adc.c
240
adc_feature->clk_sel = VF610_ADCIOC_BUSCLK_SET;
drivers/iio/adc/vf610_adc.c
260
switch (adc_feature->clk_sel) {
drivers/iio/adc/vf610_adc.c
381
switch (adc_feature->clk_sel) {
drivers/leds/rgb/leds-qcom-lpg.c
184
unsigned int clk_sel;
drivers/leds/rgb/leds-qcom-lpg.c
425
unsigned int clk_sel, clk_len, best_clk = 0;
drivers/leds/rgb/leds-qcom-lpg.c
489
for (clk_sel = 1; clk_sel < clk_len; clk_sel++) {
drivers/leds/rgb/leds-qcom-lpg.c
490
u64 numerator = period * clk_rate_arr[clk_sel];
drivers/leds/rgb/leds-qcom-lpg.c
507
clk_rate_arr[clk_sel]);
drivers/leds/rgb/leds-qcom-lpg.c
513
best_clk = clk_sel;
drivers/leds/rgb/leds-qcom-lpg.c
520
chan->clk_sel = best_clk;
drivers/leds/rgb/leds-qcom-lpg.c
536
clk_rate = lpg_clk_rates_hi_res[chan->clk_sel];
drivers/leds/rgb/leds-qcom-lpg.c
539
clk_rate = lpg_clk_rates[chan->clk_sel];
drivers/leds/rgb/leds-qcom-lpg.c
556
val = chan->clk_sel;
drivers/media/dvb-frontends/stv0900_core.c
286
u32 m_div, clk_sel;
drivers/media/dvb-frontends/stv0900_core.c
297
clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6);
drivers/media/dvb-frontends/stv0900_core.c
298
m_div = ((clk_sel * mclk) / intp->quartz) - 1;
drivers/media/dvb-frontends/stv090x.c
4277
u32 reg, div, clk_sel;
drivers/media/dvb-frontends/stv090x.c
4280
clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
drivers/media/dvb-frontends/stv090x.c
4282
div = ((clk_sel * mclk) / config->xtal) - 1;
drivers/net/ethernet/atheros/alx/hw.c
101
u32 val, clk_sel;
drivers/net/ethernet/atheros/alx/hw.c
104
clk_sel = hw->link_speed != SPEED_UNKNOWN ?
drivers/net/ethernet/atheros/alx/hw.c
114
clk_sel << ALX_MDIO_CLK_SEL_SHIFT |
drivers/net/ethernet/atheros/alx/hw.c
119
clk_sel << ALX_MDIO_CLK_SEL_SHIFT |
drivers/net/ethernet/atheros/alx/hw.c
64
u32 val, clk_sel;
drivers/net/ethernet/atheros/alx/hw.c
70
clk_sel = hw->link_speed != SPEED_UNKNOWN ?
drivers/net/ethernet/atheros/alx/hw.c
81
clk_sel << ALX_MDIO_CLK_SEL_SHIFT;
drivers/net/ethernet/atheros/alx/hw.c
84
clk_sel << ALX_MDIO_CLK_SEL_SHIFT |
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
274
void atl1c_start_phy_polling(struct atl1c_hw *hw, u16 clk_sel)
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
282
FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
306
u16 clk_sel = MDIO_CTRL_CLK_25_4;
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
315
clk_sel = MDIO_CTRL_CLK_25_128;
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
320
FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
326
FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
339
atl1c_start_phy_polling(hw, clk_sel);
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
355
u16 clk_sel = MDIO_CTRL_CLK_25_4;
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
363
clk_sel = MDIO_CTRL_CLK_25_128;
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
369
FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
375
FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |
drivers/net/ethernet/atheros/atl1c/atl1c_hw.c
385
atl1c_start_phy_polling(hw, clk_sel);
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h
43
void atl1c_start_phy_polling(struct atl1c_hw *hw, u16 clk_sel);
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c
89
u32 clk_sel = lan969x_rgmii_get_clk_sel(conf->speed);
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c
95
spx5_rmw(HSIO_WRAP_RGMII_CFG_TX_CLK_CFG_SET(clk_sel) |
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
113
val = clk_sel | ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV |
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
55
unsigned long clk_sel, val;
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
60
clk_sel = ETHER_CLK_SEL_FREQ_SEL_125M;
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
64
clk_sel = ETHER_CLK_SEL_FREQ_SEL_25M;
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
68
clk_sel = ETHER_CLK_SEL_FREQ_SEL_2P5M;
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
83
val = clk_sel | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC;
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
94
clk_sel = ETHER_CLK_SEL_DIV_SEL_2;
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
98
clk_sel = ETHER_CLK_SEL_DIV_SEL_20;
drivers/spi/spi-geni-qcom.c
308
u32 clk_sel, m_clk_cfg, idx, div;
drivers/spi/spi-geni-qcom.c
330
clk_sel = idx & CLK_SEL_MSK;
drivers/spi/spi-geni-qcom.c
332
writel(clk_sel, se->base + SE_GENI_CLK_SEL);
drivers/spi/spi-sunplus-sp7021.c
287
u32 clk_rate, clk_sel, div;
drivers/spi/spi-sunplus-sp7021.c
292
clk_sel = (div / 2) - 1;
drivers/spi/spi-sunplus-sp7021.c
294
pspim->xfer_conf |= FIELD_PREP(SP7021_CLK_MASK, clk_sel);
drivers/tty/serial/samsung_tty.c
1359
static void s3c24xx_serial_setsource(struct uart_port *port, u8 clk_sel)
drivers/tty/serial/samsung_tty.c
1368
if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel)
drivers/tty/serial/samsung_tty.c
1372
ucon |= clk_sel << info->clksel_shift;
drivers/tty/serial/samsung_tty.c
1390
if (ourport->cfg->clk_sel &&
drivers/tty/serial/samsung_tty.c
1391
!(ourport->cfg->clk_sel & (1 << cnt)))
drivers/tty/serial/samsung_tty.c
1482
u8 clk_sel = 0;
drivers/tty/serial/samsung_tty.c
1495
quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);
drivers/tty/serial/samsung_tty.c
1506
s3c24xx_serial_setsource(port, clk_sel);
drivers/tty/serial/samsung_tty.c
1785
u8 clk_sel, clk_num;
drivers/tty/serial/samsung_tty.c
1787
clk_sel = ourport->cfg->clk_sel ? : info->def_clk_sel;
drivers/tty/serial/samsung_tty.c
1789
if (!(clk_sel & (1 << clk_num)))
drivers/tty/serial/samsung_tty.c
2300
u8 clk_sel;
drivers/tty/serial/samsung_tty.c
2339
clk_sel = s3c24xx_serial_getsource(port);
drivers/tty/serial/samsung_tty.c
2340
sprintf(clk_name, "clk_uart_baud%d", clk_sel);
drivers/video/fbdev/grvga.c
112
par->clk_sel = i;
drivers/video/fbdev/grvga.c
180
__raw_writel((par->clk_sel << 6) | (func << 4) | 1,
drivers/video/fbdev/grvga.c
42
int clk_sel;
include/linux/serial_s3c.h
288
unsigned int clk_sel;
sound/soc/intel/atom/sst/sst.h
117
u64 clk_sel:3;
sound/soc/sti/uniperif.h
1300
struct regmap_field *clk_sel;
sound/soc/sti/uniperif_player.c
1031
player->clk_sel = regmap_field_alloc(regmap, regfield[0]);
sound/soc/sti/uniperif_player.c
1083
if (player->clk_sel) {
sound/soc/sti/uniperif_player.c
1084
ret = regmap_field_write(player->clk_sel, 1);
sound/soc/sti/uniperif_player.c
957
if (player->clk_sel) {
sound/soc/sti/uniperif_player.c
958
ret = regmap_field_write(player->clk_sel, 1);