clk_register_fixed_rate
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, dove_tclk);
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, get_tclk());
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, orion5x_tclk);
c = clk_register_fixed_rate(NULL, ALCHEMY_ROOT_CLK, NULL,
clk = clk_register_fixed_rate(NULL, name, NULL, 0, rate);
return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);
clk = clk_register_fixed_rate(&pdata->adev->dev,
amba_dummy_clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, 0, 0);
clk = clk_register_fixed_rate(NULL, devname, parent, 0,
clk_register_fixed_rate(NULL, "spi_sspclk", sys_refclk_name, 0,
clk_register_fixed_rate(dev, "nand_clkb", sys_refclk_name, 0,
clk_register_fixed_rate(dev, "ptp_ref", sys_refclk_name, 0,
clk_register_fixed_rate(dev, "sd_pclk", sys_refclk_name, 0,
clk_register_fixed_rate(dev, "sd_imclk", sys_refclk_name, 0,
clk_register_fixed_rate(dev, "i2c", sys_refclk_name, 0, 100000000);
clk_register_fixed_rate(dev, "timer", sys_refclk_name, 0,
clk_register_fixed_rate(dev, "fracdiv_in", sys_refclk_name, 0,
clk_register_fixed_rate(NULL, "uart_ref", sys_refclk_name, 0,
EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
vc5->pin_xin = clk_register_fixed_rate(&client->dev,
vc7->clk_apll.clk = clk_register_fixed_rate(&client->dev, apll_name,
clk = clk_register_fixed_rate(NULL, clks[i].name,
clks[POSCCLK] = clk_register_fixed_rate(&pdev->dev, "posc_clk", NULL,
clks[FRCCLK] = clk_register_fixed_rate(&pdev->dev, "frc_clk", NULL,
clks[BFRCCLK] = clk_register_fixed_rate(&pdev->dev, "bfrc_clk", NULL,
clks[LPRCCLK] = clk_register_fixed_rate(&pdev->dev, "lprc_clk", NULL,
clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,
clk = clk_register_fixed_rate(NULL, clks[i].name,
ap806_clks[0] = clk_register_fixed_rate(dev, name, NULL,
ap806_clks[1] = clk_register_fixed_rate(dev, name, NULL, 0,
ap806_clks[2] = clk_register_fixed_rate(dev, fixedclk_name, NULL,
ap806_clks[5] = clk_register_fixed_rate(dev, name, NULL, 0, dclk_freq);
clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL, 0,
clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL, 0,
clk_register_fixed_rate(NULL, name, NULL, 0, rate);
clk = clk_register_fixed_rate(dev, core_pll[0], NULL, 0, 2000000000UL);
return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
clk = clk_register_fixed_rate(NULL, clk_src_names[CLK_SRC_IRC],
clk = clk_register_fixed_rate(NULL, lpc32xx_clk->name,
clk_register_fixed_rate(NULL, "osc_3_6864mhz", NULL,
clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
clk_register_fixed_rate(NULL, "ring_osc_120mhz", NULL,
clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
clk = clk_register_fixed_rate(NULL, core->name, NULL, 0,
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);
clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);
clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,
clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0,
clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0,
clk = clk_register_fixed_rate(NULL, "ras_30m_fixed_clk", "pll5_clk", 0,
clk = clk_register_fixed_rate(NULL, "ras_48m_fixed_clk", "pll5_clk", 0,
clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, 0,
clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, 0, 50000000);
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);
clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);
clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,
clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0,
clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0,
clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0,
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, 0, 30000000);
clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0,
clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IGNORE_UNUSED,
clk = clk_register_fixed_rate(NULL, "pll_u_vco", "pll_ref", 0,
rtc_clk = clk_register_fixed_rate(NULL, "rtc32k", "NULL",
clk = clk_register_fixed_rate(&pdev->dev, drvdata->name, NULL,
ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, 0, tmp);
clk = clk_register_fixed_rate(NULL, dev_name(lpss->dev), NULL, 0,
i2c_clk = clk_register_fixed_rate(dev,
plat_data.pclk = clk_register_fixed_rate(&pdev->dev, "pclk", NULL, 0,
plat_data.hclk = clk_register_fixed_rate(&pdev->dev, "hclk", NULL, 0,
plat->stmmac_clk = clk_register_fixed_rate(&pdev->dev,
clk = clk_register_fixed_rate(NULL, clk_name, NULL, 0, 156250000);
priv->clk = clk_register_fixed_rate(
ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);
struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
clk = clk_register_fixed_rate(dev, clk_name, parent_clk_name, 0, rate);
clk = clk_register_fixed_rate(dev, name, parent, 0, 0);
clk = clk_register_fixed_rate(dev, clkout_name[CLKOUT],
clk = clk_register_fixed_rate(dev, clkout_name[i],