Symbol: C
arch/arc/kernel/perf_event.c
100
[C(OP_WRITE)] = {
arch/arc/kernel/perf_event.c
101
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
102
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
104
[C(OP_PREFETCH)] = {
arch/arc/kernel/perf_event.c
105
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
106
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
109
[C(LL)] = {
arch/arc/kernel/perf_event.c
110
[C(OP_READ)] = {
arch/arc/kernel/perf_event.c
111
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
112
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
114
[C(OP_WRITE)] = {
arch/arc/kernel/perf_event.c
115
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
116
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
118
[C(OP_PREFETCH)] = {
arch/arc/kernel/perf_event.c
119
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
120
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
123
[C(DTLB)] = {
arch/arc/kernel/perf_event.c
124
[C(OP_READ)] = {
arch/arc/kernel/perf_event.c
125
[C(RESULT_ACCESS)] = PERF_COUNT_ARC_LDC,
arch/arc/kernel/perf_event.c
126
[C(RESULT_MISS)] = PERF_COUNT_ARC_EDTLB,
arch/arc/kernel/perf_event.c
129
[C(OP_WRITE)] = {
arch/arc/kernel/perf_event.c
130
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
131
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
133
[C(OP_PREFETCH)] = {
arch/arc/kernel/perf_event.c
134
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
135
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
138
[C(ITLB)] = {
arch/arc/kernel/perf_event.c
139
[C(OP_READ)] = {
arch/arc/kernel/perf_event.c
140
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
141
[C(RESULT_MISS)] = PERF_COUNT_ARC_EITLB,
arch/arc/kernel/perf_event.c
143
[C(OP_WRITE)] = {
arch/arc/kernel/perf_event.c
144
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
145
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
147
[C(OP_PREFETCH)] = {
arch/arc/kernel/perf_event.c
148
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
149
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
152
[C(BPU)] = {
arch/arc/kernel/perf_event.c
153
[C(OP_READ)] = {
arch/arc/kernel/perf_event.c
154
[C(RESULT_ACCESS)] = PERF_COUNT_HW_BRANCH_INSTRUCTIONS,
arch/arc/kernel/perf_event.c
155
[C(RESULT_MISS)] = PERF_COUNT_HW_BRANCH_MISSES,
arch/arc/kernel/perf_event.c
157
[C(OP_WRITE)] = {
arch/arc/kernel/perf_event.c
158
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
159
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
161
[C(OP_PREFETCH)] = {
arch/arc/kernel/perf_event.c
162
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
163
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
166
[C(NODE)] = {
arch/arc/kernel/perf_event.c
167
[C(OP_READ)] = {
arch/arc/kernel/perf_event.c
168
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
169
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
171
[C(OP_WRITE)] = {
arch/arc/kernel/perf_event.c
172
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
173
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
175
[C(OP_PREFETCH)] = {
arch/arc/kernel/perf_event.c
176
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
177
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
80
static const unsigned int arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/arc/kernel/perf_event.c
81
[C(L1D)] = {
arch/arc/kernel/perf_event.c
82
[C(OP_READ)] = {
arch/arc/kernel/perf_event.c
83
[C(RESULT_ACCESS)] = PERF_COUNT_ARC_LDC,
arch/arc/kernel/perf_event.c
84
[C(RESULT_MISS)] = PERF_COUNT_ARC_DCLM,
arch/arc/kernel/perf_event.c
86
[C(OP_WRITE)] = {
arch/arc/kernel/perf_event.c
87
[C(RESULT_ACCESS)] = PERF_COUNT_ARC_STC,
arch/arc/kernel/perf_event.c
88
[C(RESULT_MISS)] = PERF_COUNT_ARC_DCSM,
arch/arc/kernel/perf_event.c
90
[C(OP_PREFETCH)] = {
arch/arc/kernel/perf_event.c
91
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
92
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/arc/kernel/perf_event.c
95
[C(L1I)] = {
arch/arc/kernel/perf_event.c
96
[C(OP_READ)] = {
arch/arc/kernel/perf_event.c
97
[C(RESULT_ACCESS)] = PERF_COUNT_HW_INSTRUCTIONS,
arch/arc/kernel/perf_event.c
98
[C(RESULT_MISS)] = PERF_COUNT_ARC_ICM,
arch/arm/mach-omap1/mux.c
115
MUX_CFG("MCBSP2_CLKR", C, 6, 0, 2, 27, 1, NA, 0, 1)
arch/arm/mach-omap1/mux.c
116
MUX_CFG("MCBSP2_CLKX", C, 9, 0, 2, 29, 1, NA, 0, 1)
arch/arm/mach-omap1/mux.c
117
MUX_CFG("MCBSP2_DR", C, 0, 0, 2, 26, 1, NA, 0, 1)
arch/arm/mach-omap1/mux.c
118
MUX_CFG("MCBSP2_DX", C, 15, 0, 2, 31, 1, NA, 0, 1)
arch/arm/mach-omap1/mux.c
119
MUX_CFG("MCBSP2_FSR", C, 12, 0, 2, 30, 1, NA, 0, 1)
arch/arm/mach-omap1/mux.c
120
MUX_CFG("MCBSP2_FSX", C, 3, 0, 2, 27, 1, NA, 0, 1)
arch/arm/mach-omap1/mux.c
155
MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1)
arch/arm/mach-omap1/mux.c
161
MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0)
arch/arm/mach-omap1/mux.c
201
MUX_CFG("Y5_USB0_RCV", C, 21, 5, 3, 1, 0, 1, 0, 1)
arch/arm/mach-omap1/mux.c
202
MUX_CFG("R9_USB0_VM", C, 18, 5, 3, 0, 0, 3, 0, 1)
arch/arm/mach-omap1/mux.c
203
MUX_CFG("V6_USB0_TXD", C, 27, 5, 3, 3, 0, 3, 0, 1)
arch/arm/mach-omap1/mux.c
204
MUX_CFG("W5_USB0_SE0", C, 24, 5, 3, 2, 0, 3, 0, 1)
arch/arm/mach-omap1/mux.c
211
MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1)
arch/arm/mach-omap1/mux.c
212
MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1)
arch/arm/mach-omap1/mux.c
213
MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1)
arch/arm/mach-omap1/mux.c
214
MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1)
arch/arm/mach-omap1/mux.c
221
MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1)
arch/arm/mach-omap1/mux.c
34
MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
arch/arm/mach-omap1/mux.c
35
MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
arch/arm/mach-omap1/mux.c
36
MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
arch/arm/mach-omap1/mux.c
37
MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
arch/arm/mach-omap1/mux.c
78
MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1)
arch/arm/mach-omap1/mux.c
79
MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1)
arch/arm/mach-omap1/mux.c
80
MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1)
arch/arm/mach-omap1/mux.c
81
MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1)
arch/arm64/kernel/process.c
157
bstr( C, "-c"),
arch/csky/kernel/perf_event.c
729
static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/csky/kernel/perf_event.c
730
[C(L1D)] = {
arch/csky/kernel/perf_event.c
732
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
733
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
734
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
736
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
737
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
738
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
740
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
741
[C(RESULT_ACCESS)] = 0x5,
arch/csky/kernel/perf_event.c
742
[C(RESULT_MISS)] = 0x6,
arch/csky/kernel/perf_event.c
745
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
746
[C(RESULT_ACCESS)] = 0x14,
arch/csky/kernel/perf_event.c
747
[C(RESULT_MISS)] = 0x15,
arch/csky/kernel/perf_event.c
749
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
750
[C(RESULT_ACCESS)] = 0x16,
arch/csky/kernel/perf_event.c
751
[C(RESULT_MISS)] = 0x17,
arch/csky/kernel/perf_event.c
753
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
754
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
755
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
759
[C(L1I)] = {
arch/csky/kernel/perf_event.c
760
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
761
[C(RESULT_ACCESS)] = 0x3,
arch/csky/kernel/perf_event.c
762
[C(RESULT_MISS)] = 0x4,
arch/csky/kernel/perf_event.c
764
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
765
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
766
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
768
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
769
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
770
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
773
[C(LL)] = {
arch/csky/kernel/perf_event.c
775
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
776
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
777
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
779
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
780
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
781
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
783
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
784
[C(RESULT_ACCESS)] = 0x7,
arch/csky/kernel/perf_event.c
785
[C(RESULT_MISS)] = 0x8,
arch/csky/kernel/perf_event.c
788
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
789
[C(RESULT_ACCESS)] = 0x18,
arch/csky/kernel/perf_event.c
790
[C(RESULT_MISS)] = 0x19,
arch/csky/kernel/perf_event.c
792
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
793
[C(RESULT_ACCESS)] = 0x1a,
arch/csky/kernel/perf_event.c
794
[C(RESULT_MISS)] = 0x1b,
arch/csky/kernel/perf_event.c
796
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
797
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
798
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
802
[C(DTLB)] = {
arch/csky/kernel/perf_event.c
804
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
805
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
806
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
808
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
809
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
810
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
813
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
814
[C(RESULT_ACCESS)] = 0x14,
arch/csky/kernel/perf_event.c
815
[C(RESULT_MISS)] = 0xb,
arch/csky/kernel/perf_event.c
817
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
818
[C(RESULT_ACCESS)] = 0x16,
arch/csky/kernel/perf_event.c
819
[C(RESULT_MISS)] = 0xb,
arch/csky/kernel/perf_event.c
822
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
823
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
824
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
827
[C(ITLB)] = {
arch/csky/kernel/perf_event.c
829
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
830
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
831
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
834
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
835
[C(RESULT_ACCESS)] = 0x3,
arch/csky/kernel/perf_event.c
836
[C(RESULT_MISS)] = 0xa,
arch/csky/kernel/perf_event.c
839
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
840
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
841
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
843
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
844
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
845
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
848
[C(BPU)] = {
arch/csky/kernel/perf_event.c
849
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
850
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
851
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
853
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
854
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
855
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
857
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
858
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
859
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
862
[C(NODE)] = {
arch/csky/kernel/perf_event.c
863
[C(OP_READ)] = {
arch/csky/kernel/perf_event.c
864
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
865
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
867
[C(OP_WRITE)] = {
arch/csky/kernel/perf_event.c
868
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
869
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
871
[C(OP_PREFETCH)] = {
arch/csky/kernel/perf_event.c
872
[C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED,
arch/csky/kernel/perf_event.c
873
[C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED,
arch/loongarch/kernel/perf_event.c
124
[0 ... C(MAX) - 1] = { \
arch/loongarch/kernel/perf_event.c
125
[0 ... C(OP_MAX) - 1] = { \
arch/loongarch/kernel/perf_event.c
126
[0 ... C(RESULT_MAX) - 1] = {CACHE_OP_UNSUPPORTED}, \
arch/loongarch/kernel/perf_event.c
691
[C(L1D)] = {
arch/loongarch/kernel/perf_event.c
698
[C(OP_READ)] = {
arch/loongarch/kernel/perf_event.c
699
[C(RESULT_ACCESS)] = { 0x8 },
arch/loongarch/kernel/perf_event.c
700
[C(RESULT_MISS)] = { 0x9 },
arch/loongarch/kernel/perf_event.c
702
[C(OP_WRITE)] = {
arch/loongarch/kernel/perf_event.c
703
[C(RESULT_ACCESS)] = { 0x8 },
arch/loongarch/kernel/perf_event.c
704
[C(RESULT_MISS)] = { 0x9 },
arch/loongarch/kernel/perf_event.c
706
[C(OP_PREFETCH)] = {
arch/loongarch/kernel/perf_event.c
707
[C(RESULT_ACCESS)] = { 0xaa },
arch/loongarch/kernel/perf_event.c
708
[C(RESULT_MISS)] = { 0xa9 },
arch/loongarch/kernel/perf_event.c
711
[C(L1I)] = {
arch/loongarch/kernel/perf_event.c
712
[C(OP_READ)] = {
arch/loongarch/kernel/perf_event.c
713
[C(RESULT_ACCESS)] = { 0x6 },
arch/loongarch/kernel/perf_event.c
714
[C(RESULT_MISS)] = { 0x7 },
arch/loongarch/kernel/perf_event.c
717
[C(LL)] = {
arch/loongarch/kernel/perf_event.c
718
[C(OP_READ)] = {
arch/loongarch/kernel/perf_event.c
719
[C(RESULT_ACCESS)] = { 0xc },
arch/loongarch/kernel/perf_event.c
720
[C(RESULT_MISS)] = { 0xd },
arch/loongarch/kernel/perf_event.c
722
[C(OP_WRITE)] = {
arch/loongarch/kernel/perf_event.c
723
[C(RESULT_ACCESS)] = { 0xc },
arch/loongarch/kernel/perf_event.c
724
[C(RESULT_MISS)] = { 0xd },
arch/loongarch/kernel/perf_event.c
727
[C(ITLB)] = {
arch/loongarch/kernel/perf_event.c
728
[C(OP_READ)] = {
arch/loongarch/kernel/perf_event.c
729
[C(RESULT_MISS)] = { 0x3b },
arch/loongarch/kernel/perf_event.c
732
[C(DTLB)] = {
arch/loongarch/kernel/perf_event.c
733
[C(OP_READ)] = {
arch/loongarch/kernel/perf_event.c
734
[C(RESULT_ACCESS)] = { 0x4 },
arch/loongarch/kernel/perf_event.c
735
[C(RESULT_MISS)] = { 0x3c },
arch/loongarch/kernel/perf_event.c
737
[C(OP_WRITE)] = {
arch/loongarch/kernel/perf_event.c
738
[C(RESULT_ACCESS)] = { 0x4 },
arch/loongarch/kernel/perf_event.c
739
[C(RESULT_MISS)] = { 0x3c },
arch/loongarch/kernel/perf_event.c
742
[C(BPU)] = {
arch/loongarch/kernel/perf_event.c
744
[C(OP_READ)] = {
arch/loongarch/kernel/perf_event.c
745
[C(RESULT_ACCESS)] = { 0x02 },
arch/loongarch/kernel/perf_event.c
746
[C(RESULT_MISS)] = { 0x03 },
arch/m68k/fpsp040/fpsp.h
5
| Copyright (C) Motorola, Inc. 1990
arch/mips/include/asm/bug.h
34
#define BUG_ON(C) __BUG_ON((unsigned long)(C))
arch/mips/kernel/perf_event_mipsxx.c
1009
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1016
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1017
[C(RESULT_ACCESS)] = { 0x0a, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1018
[C(RESULT_MISS)] = { 0x0b, CNTR_EVEN | CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1020
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1021
[C(RESULT_ACCESS)] = { 0x0a, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1022
[C(RESULT_MISS)] = { 0x0b, CNTR_EVEN | CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1025
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1026
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1027
[C(RESULT_ACCESS)] = { 0x09, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1028
[C(RESULT_MISS)] = { 0x09, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1030
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1031
[C(RESULT_ACCESS)] = { 0x09, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1032
[C(RESULT_MISS)] = { 0x09, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1034
[C(OP_PREFETCH)] = {
arch/mips/kernel/perf_event_mipsxx.c
1035
[C(RESULT_ACCESS)] = { 0x14, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1042
[C(LL)] = {
arch/mips/kernel/perf_event_mipsxx.c
1043
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1044
[C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P },
arch/mips/kernel/perf_event_mipsxx.c
1045
[C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P },
arch/mips/kernel/perf_event_mipsxx.c
1047
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1048
[C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P },
arch/mips/kernel/perf_event_mipsxx.c
1049
[C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P },
arch/mips/kernel/perf_event_mipsxx.c
1052
[C(DTLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1053
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1054
[C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1055
[C(RESULT_MISS)] = { 0x06, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1057
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1058
[C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1059
[C(RESULT_MISS)] = { 0x06, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1062
[C(ITLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1063
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1064
[C(RESULT_ACCESS)] = { 0x05, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1065
[C(RESULT_MISS)] = { 0x05, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1067
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1068
[C(RESULT_ACCESS)] = { 0x05, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1069
[C(RESULT_MISS)] = { 0x05, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1072
[C(BPU)] = {
arch/mips/kernel/perf_event_mipsxx.c
1074
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1075
[C(RESULT_ACCESS)] = { 0x02, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1076
[C(RESULT_MISS)] = { 0x02, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1078
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1079
[C(RESULT_ACCESS)] = { 0x02, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1080
[C(RESULT_MISS)] = { 0x02, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1090
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1097
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1098
[C(RESULT_ACCESS)] = { 0x17, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1099
[C(RESULT_MISS)] = { 0x18, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1101
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1102
[C(RESULT_ACCESS)] = { 0x17, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1103
[C(RESULT_MISS)] = { 0x18, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1106
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1107
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1108
[C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1109
[C(RESULT_MISS)] = { 0x06, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1111
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1112
[C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1113
[C(RESULT_MISS)] = { 0x06, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1115
[C(OP_PREFETCH)] = {
arch/mips/kernel/perf_event_mipsxx.c
1116
[C(RESULT_ACCESS)] = { 0x34, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1123
[C(LL)] = {
arch/mips/kernel/perf_event_mipsxx.c
1124
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1125
[C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P },
arch/mips/kernel/perf_event_mipsxx.c
1126
[C(RESULT_MISS)] = { 0x1d, CNTR_EVEN, P },
arch/mips/kernel/perf_event_mipsxx.c
1128
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1129
[C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P },
arch/mips/kernel/perf_event_mipsxx.c
1130
[C(RESULT_MISS)] = { 0x1d, CNTR_EVEN, P },
arch/mips/kernel/perf_event_mipsxx.c
1138
[C(ITLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1139
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1140
[C(RESULT_ACCESS)] = { 0x04, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1141
[C(RESULT_MISS)] = { 0x04, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1143
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1144
[C(RESULT_ACCESS)] = { 0x04, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1145
[C(RESULT_MISS)] = { 0x04, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1148
[C(BPU)] = {
arch/mips/kernel/perf_event_mipsxx.c
1150
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1151
[C(RESULT_ACCESS)] = { 0x27, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1152
[C(RESULT_MISS)] = { 0x27, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1154
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1155
[C(RESULT_ACCESS)] = { 0x27, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1156
[C(RESULT_MISS)] = { 0x27, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1165
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1166
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1167
[C(RESULT_ACCESS)] = { 0x46, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1168
[C(RESULT_MISS)] = { 0x49, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1170
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1171
[C(RESULT_ACCESS)] = { 0x47, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1172
[C(RESULT_MISS)] = { 0x4a, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1175
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1176
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1177
[C(RESULT_ACCESS)] = { 0x84, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1178
[C(RESULT_MISS)] = { 0x85, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1181
[C(DTLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1183
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1184
[C(RESULT_ACCESS)] = { 0x40, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1185
[C(RESULT_MISS)] = { 0x41, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1187
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1188
[C(RESULT_ACCESS)] = { 0x40, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1189
[C(RESULT_MISS)] = { 0x41, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1192
[C(BPU)] = {
arch/mips/kernel/perf_event_mipsxx.c
1194
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1195
[C(RESULT_ACCESS)] = { 0x15, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1196
[C(RESULT_MISS)] = { 0x16, CNTR_EVEN | CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1205
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1212
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1213
[C(RESULT_MISS)] = { 0x04, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1215
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1216
[C(RESULT_MISS)] = { 0x04, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1219
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1220
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1221
[C(RESULT_MISS)] = { 0x04, CNTR_EVEN },
arch/mips/kernel/perf_event_mipsxx.c
1223
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1224
[C(RESULT_MISS)] = { 0x04, CNTR_EVEN },
arch/mips/kernel/perf_event_mipsxx.c
1227
[C(DTLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1228
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1229
[C(RESULT_MISS)] = { 0x09, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1231
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1232
[C(RESULT_MISS)] = { 0x09, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1235
[C(ITLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1236
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1237
[C(RESULT_MISS)] = { 0x0c, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1239
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1240
[C(RESULT_MISS)] = { 0x0c, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1243
[C(BPU)] = {
arch/mips/kernel/perf_event_mipsxx.c
1245
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1246
[C(RESULT_ACCESS)] = { 0x01, CNTR_EVEN },
arch/mips/kernel/perf_event_mipsxx.c
1247
[C(RESULT_MISS)] = { 0x01, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1249
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1250
[C(RESULT_ACCESS)] = { 0x01, CNTR_EVEN },
arch/mips/kernel/perf_event_mipsxx.c
1251
[C(RESULT_MISS)] = { 0x01, CNTR_ODD },
arch/mips/kernel/perf_event_mipsxx.c
1260
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1267
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1268
[C(RESULT_ACCESS)] = { 0x156, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1270
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1271
[C(RESULT_ACCESS)] = { 0x155, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1272
[C(RESULT_MISS)] = { 0x153, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1275
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1276
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1277
[C(RESULT_MISS)] = { 0x18, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1279
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1280
[C(RESULT_MISS)] = { 0x18, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1283
[C(LL)] = {
arch/mips/kernel/perf_event_mipsxx.c
1284
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1285
[C(RESULT_ACCESS)] = { 0x1b6, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1287
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1288
[C(RESULT_ACCESS)] = { 0x1b7, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1290
[C(OP_PREFETCH)] = {
arch/mips/kernel/perf_event_mipsxx.c
1291
[C(RESULT_ACCESS)] = { 0x1bf, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1294
[C(DTLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1295
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1296
[C(RESULT_MISS)] = { 0x92, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1298
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1299
[C(RESULT_MISS)] = { 0x92, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1302
[C(ITLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1303
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1304
[C(RESULT_MISS)] = { 0x1a, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1306
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1307
[C(RESULT_MISS)] = { 0x1a, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1310
[C(BPU)] = {
arch/mips/kernel/perf_event_mipsxx.c
1312
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1313
[C(RESULT_ACCESS)] = { 0x94, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1314
[C(RESULT_MISS)] = { 0x9c, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1323
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1330
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1331
[C(RESULT_ACCESS)] = { 0x1e, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1332
[C(RESULT_MISS)] = { 0x1f, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1334
[C(OP_PREFETCH)] = {
arch/mips/kernel/perf_event_mipsxx.c
1335
[C(RESULT_ACCESS)] = { 0xaa, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1336
[C(RESULT_MISS)] = { 0xa9, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1339
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1340
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1341
[C(RESULT_ACCESS)] = { 0x1c, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1342
[C(RESULT_MISS)] = { 0x1d, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1345
[C(LL)] = {
arch/mips/kernel/perf_event_mipsxx.c
1346
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1347
[C(RESULT_ACCESS)] = { 0x2e, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1348
[C(RESULT_MISS)] = { 0x2f, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1351
[C(DTLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1352
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1353
[C(RESULT_ACCESS)] = { 0x14, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1354
[C(RESULT_MISS)] = { 0x1b, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1357
[C(ITLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1358
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1359
[C(RESULT_MISS)] = { 0x1a, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1362
[C(BPU)] = {
arch/mips/kernel/perf_event_mipsxx.c
1364
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1365
[C(RESULT_ACCESS)] = { 0x02, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1366
[C(RESULT_MISS)] = { 0x08, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1376
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1383
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1384
[C(RESULT_ACCESS)] = { 12, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1385
[C(RESULT_MISS)] = { 12, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1387
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1388
[C(RESULT_ACCESS)] = { 12, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1389
[C(RESULT_MISS)] = { 12, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1392
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1393
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1394
[C(RESULT_ACCESS)] = { 10, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1395
[C(RESULT_MISS)] = { 10, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1397
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1398
[C(RESULT_ACCESS)] = { 10, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1399
[C(RESULT_MISS)] = { 10, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1401
[C(OP_PREFETCH)] = {
arch/mips/kernel/perf_event_mipsxx.c
1402
[C(RESULT_ACCESS)] = { 23, CNTR_EVEN, T },
arch/mips/kernel/perf_event_mipsxx.c
1409
[C(LL)] = {
arch/mips/kernel/perf_event_mipsxx.c
1410
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1411
[C(RESULT_ACCESS)] = { 28, CNTR_EVEN, P },
arch/mips/kernel/perf_event_mipsxx.c
1412
[C(RESULT_MISS)] = { 28, CNTR_ODD, P },
arch/mips/kernel/perf_event_mipsxx.c
1414
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1415
[C(RESULT_ACCESS)] = { 28, CNTR_EVEN, P },
arch/mips/kernel/perf_event_mipsxx.c
1416
[C(RESULT_MISS)] = { 28, CNTR_ODD, P },
arch/mips/kernel/perf_event_mipsxx.c
1419
[C(BPU)] = {
arch/mips/kernel/perf_event_mipsxx.c
1421
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1422
[C(RESULT_MISS)] = { 0x02, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1424
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1425
[C(RESULT_MISS)] = { 0x02, CNTR_ODD, T },
arch/mips/kernel/perf_event_mipsxx.c
1434
[C(L1D)] = {
arch/mips/kernel/perf_event_mipsxx.c
1435
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1436
[C(RESULT_ACCESS)] = { 0x2b, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1437
[C(RESULT_MISS)] = { 0x2e, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1439
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1440
[C(RESULT_ACCESS)] = { 0x30, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1443
[C(L1I)] = {
arch/mips/kernel/perf_event_mipsxx.c
1444
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1445
[C(RESULT_ACCESS)] = { 0x18, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1447
[C(OP_PREFETCH)] = {
arch/mips/kernel/perf_event_mipsxx.c
1448
[C(RESULT_ACCESS)] = { 0x19, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1451
[C(DTLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1456
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1457
[C(RESULT_MISS)] = { 0x35, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1459
[C(OP_WRITE)] = {
arch/mips/kernel/perf_event_mipsxx.c
1460
[C(RESULT_MISS)] = { 0x35, CNTR_ALL },
arch/mips/kernel/perf_event_mipsxx.c
1463
[C(ITLB)] = {
arch/mips/kernel/perf_event_mipsxx.c
1464
[C(OP_READ)] = {
arch/mips/kernel/perf_event_mipsxx.c
1465
[C(RESULT_MISS)] = { 0x37, CNTR_ALL },
arch/powerpc/include/asm/cpm1.h
118
#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
arch/powerpc/include/asm/cpm2.h
203
#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
arch/powerpc/math-emu/fmadd.c
16
FP_DECL_D(C);
arch/powerpc/math-emu/fmadd.c
26
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fmadd.c
38
FP_MUL_D(T, A, C);
arch/powerpc/math-emu/fmadds.c
17
FP_DECL_D(C);
arch/powerpc/math-emu/fmadds.c
27
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fmadds.c
39
FP_MUL_D(T, A, C);
arch/powerpc/math-emu/fmsub.c
16
FP_DECL_D(C);
arch/powerpc/math-emu/fmsub.c
26
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fmsub.c
38
FP_MUL_D(T, A, C);
arch/powerpc/math-emu/fmsubs.c
17
FP_DECL_D(C);
arch/powerpc/math-emu/fmsubs.c
27
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fmsubs.c
39
FP_MUL_D(T, A, C);
arch/powerpc/math-emu/fnmadd.c
16
FP_DECL_D(C);
arch/powerpc/math-emu/fnmadd.c
26
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fnmadd.c
38
FP_MUL_D(T, A, C);
arch/powerpc/math-emu/fnmadds.c
17
FP_DECL_D(C);
arch/powerpc/math-emu/fnmadds.c
27
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fnmadds.c
39
FP_MUL_D(T, A, C);
arch/powerpc/math-emu/fnmsub.c
16
FP_DECL_D(C);
arch/powerpc/math-emu/fnmsub.c
26
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fnmsub.c
38
FP_MUL_D(T, A, C);
arch/powerpc/math-emu/fnmsubs.c
17
FP_DECL_D(C);
arch/powerpc/math-emu/fnmsubs.c
27
FP_UNPACK_DP(C, frC);
arch/powerpc/math-emu/fnmsubs.c
39
FP_MUL_D(T, A, C);
arch/powerpc/perf/8xx-pmu.c
26
#define DTLB_LOAD_MISS (C(DTLB) | (C(OP_READ) << 8) | (C(RESULT_MISS) << 16))
arch/powerpc/perf/8xx-pmu.c
27
#define ITLB_LOAD_MISS (C(ITLB) | (C(OP_READ) << 8) | (C(RESULT_MISS) << 16))
arch/powerpc/perf/e500-pmu.c
34
static int e500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/e500-pmu.c
39
[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/e500-pmu.c
40
[C(OP_READ)] = { 27, 0 },
arch/powerpc/perf/e500-pmu.c
41
[C(OP_WRITE)] = { 28, 0 },
arch/powerpc/perf/e500-pmu.c
42
[C(OP_PREFETCH)] = { 29, 0 },
arch/powerpc/perf/e500-pmu.c
44
[C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/e500-pmu.c
45
[C(OP_READ)] = { 2, 60 },
arch/powerpc/perf/e500-pmu.c
46
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e500-pmu.c
47
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/e500-pmu.c
55
[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/e500-pmu.c
56
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/e500-pmu.c
57
[C(OP_WRITE)] = { 0, 0 },
arch/powerpc/perf/e500-pmu.c
58
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/e500-pmu.c
66
[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/e500-pmu.c
67
[C(OP_READ)] = { 26, 66 },
arch/powerpc/perf/e500-pmu.c
68
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e500-pmu.c
69
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/e500-pmu.c
71
[C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/e500-pmu.c
72
[C(OP_READ)] = { 12, 15 },
arch/powerpc/perf/e500-pmu.c
73
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e500-pmu.c
74
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/e500-pmu.c
76
[C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/e500-pmu.c
77
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/e500-pmu.c
78
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e500-pmu.c
79
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
35
static int e6500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/e6500-pmu.c
36
[C(L1D)] = {
arch/powerpc/perf/e6500-pmu.c
38
[C(OP_READ)] = { 27, 222 },
arch/powerpc/perf/e6500-pmu.c
39
[C(OP_WRITE)] = { 28, 223 },
arch/powerpc/perf/e6500-pmu.c
40
[C(OP_PREFETCH)] = { 29, 0 },
arch/powerpc/perf/e6500-pmu.c
42
[C(L1I)] = {
arch/powerpc/perf/e6500-pmu.c
44
[C(OP_READ)] = { 2, 254 },
arch/powerpc/perf/e6500-pmu.c
45
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
46
[C(OP_PREFETCH)] = { 37, 0 },
arch/powerpc/perf/e6500-pmu.c
53
[C(LL)] = {
arch/powerpc/perf/e6500-pmu.c
55
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/e6500-pmu.c
56
[C(OP_WRITE)] = { 0, 0 },
arch/powerpc/perf/e6500-pmu.c
57
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/e6500-pmu.c
65
[C(DTLB)] = {
arch/powerpc/perf/e6500-pmu.c
67
[C(OP_READ)] = { 26, 66 },
arch/powerpc/perf/e6500-pmu.c
68
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
69
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
71
[C(BPU)] = {
arch/powerpc/perf/e6500-pmu.c
73
[C(OP_READ)] = { 12, 15 },
arch/powerpc/perf/e6500-pmu.c
74
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
75
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
77
[C(NODE)] = {
arch/powerpc/perf/e6500-pmu.c
79
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
80
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/e6500-pmu.c
81
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/generic-compat-pmu.c
185
static u64 generic_compat_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/generic-compat-pmu.c
186
[ C(L1D) ] = {
arch/powerpc/perf/generic-compat-pmu.c
187
[ C(OP_READ) ] = {
arch/powerpc/perf/generic-compat-pmu.c
188
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
189
[ C(RESULT_MISS) ] = PM_LD_MISS_L1,
arch/powerpc/perf/generic-compat-pmu.c
191
[ C(OP_WRITE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
192
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
193
[ C(RESULT_MISS) ] = PM_ST_MISS_L1,
arch/powerpc/perf/generic-compat-pmu.c
195
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/generic-compat-pmu.c
196
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
197
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
200
[ C(L1I) ] = {
arch/powerpc/perf/generic-compat-pmu.c
201
[ C(OP_READ) ] = {
arch/powerpc/perf/generic-compat-pmu.c
202
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
203
[ C(RESULT_MISS) ] = PM_L1_ICACHE_MISS,
arch/powerpc/perf/generic-compat-pmu.c
205
[ C(OP_WRITE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
206
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
207
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
209
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/generic-compat-pmu.c
210
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
211
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
214
[ C(LL) ] = {
arch/powerpc/perf/generic-compat-pmu.c
215
[ C(OP_READ) ] = {
arch/powerpc/perf/generic-compat-pmu.c
216
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
217
[ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS,
arch/powerpc/perf/generic-compat-pmu.c
219
[ C(OP_WRITE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
220
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
221
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
223
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/generic-compat-pmu.c
224
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
225
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
228
[ C(DTLB) ] = {
arch/powerpc/perf/generic-compat-pmu.c
229
[ C(OP_READ) ] = {
arch/powerpc/perf/generic-compat-pmu.c
230
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
231
[ C(RESULT_MISS) ] = PM_DTLB_MISS,
arch/powerpc/perf/generic-compat-pmu.c
233
[ C(OP_WRITE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
234
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
235
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
237
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/generic-compat-pmu.c
238
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
239
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
242
[ C(ITLB) ] = {
arch/powerpc/perf/generic-compat-pmu.c
243
[ C(OP_READ) ] = {
arch/powerpc/perf/generic-compat-pmu.c
244
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
245
[ C(RESULT_MISS) ] = PM_ITLB_MISS,
arch/powerpc/perf/generic-compat-pmu.c
247
[ C(OP_WRITE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
248
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
249
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
251
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/generic-compat-pmu.c
252
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
253
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
256
[ C(BPU) ] = {
arch/powerpc/perf/generic-compat-pmu.c
257
[ C(OP_READ) ] = {
arch/powerpc/perf/generic-compat-pmu.c
258
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/generic-compat-pmu.c
259
[ C(RESULT_MISS) ] = PM_BR_MPRED_CMPL,
arch/powerpc/perf/generic-compat-pmu.c
261
[ C(OP_WRITE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
262
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
263
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
265
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/generic-compat-pmu.c
266
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
267
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
270
[ C(NODE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
271
[ C(OP_READ) ] = {
arch/powerpc/perf/generic-compat-pmu.c
272
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
273
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
275
[ C(OP_WRITE) ] = {
arch/powerpc/perf/generic-compat-pmu.c
276
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
277
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
279
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/generic-compat-pmu.c
280
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/generic-compat-pmu.c
281
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/mpc7450-pmu.c
365
static u64 mpc7450_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/mpc7450-pmu.c
366
[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/mpc7450-pmu.c
367
[C(OP_READ)] = { 0, 0x225 },
arch/powerpc/perf/mpc7450-pmu.c
368
[C(OP_WRITE)] = { 0, 0x227 },
arch/powerpc/perf/mpc7450-pmu.c
369
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/mpc7450-pmu.c
371
[C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/mpc7450-pmu.c
372
[C(OP_READ)] = { 0x129, 0x115 },
arch/powerpc/perf/mpc7450-pmu.c
373
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
374
[C(OP_PREFETCH)] = { 0x634, 0 },
arch/powerpc/perf/mpc7450-pmu.c
376
[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/mpc7450-pmu.c
377
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/mpc7450-pmu.c
378
[C(OP_WRITE)] = { 0, 0 },
arch/powerpc/perf/mpc7450-pmu.c
379
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/mpc7450-pmu.c
381
[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/mpc7450-pmu.c
382
[C(OP_READ)] = { 0, 0x312 },
arch/powerpc/perf/mpc7450-pmu.c
383
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
384
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
386
[C(ITLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/mpc7450-pmu.c
387
[C(OP_READ)] = { 0, 0x223 },
arch/powerpc/perf/mpc7450-pmu.c
388
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
389
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
391
[C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/mpc7450-pmu.c
392
[C(OP_READ)] = { 0x122, 0x41c },
arch/powerpc/perf/mpc7450-pmu.c
393
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
394
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
396
[C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/mpc7450-pmu.c
397
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
398
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/mpc7450-pmu.c
399
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power10-pmu.c
358
static u64 power10_cache_events_dd1[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power10-pmu.c
359
[C(L1D)] = {
arch/powerpc/perf/power10-pmu.c
360
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
361
[C(RESULT_ACCESS)] = PM_LD_REF_L1,
arch/powerpc/perf/power10-pmu.c
362
[C(RESULT_MISS)] = PM_LD_MISS_L1,
arch/powerpc/perf/power10-pmu.c
364
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
365
[C(RESULT_ACCESS)] = 0,
arch/powerpc/perf/power10-pmu.c
366
[C(RESULT_MISS)] = PM_ST_MISS_L1,
arch/powerpc/perf/power10-pmu.c
368
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
369
[C(RESULT_ACCESS)] = PM_LD_PREFETCH_CACHE_LINE_MISS,
arch/powerpc/perf/power10-pmu.c
370
[C(RESULT_MISS)] = 0,
arch/powerpc/perf/power10-pmu.c
373
[C(L1I)] = {
arch/powerpc/perf/power10-pmu.c
374
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
375
[C(RESULT_ACCESS)] = PM_INST_FROM_L1,
arch/powerpc/perf/power10-pmu.c
376
[C(RESULT_MISS)] = PM_L1_ICACHE_MISS,
arch/powerpc/perf/power10-pmu.c
378
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
379
[C(RESULT_ACCESS)] = PM_INST_FROM_L1MISS,
arch/powerpc/perf/power10-pmu.c
380
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
382
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
383
[C(RESULT_ACCESS)] = PM_IC_PREF_REQ,
arch/powerpc/perf/power10-pmu.c
384
[C(RESULT_MISS)] = 0,
arch/powerpc/perf/power10-pmu.c
387
[C(LL)] = {
arch/powerpc/perf/power10-pmu.c
388
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
389
[C(RESULT_ACCESS)] = PM_DATA_FROM_L3,
arch/powerpc/perf/power10-pmu.c
390
[C(RESULT_MISS)] = PM_DATA_FROM_L3MISS,
arch/powerpc/perf/power10-pmu.c
392
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
393
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
394
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
396
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
397
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
398
[C(RESULT_MISS)] = 0,
arch/powerpc/perf/power10-pmu.c
401
[C(DTLB)] = {
arch/powerpc/perf/power10-pmu.c
402
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
403
[C(RESULT_ACCESS)] = 0,
arch/powerpc/perf/power10-pmu.c
404
[C(RESULT_MISS)] = PM_DTLB_MISS,
arch/powerpc/perf/power10-pmu.c
406
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
407
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
408
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
410
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
411
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
412
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
415
[C(ITLB)] = {
arch/powerpc/perf/power10-pmu.c
416
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
417
[C(RESULT_ACCESS)] = 0,
arch/powerpc/perf/power10-pmu.c
418
[C(RESULT_MISS)] = PM_ITLB_MISS,
arch/powerpc/perf/power10-pmu.c
420
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
421
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
422
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
424
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
425
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
426
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
429
[C(BPU)] = {
arch/powerpc/perf/power10-pmu.c
430
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
431
[C(RESULT_ACCESS)] = PM_BR_CMPL,
arch/powerpc/perf/power10-pmu.c
432
[C(RESULT_MISS)] = PM_BR_MPRED_CMPL,
arch/powerpc/perf/power10-pmu.c
434
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
435
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
436
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
438
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
439
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
440
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
443
[C(NODE)] = {
arch/powerpc/perf/power10-pmu.c
444
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
445
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
446
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
448
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
449
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
450
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
452
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
453
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
454
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
459
static u64 power10_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power10-pmu.c
460
[C(L1D)] = {
arch/powerpc/perf/power10-pmu.c
461
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
462
[C(RESULT_ACCESS)] = PM_LD_REF_L1,
arch/powerpc/perf/power10-pmu.c
463
[C(RESULT_MISS)] = PM_LD_MISS_L1,
arch/powerpc/perf/power10-pmu.c
465
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
466
[C(RESULT_ACCESS)] = 0,
arch/powerpc/perf/power10-pmu.c
467
[C(RESULT_MISS)] = PM_ST_MISS_L1,
arch/powerpc/perf/power10-pmu.c
469
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
470
[C(RESULT_ACCESS)] = PM_LD_PREFETCH_CACHE_LINE_MISS,
arch/powerpc/perf/power10-pmu.c
471
[C(RESULT_MISS)] = 0,
arch/powerpc/perf/power10-pmu.c
474
[C(L1I)] = {
arch/powerpc/perf/power10-pmu.c
475
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
476
[C(RESULT_ACCESS)] = PM_INST_FROM_L1,
arch/powerpc/perf/power10-pmu.c
477
[C(RESULT_MISS)] = PM_L1_ICACHE_MISS,
arch/powerpc/perf/power10-pmu.c
479
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
480
[C(RESULT_ACCESS)] = PM_INST_FROM_L1MISS,
arch/powerpc/perf/power10-pmu.c
481
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
483
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
484
[C(RESULT_ACCESS)] = PM_IC_PREF_REQ,
arch/powerpc/perf/power10-pmu.c
485
[C(RESULT_MISS)] = 0,
arch/powerpc/perf/power10-pmu.c
488
[C(LL)] = {
arch/powerpc/perf/power10-pmu.c
489
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
490
[C(RESULT_ACCESS)] = PM_DATA_FROM_L3,
arch/powerpc/perf/power10-pmu.c
491
[C(RESULT_MISS)] = PM_DATA_FROM_L3MISS,
arch/powerpc/perf/power10-pmu.c
493
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
494
[C(RESULT_ACCESS)] = PM_L2_ST,
arch/powerpc/perf/power10-pmu.c
495
[C(RESULT_MISS)] = PM_L2_ST_MISS,
arch/powerpc/perf/power10-pmu.c
497
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
498
[C(RESULT_ACCESS)] = PM_L3_PF_MISS_L3,
arch/powerpc/perf/power10-pmu.c
499
[C(RESULT_MISS)] = 0,
arch/powerpc/perf/power10-pmu.c
502
[C(DTLB)] = {
arch/powerpc/perf/power10-pmu.c
503
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
504
[C(RESULT_ACCESS)] = 0,
arch/powerpc/perf/power10-pmu.c
505
[C(RESULT_MISS)] = PM_DTLB_MISS,
arch/powerpc/perf/power10-pmu.c
507
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
508
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
509
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
511
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
512
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
513
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
516
[C(ITLB)] = {
arch/powerpc/perf/power10-pmu.c
517
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
518
[C(RESULT_ACCESS)] = 0,
arch/powerpc/perf/power10-pmu.c
519
[C(RESULT_MISS)] = PM_ITLB_MISS,
arch/powerpc/perf/power10-pmu.c
521
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
522
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
523
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
525
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
526
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
527
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
530
[C(BPU)] = {
arch/powerpc/perf/power10-pmu.c
531
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
532
[C(RESULT_ACCESS)] = PM_BR_CMPL,
arch/powerpc/perf/power10-pmu.c
533
[C(RESULT_MISS)] = PM_BR_MPRED_CMPL,
arch/powerpc/perf/power10-pmu.c
535
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
536
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
537
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
539
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
540
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
541
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
544
[C(NODE)] = {
arch/powerpc/perf/power10-pmu.c
545
[C(OP_READ)] = {
arch/powerpc/perf/power10-pmu.c
546
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
547
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
549
[C(OP_WRITE)] = {
arch/powerpc/perf/power10-pmu.c
550
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
551
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power10-pmu.c
553
[C(OP_PREFETCH)] = {
arch/powerpc/perf/power10-pmu.c
554
[C(RESULT_ACCESS)] = -1,
arch/powerpc/perf/power10-pmu.c
555
[C(RESULT_MISS)] = -1,
arch/powerpc/perf/power5+-pmu.c
625
static u64 power5p_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power5+-pmu.c
626
[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5+-pmu.c
627
[C(OP_READ)] = { 0x1c10a8, 0x3c1088 },
arch/powerpc/perf/power5+-pmu.c
628
[C(OP_WRITE)] = { 0x2c10a8, 0xc10c3 },
arch/powerpc/perf/power5+-pmu.c
629
[C(OP_PREFETCH)] = { 0xc70e7, -1 },
arch/powerpc/perf/power5+-pmu.c
631
[C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5+-pmu.c
632
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/power5+-pmu.c
633
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
634
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/power5+-pmu.c
636
[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5+-pmu.c
637
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/power5+-pmu.c
638
[C(OP_WRITE)] = { 0, 0 },
arch/powerpc/perf/power5+-pmu.c
639
[C(OP_PREFETCH)] = { 0xc50c3, 0 },
arch/powerpc/perf/power5+-pmu.c
641
[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5+-pmu.c
642
[C(OP_READ)] = { 0xc20e4, 0x800c4 },
arch/powerpc/perf/power5+-pmu.c
643
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
644
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
646
[C(ITLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5+-pmu.c
647
[C(OP_READ)] = { 0, 0x800c0 },
arch/powerpc/perf/power5+-pmu.c
648
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
649
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
651
[C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5+-pmu.c
652
[C(OP_READ)] = { 0x230e4, 0x230e5 },
arch/powerpc/perf/power5+-pmu.c
653
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
654
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
656
[C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5+-pmu.c
657
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
658
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5+-pmu.c
659
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
567
static u64 power5_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power5-pmu.c
568
[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5-pmu.c
569
[C(OP_READ)] = { 0x4c1090, 0x3c1088 },
arch/powerpc/perf/power5-pmu.c
570
[C(OP_WRITE)] = { 0x3c1090, 0xc10c3 },
arch/powerpc/perf/power5-pmu.c
571
[C(OP_PREFETCH)] = { 0xc70e7, 0 },
arch/powerpc/perf/power5-pmu.c
573
[C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5-pmu.c
574
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/power5-pmu.c
575
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
576
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/power5-pmu.c
578
[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5-pmu.c
579
[C(OP_READ)] = { 0, 0x3c309b },
arch/powerpc/perf/power5-pmu.c
580
[C(OP_WRITE)] = { 0, 0 },
arch/powerpc/perf/power5-pmu.c
581
[C(OP_PREFETCH)] = { 0xc50c3, 0 },
arch/powerpc/perf/power5-pmu.c
583
[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5-pmu.c
584
[C(OP_READ)] = { 0x2c4090, 0x800c4 },
arch/powerpc/perf/power5-pmu.c
585
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
586
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
588
[C(ITLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5-pmu.c
589
[C(OP_READ)] = { 0, 0x800c0 },
arch/powerpc/perf/power5-pmu.c
590
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
591
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
593
[C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5-pmu.c
594
[C(OP_READ)] = { 0x230e4, 0x230e5 },
arch/powerpc/perf/power5-pmu.c
595
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
596
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
598
[C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power5-pmu.c
599
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
600
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power5-pmu.c
601
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
499
static u64 power6_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power6-pmu.c
500
[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power6-pmu.c
501
[C(OP_READ)] = { 0x280030, 0x80080 },
arch/powerpc/perf/power6-pmu.c
502
[C(OP_WRITE)] = { 0x180032, 0x80088 },
arch/powerpc/perf/power6-pmu.c
503
[C(OP_PREFETCH)] = { 0x810a4, 0 },
arch/powerpc/perf/power6-pmu.c
505
[C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power6-pmu.c
506
[C(OP_READ)] = { 0, 0x100056 },
arch/powerpc/perf/power6-pmu.c
507
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
508
[C(OP_PREFETCH)] = { 0x4008c, 0 },
arch/powerpc/perf/power6-pmu.c
510
[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power6-pmu.c
511
[C(OP_READ)] = { 0x150730, 0x250532 },
arch/powerpc/perf/power6-pmu.c
512
[C(OP_WRITE)] = { 0x250432, 0x150432 },
arch/powerpc/perf/power6-pmu.c
513
[C(OP_PREFETCH)] = { 0x810a6, 0 },
arch/powerpc/perf/power6-pmu.c
515
[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power6-pmu.c
516
[C(OP_READ)] = { 0, 0x20000e },
arch/powerpc/perf/power6-pmu.c
517
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
518
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
520
[C(ITLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power6-pmu.c
521
[C(OP_READ)] = { 0, 0x420ce },
arch/powerpc/perf/power6-pmu.c
522
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
523
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
525
[C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power6-pmu.c
526
[C(OP_READ)] = { 0x430e6, 0x400052 },
arch/powerpc/perf/power6-pmu.c
527
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
528
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
530
[C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power6-pmu.c
531
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
532
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power6-pmu.c
533
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
339
static u64 power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power7-pmu.c
340
[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power7-pmu.c
341
[C(OP_READ)] = { 0xc880, 0x400f0 },
arch/powerpc/perf/power7-pmu.c
342
[C(OP_WRITE)] = { 0, 0x300f0 },
arch/powerpc/perf/power7-pmu.c
343
[C(OP_PREFETCH)] = { 0xd8b8, 0 },
arch/powerpc/perf/power7-pmu.c
345
[C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power7-pmu.c
346
[C(OP_READ)] = { 0, 0x200fc },
arch/powerpc/perf/power7-pmu.c
347
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
348
[C(OP_PREFETCH)] = { 0x408a, 0 },
arch/powerpc/perf/power7-pmu.c
350
[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power7-pmu.c
351
[C(OP_READ)] = { 0x16080, 0x26080 },
arch/powerpc/perf/power7-pmu.c
352
[C(OP_WRITE)] = { 0x16082, 0x26082 },
arch/powerpc/perf/power7-pmu.c
353
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/power7-pmu.c
355
[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power7-pmu.c
356
[C(OP_READ)] = { 0, 0x300fc },
arch/powerpc/perf/power7-pmu.c
357
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
358
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
360
[C(ITLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power7-pmu.c
361
[C(OP_READ)] = { 0, 0x400fc },
arch/powerpc/perf/power7-pmu.c
362
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
363
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
365
[C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power7-pmu.c
366
[C(OP_READ)] = { 0x10068, 0x400f6 },
arch/powerpc/perf/power7-pmu.c
367
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
368
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
370
[C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/power7-pmu.c
371
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
372
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/power7-pmu.c
373
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/power8-pmu.c
266
static u64 power8_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power8-pmu.c
267
[ C(L1D) ] = {
arch/powerpc/perf/power8-pmu.c
268
[ C(OP_READ) ] = {
arch/powerpc/perf/power8-pmu.c
269
[ C(RESULT_ACCESS) ] = PM_LD_REF_L1,
arch/powerpc/perf/power8-pmu.c
270
[ C(RESULT_MISS) ] = PM_LD_MISS_L1,
arch/powerpc/perf/power8-pmu.c
272
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power8-pmu.c
273
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/power8-pmu.c
274
[ C(RESULT_MISS) ] = PM_ST_MISS_L1,
arch/powerpc/perf/power8-pmu.c
276
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power8-pmu.c
277
[ C(RESULT_ACCESS) ] = PM_L1_PREF,
arch/powerpc/perf/power8-pmu.c
278
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/power8-pmu.c
281
[ C(L1I) ] = {
arch/powerpc/perf/power8-pmu.c
282
[ C(OP_READ) ] = {
arch/powerpc/perf/power8-pmu.c
283
[ C(RESULT_ACCESS) ] = PM_INST_FROM_L1,
arch/powerpc/perf/power8-pmu.c
284
[ C(RESULT_MISS) ] = PM_L1_ICACHE_MISS,
arch/powerpc/perf/power8-pmu.c
286
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power8-pmu.c
287
[ C(RESULT_ACCESS) ] = PM_L1_DEMAND_WRITE,
arch/powerpc/perf/power8-pmu.c
288
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
290
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power8-pmu.c
291
[ C(RESULT_ACCESS) ] = PM_IC_PREF_WRITE,
arch/powerpc/perf/power8-pmu.c
292
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/power8-pmu.c
295
[ C(LL) ] = {
arch/powerpc/perf/power8-pmu.c
296
[ C(OP_READ) ] = {
arch/powerpc/perf/power8-pmu.c
297
[ C(RESULT_ACCESS) ] = PM_DATA_FROM_L3,
arch/powerpc/perf/power8-pmu.c
298
[ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS,
arch/powerpc/perf/power8-pmu.c
300
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power8-pmu.c
301
[ C(RESULT_ACCESS) ] = PM_L2_ST,
arch/powerpc/perf/power8-pmu.c
302
[ C(RESULT_MISS) ] = PM_L2_ST_MISS,
arch/powerpc/perf/power8-pmu.c
304
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power8-pmu.c
305
[ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL,
arch/powerpc/perf/power8-pmu.c
306
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/power8-pmu.c
309
[ C(DTLB) ] = {
arch/powerpc/perf/power8-pmu.c
310
[ C(OP_READ) ] = {
arch/powerpc/perf/power8-pmu.c
311
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/power8-pmu.c
312
[ C(RESULT_MISS) ] = PM_DTLB_MISS,
arch/powerpc/perf/power8-pmu.c
314
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power8-pmu.c
315
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
316
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
318
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power8-pmu.c
319
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
320
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
323
[ C(ITLB) ] = {
arch/powerpc/perf/power8-pmu.c
324
[ C(OP_READ) ] = {
arch/powerpc/perf/power8-pmu.c
325
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/power8-pmu.c
326
[ C(RESULT_MISS) ] = PM_ITLB_MISS,
arch/powerpc/perf/power8-pmu.c
328
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power8-pmu.c
329
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
330
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
332
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power8-pmu.c
333
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
334
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
337
[ C(BPU) ] = {
arch/powerpc/perf/power8-pmu.c
338
[ C(OP_READ) ] = {
arch/powerpc/perf/power8-pmu.c
339
[ C(RESULT_ACCESS) ] = PM_BRU_FIN,
arch/powerpc/perf/power8-pmu.c
340
[ C(RESULT_MISS) ] = PM_BR_MPRED_CMPL,
arch/powerpc/perf/power8-pmu.c
342
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power8-pmu.c
343
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
344
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
346
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power8-pmu.c
347
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
348
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
351
[ C(NODE) ] = {
arch/powerpc/perf/power8-pmu.c
352
[ C(OP_READ) ] = {
arch/powerpc/perf/power8-pmu.c
353
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
354
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
356
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power8-pmu.c
357
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
358
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power8-pmu.c
360
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power8-pmu.c
361
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power8-pmu.c
362
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
337
static u64 power9_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/power9-pmu.c
338
[ C(L1D) ] = {
arch/powerpc/perf/power9-pmu.c
339
[ C(OP_READ) ] = {
arch/powerpc/perf/power9-pmu.c
340
[ C(RESULT_ACCESS) ] = PM_LD_REF_L1,
arch/powerpc/perf/power9-pmu.c
341
[ C(RESULT_MISS) ] = PM_LD_MISS_L1_FIN,
arch/powerpc/perf/power9-pmu.c
343
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power9-pmu.c
344
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/power9-pmu.c
345
[ C(RESULT_MISS) ] = PM_ST_MISS_L1,
arch/powerpc/perf/power9-pmu.c
347
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power9-pmu.c
348
[ C(RESULT_ACCESS) ] = PM_L1_PREF,
arch/powerpc/perf/power9-pmu.c
349
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/power9-pmu.c
352
[ C(L1I) ] = {
arch/powerpc/perf/power9-pmu.c
353
[ C(OP_READ) ] = {
arch/powerpc/perf/power9-pmu.c
354
[ C(RESULT_ACCESS) ] = PM_INST_FROM_L1,
arch/powerpc/perf/power9-pmu.c
355
[ C(RESULT_MISS) ] = PM_L1_ICACHE_MISS,
arch/powerpc/perf/power9-pmu.c
357
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power9-pmu.c
358
[ C(RESULT_ACCESS) ] = PM_L1_DEMAND_WRITE,
arch/powerpc/perf/power9-pmu.c
359
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
361
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power9-pmu.c
362
[ C(RESULT_ACCESS) ] = PM_IC_PREF_WRITE,
arch/powerpc/perf/power9-pmu.c
363
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/power9-pmu.c
366
[ C(LL) ] = {
arch/powerpc/perf/power9-pmu.c
367
[ C(OP_READ) ] = {
arch/powerpc/perf/power9-pmu.c
368
[ C(RESULT_ACCESS) ] = PM_DATA_FROM_L3,
arch/powerpc/perf/power9-pmu.c
369
[ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS,
arch/powerpc/perf/power9-pmu.c
371
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power9-pmu.c
372
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/power9-pmu.c
373
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/power9-pmu.c
375
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power9-pmu.c
376
[ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL,
arch/powerpc/perf/power9-pmu.c
377
[ C(RESULT_MISS) ] = 0,
arch/powerpc/perf/power9-pmu.c
380
[ C(DTLB) ] = {
arch/powerpc/perf/power9-pmu.c
381
[ C(OP_READ) ] = {
arch/powerpc/perf/power9-pmu.c
382
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/power9-pmu.c
383
[ C(RESULT_MISS) ] = PM_DTLB_MISS,
arch/powerpc/perf/power9-pmu.c
385
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power9-pmu.c
386
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
387
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
389
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power9-pmu.c
390
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
391
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
394
[ C(ITLB) ] = {
arch/powerpc/perf/power9-pmu.c
395
[ C(OP_READ) ] = {
arch/powerpc/perf/power9-pmu.c
396
[ C(RESULT_ACCESS) ] = 0,
arch/powerpc/perf/power9-pmu.c
397
[ C(RESULT_MISS) ] = PM_ITLB_MISS,
arch/powerpc/perf/power9-pmu.c
399
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power9-pmu.c
400
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
401
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
403
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power9-pmu.c
404
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
405
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
408
[ C(BPU) ] = {
arch/powerpc/perf/power9-pmu.c
409
[ C(OP_READ) ] = {
arch/powerpc/perf/power9-pmu.c
410
[ C(RESULT_ACCESS) ] = PM_BR_CMPL,
arch/powerpc/perf/power9-pmu.c
411
[ C(RESULT_MISS) ] = PM_BR_MPRED_CMPL,
arch/powerpc/perf/power9-pmu.c
413
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power9-pmu.c
414
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
415
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
417
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power9-pmu.c
418
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
419
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
422
[ C(NODE) ] = {
arch/powerpc/perf/power9-pmu.c
423
[ C(OP_READ) ] = {
arch/powerpc/perf/power9-pmu.c
424
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
425
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
427
[ C(OP_WRITE) ] = {
arch/powerpc/perf/power9-pmu.c
428
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
429
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/power9-pmu.c
431
[ C(OP_PREFETCH) ] = {
arch/powerpc/perf/power9-pmu.c
432
[ C(RESULT_ACCESS) ] = -1,
arch/powerpc/perf/power9-pmu.c
433
[ C(RESULT_MISS) ] = -1,
arch/powerpc/perf/ppc970-pmu.c
438
static u64 ppc970_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
arch/powerpc/perf/ppc970-pmu.c
439
[C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/ppc970-pmu.c
440
[C(OP_READ)] = { 0x8810, 0x3810 },
arch/powerpc/perf/ppc970-pmu.c
441
[C(OP_WRITE)] = { 0x7810, 0x813 },
arch/powerpc/perf/ppc970-pmu.c
442
[C(OP_PREFETCH)] = { 0x731, 0 },
arch/powerpc/perf/ppc970-pmu.c
444
[C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/ppc970-pmu.c
445
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/ppc970-pmu.c
446
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
447
[C(OP_PREFETCH)] = { 0, 0 },
arch/powerpc/perf/ppc970-pmu.c
449
[C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/ppc970-pmu.c
450
[C(OP_READ)] = { 0, 0 },
arch/powerpc/perf/ppc970-pmu.c
451
[C(OP_WRITE)] = { 0, 0 },
arch/powerpc/perf/ppc970-pmu.c
452
[C(OP_PREFETCH)] = { 0x733, 0 },
arch/powerpc/perf/ppc970-pmu.c
454
[C(DTLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/ppc970-pmu.c
455
[C(OP_READ)] = { 0, 0x704 },
arch/powerpc/perf/ppc970-pmu.c
456
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
457
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
459
[C(ITLB)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/ppc970-pmu.c
460
[C(OP_READ)] = { 0, 0x700 },
arch/powerpc/perf/ppc970-pmu.c
461
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
462
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
464
[C(BPU)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/ppc970-pmu.c
465
[C(OP_READ)] = { 0x431, 0x327 },
arch/powerpc/perf/ppc970-pmu.c
466
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
467
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
469
[C(NODE)] = { /* RESULT_ACCESS RESULT_MISS */
arch/powerpc/perf/ppc970-pmu.c
470
[C(OP_READ)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
471
[C(OP_WRITE)] = { -1, -1 },
arch/powerpc/perf/ppc970-pmu.c
472
[C(OP_PREFETCH)] = { -1, -1 },
arch/powerpc/xmon/ppc-opc.c
2413
#define C_MASK C(0xffff)
arch/powerpc/xmon/ppc-opc.c
6977
{"se_illegal", C(0), C_MASK, PPCVLE, 0, {}},
arch/powerpc/xmon/ppc-opc.c
6978
{"se_isync", C(1), C_MASK, PPCVLE, 0, {}},
arch/powerpc/xmon/ppc-opc.c
6979
{"se_sc", C(2), C_MASK, PPCVLE, 0, {}},
arch/powerpc/xmon/ppc-opc.c
6984
{"se_rfi", C(8), C_MASK, PPCVLE, 0, {}},
arch/powerpc/xmon/ppc-opc.c
6985
{"se_rfci", C(9), C_MASK, PPCVLE, 0, {}},
arch/powerpc/xmon/ppc-opc.c
6986
{"se_rfdi", C(10), C_MASK, PPCVLE, 0, {}},
arch/powerpc/xmon/ppc-opc.c
6987
{"se_rfmci", C(11), C_MASK, PPCRFMCI|PPCVLE, 0, {}},
arch/s390/boot/kaslr.c
23
u8 C[112];
arch/s390/crypto/prng.c
342
|| memcmp(ws.C, C0, sizeof(C0)) != 0) {
arch/s390/crypto/prng.c
90
u8 C[112];
arch/sh/kernel/cpu/sh4/perf_event.c
100
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
101
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
102
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
106
[ C(L1I) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
107
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
108
[ C(RESULT_ACCESS) ] = 0x0006,
arch/sh/kernel/cpu/sh4/perf_event.c
109
[ C(RESULT_MISS) ] = 0x0008,
arch/sh/kernel/cpu/sh4/perf_event.c
111
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
112
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
113
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
115
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
116
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
117
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
121
[ C(LL) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
122
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
123
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
124
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
126
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
127
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
128
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
130
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
131
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
132
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
136
[ C(DTLB) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
137
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
138
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
139
[ C(RESULT_MISS) ] = 0x0003,
arch/sh/kernel/cpu/sh4/perf_event.c
141
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
142
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
143
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
145
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
146
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
147
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
151
[ C(ITLB) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
152
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
153
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4/perf_event.c
154
[ C(RESULT_MISS) ] = 0x0007,
arch/sh/kernel/cpu/sh4/perf_event.c
156
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
157
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
158
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
160
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
161
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
162
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
166
[ C(BPU) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
167
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
168
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
169
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
171
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
172
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
173
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
175
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
176
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
177
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
181
[ C(NODE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
182
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
183
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
184
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
186
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
187
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
188
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
190
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
191
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
192
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4/perf_event.c
91
[ C(L1D) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
92
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
93
[ C(RESULT_ACCESS) ] = 0x0001,
arch/sh/kernel/cpu/sh4/perf_event.c
94
[ C(RESULT_MISS) ] = 0x0004,
arch/sh/kernel/cpu/sh4/perf_event.c
96
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4/perf_event.c
97
[ C(RESULT_ACCESS) ] = 0x0002,
arch/sh/kernel/cpu/sh4/perf_event.c
98
[ C(RESULT_MISS) ] = 0x0005,
arch/sh/kernel/cpu/sh4a/perf_event.c
116
[ C(L1D) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
117
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
118
[ C(RESULT_ACCESS) ] = 0x0031,
arch/sh/kernel/cpu/sh4a/perf_event.c
119
[ C(RESULT_MISS) ] = 0x0032,
arch/sh/kernel/cpu/sh4a/perf_event.c
121
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
122
[ C(RESULT_ACCESS) ] = 0x0039,
arch/sh/kernel/cpu/sh4a/perf_event.c
123
[ C(RESULT_MISS) ] = 0x003a,
arch/sh/kernel/cpu/sh4a/perf_event.c
125
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
126
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
127
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
131
[ C(L1I) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
132
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
133
[ C(RESULT_ACCESS) ] = 0x0029,
arch/sh/kernel/cpu/sh4a/perf_event.c
134
[ C(RESULT_MISS) ] = 0x002a,
arch/sh/kernel/cpu/sh4a/perf_event.c
136
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
137
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
138
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
140
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
141
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
142
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
146
[ C(LL) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
147
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
148
[ C(RESULT_ACCESS) ] = 0x0030,
arch/sh/kernel/cpu/sh4a/perf_event.c
149
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
151
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
152
[ C(RESULT_ACCESS) ] = 0x0038,
arch/sh/kernel/cpu/sh4a/perf_event.c
153
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
155
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
156
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
157
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
161
[ C(DTLB) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
162
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
163
[ C(RESULT_ACCESS) ] = 0x0222,
arch/sh/kernel/cpu/sh4a/perf_event.c
164
[ C(RESULT_MISS) ] = 0x0220,
arch/sh/kernel/cpu/sh4a/perf_event.c
166
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
167
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
168
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
170
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
171
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
172
[ C(RESULT_MISS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
176
[ C(ITLB) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
177
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
178
[ C(RESULT_ACCESS) ] = 0,
arch/sh/kernel/cpu/sh4a/perf_event.c
179
[ C(RESULT_MISS) ] = 0x02a0,
arch/sh/kernel/cpu/sh4a/perf_event.c
181
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
182
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
183
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
185
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
186
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
187
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
191
[ C(BPU) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
192
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
193
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
194
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
196
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
197
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
198
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
200
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
201
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
202
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
206
[ C(NODE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
207
[ C(OP_READ) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
208
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
209
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
211
[ C(OP_WRITE) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
212
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
213
[ C(RESULT_MISS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
215
[ C(OP_PREFETCH) ] = {
arch/sh/kernel/cpu/sh4a/perf_event.c
216
[ C(RESULT_ACCESS) ] = -1,
arch/sh/kernel/cpu/sh4a/perf_event.c
217
[ C(RESULT_MISS) ] = -1,
arch/sparc/kernel/perf_event.c
221
[C(L1D)] = {
arch/sparc/kernel/perf_event.c
222
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
223
[C(RESULT_ACCESS)] = { 0x09, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
224
[C(RESULT_MISS)] = { 0x09, PIC_UPPER, },
arch/sparc/kernel/perf_event.c
226
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
227
[C(RESULT_ACCESS)] = { 0x0a, PIC_LOWER },
arch/sparc/kernel/perf_event.c
228
[C(RESULT_MISS)] = { 0x0a, PIC_UPPER },
arch/sparc/kernel/perf_event.c
230
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
231
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
232
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
235
[C(L1I)] = {
arch/sparc/kernel/perf_event.c
236
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
237
[C(RESULT_ACCESS)] = { 0x09, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
238
[C(RESULT_MISS)] = { 0x09, PIC_UPPER, },
arch/sparc/kernel/perf_event.c
240
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
241
[ C(RESULT_ACCESS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
242
[ C(RESULT_MISS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
244
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
245
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
246
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
249
[C(LL)] = {
arch/sparc/kernel/perf_event.c
250
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
251
[C(RESULT_ACCESS)] = { 0x0c, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
252
[C(RESULT_MISS)] = { 0x0c, PIC_UPPER, },
arch/sparc/kernel/perf_event.c
254
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
255
[C(RESULT_ACCESS)] = { 0x0c, PIC_LOWER },
arch/sparc/kernel/perf_event.c
256
[C(RESULT_MISS)] = { 0x0c, PIC_UPPER },
arch/sparc/kernel/perf_event.c
258
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
259
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
260
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
263
[C(DTLB)] = {
arch/sparc/kernel/perf_event.c
264
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
265
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
266
[C(RESULT_MISS)] = { 0x12, PIC_UPPER, },
arch/sparc/kernel/perf_event.c
268
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
269
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
270
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
272
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
273
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
274
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
277
[C(ITLB)] = {
arch/sparc/kernel/perf_event.c
278
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
279
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
280
[C(RESULT_MISS)] = { 0x11, PIC_UPPER, },
arch/sparc/kernel/perf_event.c
282
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
283
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
284
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
286
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
287
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
288
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
291
[C(BPU)] = {
arch/sparc/kernel/perf_event.c
292
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
293
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
294
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
296
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
297
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
298
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
300
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
301
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
302
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
305
[C(NODE)] = {
arch/sparc/kernel/perf_event.c
306
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
307
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
308
[C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
310
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
311
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
312
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
314
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
315
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
316
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
359
[C(L1D)] = {
arch/sparc/kernel/perf_event.c
360
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
361
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
362
[C(RESULT_MISS)] = { 0x03, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
364
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
365
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
366
[C(RESULT_MISS)] = { 0x03, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
368
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
369
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
370
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
373
[C(L1I)] = {
arch/sparc/kernel/perf_event.c
374
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
375
[C(RESULT_ACCESS)] = { 0x00, PIC_UPPER },
arch/sparc/kernel/perf_event.c
376
[C(RESULT_MISS)] = { 0x02, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
378
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
379
[ C(RESULT_ACCESS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
380
[ C(RESULT_MISS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
382
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
383
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
384
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
387
[C(LL)] = {
arch/sparc/kernel/perf_event.c
388
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
389
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
390
[C(RESULT_MISS)] = { 0x07, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
392
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
393
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
394
[C(RESULT_MISS)] = { 0x07, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
396
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
397
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
398
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
401
[C(DTLB)] = {
arch/sparc/kernel/perf_event.c
402
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
403
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
404
[C(RESULT_MISS)] = { 0x05, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
406
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
407
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
408
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
410
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
411
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
412
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
415
[C(ITLB)] = {
arch/sparc/kernel/perf_event.c
416
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
417
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
418
[C(RESULT_MISS)] = { 0x04, PIC_LOWER, },
arch/sparc/kernel/perf_event.c
420
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
421
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
422
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
424
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
425
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
426
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
429
[C(BPU)] = {
arch/sparc/kernel/perf_event.c
430
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
431
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
432
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
434
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
435
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
436
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
438
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
439
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
440
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
443
[C(NODE)] = {
arch/sparc/kernel/perf_event.c
444
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
445
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
446
[C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
448
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
449
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
450
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
452
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
453
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
454
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
494
[C(L1D)] = {
arch/sparc/kernel/perf_event.c
495
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
496
[C(RESULT_ACCESS)] = { 0x0208, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
497
[C(RESULT_MISS)] = { 0x0302, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
499
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
500
[C(RESULT_ACCESS)] = { 0x0210, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
501
[C(RESULT_MISS)] = { 0x0302, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
503
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
504
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
505
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
508
[C(L1I)] = {
arch/sparc/kernel/perf_event.c
509
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
510
[C(RESULT_ACCESS)] = { 0x02ff, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
511
[C(RESULT_MISS)] = { 0x0301, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
513
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
514
[ C(RESULT_ACCESS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
515
[ C(RESULT_MISS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
517
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
518
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
519
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
522
[C(LL)] = {
arch/sparc/kernel/perf_event.c
523
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
524
[C(RESULT_ACCESS)] = { 0x0208, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
525
[C(RESULT_MISS)] = { 0x0330, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
527
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
528
[C(RESULT_ACCESS)] = { 0x0210, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
529
[C(RESULT_MISS)] = { 0x0320, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
531
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
532
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
533
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
536
[C(DTLB)] = {
arch/sparc/kernel/perf_event.c
537
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
538
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
539
[C(RESULT_MISS)] = { 0x0b08, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
541
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
542
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
543
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
545
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
546
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
547
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
550
[C(ITLB)] = {
arch/sparc/kernel/perf_event.c
551
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
552
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
553
[C(RESULT_MISS)] = { 0xb04, PIC_UPPER | PIC_LOWER, },
arch/sparc/kernel/perf_event.c
555
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
556
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
557
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
559
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
560
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
561
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
564
[C(BPU)] = {
arch/sparc/kernel/perf_event.c
565
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
566
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
567
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
569
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
570
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
571
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
573
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
574
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
575
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
578
[C(NODE)] = {
arch/sparc/kernel/perf_event.c
579
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
580
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
581
[C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
583
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
584
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
585
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
587
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
588
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
589
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
631
[C(L1D)] = {
arch/sparc/kernel/perf_event.c
632
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
633
[C(RESULT_ACCESS)] = { (3 << 6) | 0x04 },
arch/sparc/kernel/perf_event.c
634
[C(RESULT_MISS)] = { (16 << 6) | 0x07 },
arch/sparc/kernel/perf_event.c
636
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
637
[C(RESULT_ACCESS)] = { (3 << 6) | 0x08 },
arch/sparc/kernel/perf_event.c
638
[C(RESULT_MISS)] = { (16 << 6) | 0x07 },
arch/sparc/kernel/perf_event.c
640
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
641
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
642
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
645
[C(L1I)] = {
arch/sparc/kernel/perf_event.c
646
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
647
[C(RESULT_ACCESS)] = { (3 << 6) | 0x3f },
arch/sparc/kernel/perf_event.c
648
[C(RESULT_MISS)] = { (11 << 6) | 0x03 },
arch/sparc/kernel/perf_event.c
650
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
651
[ C(RESULT_ACCESS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
652
[ C(RESULT_MISS) ] = { CACHE_OP_NONSENSE },
arch/sparc/kernel/perf_event.c
654
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
655
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
656
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
659
[C(LL)] = {
arch/sparc/kernel/perf_event.c
660
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
661
[C(RESULT_ACCESS)] = { (3 << 6) | 0x04 },
arch/sparc/kernel/perf_event.c
662
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
664
[C(OP_WRITE)] = {
arch/sparc/kernel/perf_event.c
665
[C(RESULT_ACCESS)] = { (3 << 6) | 0x08 },
arch/sparc/kernel/perf_event.c
666
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
668
[C(OP_PREFETCH)] = {
arch/sparc/kernel/perf_event.c
669
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
670
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
673
[C(DTLB)] = {
arch/sparc/kernel/perf_event.c
674
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
675
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
676
[C(RESULT_MISS)] = { (17 << 6) | 0x3f },
arch/sparc/kernel/perf_event.c
678
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
679
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
680
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
682
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
683
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
684
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
687
[C(ITLB)] = {
arch/sparc/kernel/perf_event.c
688
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
689
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
690
[C(RESULT_MISS)] = { (6 << 6) | 0x3f },
arch/sparc/kernel/perf_event.c
692
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
693
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
694
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
696
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
697
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
698
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
701
[C(BPU)] = {
arch/sparc/kernel/perf_event.c
702
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
703
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
704
[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
706
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
707
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
708
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
710
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
711
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
712
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
715
[C(NODE)] = {
arch/sparc/kernel/perf_event.c
716
[C(OP_READ)] = {
arch/sparc/kernel/perf_event.c
717
[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
718
[C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
720
[ C(OP_WRITE) ] = {
arch/sparc/kernel/perf_event.c
721
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
722
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
724
[ C(OP_PREFETCH) ] = {
arch/sparc/kernel/perf_event.c
725
[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
arch/sparc/kernel/perf_event.c
726
[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
arch/x86/events/amd/core.c
100
[ C(OP_PREFETCH) ] = {
arch/x86/events/amd/core.c
101
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/amd/core.c
102
[ C(RESULT_MISS) ] = -1,
arch/x86/events/amd/core.c
105
[ C(BPU ) ] = {
arch/x86/events/amd/core.c
106
[ C(OP_READ) ] = {
arch/x86/events/amd/core.c
107
[ C(RESULT_ACCESS) ] = 0x00c2, /* Retired Branch Instr. */
arch/x86/events/amd/core.c
108
[ C(RESULT_MISS) ] = 0x00c3, /* Retired Mispredicted BI */
arch/x86/events/amd/core.c
110
[ C(OP_WRITE) ] = {
arch/x86/events/amd/core.c
111
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/amd/core.c
112
[ C(RESULT_MISS) ] = -1,
arch/x86/events/amd/core.c
114
[ C(OP_PREFETCH) ] = {
arch/x86/events/amd/core.c
115
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/amd/core.c
116
[ C(RESULT_MISS) ] = -1,
arch/x86/events/amd/core.c
119
[ C(NODE) ] = {
arch/x86/events/amd/core.c
120
[ C(OP_READ) ] = {
arch/x86/events/amd/core.c
121
[ C(RESULT_ACCESS) ] = 0xb8e9, /* CPU Request to Memory, l+r */
arch/x86/events/amd/core.c
122
[ C(RESULT_MISS) ] = 0x98e9, /* CPU Request to Memory, r */
arch/x86/events/amd/core.c
124
[ C(OP_WRITE) ] = {
arch/x86/events/amd/core.c
125
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/amd/core.c
126
[ C(RESULT_MISS) ] = -1,
arch/x86/events/amd/core.c
128
[ C(OP_PREFETCH) ] = {
arch/x86/events/amd/core.c
129
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/amd/core.c
130
[ C(RESULT_MISS) ] = -1,
arch/x86/events/amd/core.c
139
[C(L1D)] = {
arch/x86/events/amd/core.c
140
[C(OP_READ)] = {
arch/x86/events/amd/core.c
141
[C(RESULT_ACCESS)] = 0x0040, /* Data Cache Accesses */
arch/x86/events/amd/core.c
142
[C(RESULT_MISS)] = 0xc860, /* L2$ access from DC Miss */
arch/x86/events/amd/core.c
144
[C(OP_WRITE)] = {
arch/x86/events/amd/core.c
145
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
146
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
148
[C(OP_PREFETCH)] = {
arch/x86/events/amd/core.c
149
[C(RESULT_ACCESS)] = 0xff5a, /* h/w prefetch DC Fills */
arch/x86/events/amd/core.c
150
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
153
[C(L1I)] = {
arch/x86/events/amd/core.c
154
[C(OP_READ)] = {
arch/x86/events/amd/core.c
155
[C(RESULT_ACCESS)] = 0x0080, /* Instruction cache fetches */
arch/x86/events/amd/core.c
156
[C(RESULT_MISS)] = 0x0081, /* Instruction cache misses */
arch/x86/events/amd/core.c
158
[C(OP_WRITE)] = {
arch/x86/events/amd/core.c
159
[C(RESULT_ACCESS)] = -1,
arch/x86/events/amd/core.c
160
[C(RESULT_MISS)] = -1,
arch/x86/events/amd/core.c
162
[C(OP_PREFETCH)] = {
arch/x86/events/amd/core.c
163
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
164
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
167
[C(LL)] = {
arch/x86/events/amd/core.c
168
[C(OP_READ)] = {
arch/x86/events/amd/core.c
169
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
170
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
172
[C(OP_WRITE)] = {
arch/x86/events/amd/core.c
173
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
174
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
176
[C(OP_PREFETCH)] = {
arch/x86/events/amd/core.c
177
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
178
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
181
[C(DTLB)] = {
arch/x86/events/amd/core.c
182
[C(OP_READ)] = {
arch/x86/events/amd/core.c
183
[C(RESULT_ACCESS)] = 0xff45, /* All L2 DTLB accesses */
arch/x86/events/amd/core.c
184
[C(RESULT_MISS)] = 0xf045, /* L2 DTLB misses (PT walks) */
arch/x86/events/amd/core.c
186
[C(OP_WRITE)] = {
arch/x86/events/amd/core.c
187
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
188
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
190
[C(OP_PREFETCH)] = {
arch/x86/events/amd/core.c
191
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
192
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
195
[C(ITLB)] = {
arch/x86/events/amd/core.c
196
[C(OP_READ)] = {
arch/x86/events/amd/core.c
197
[C(RESULT_ACCESS)] = 0x0084, /* L1 ITLB misses, L2 ITLB hits */
arch/x86/events/amd/core.c
198
[C(RESULT_MISS)] = 0xff85, /* L1 ITLB misses, L2 misses */
arch/x86/events/amd/core.c
200
[C(OP_WRITE)] = {
arch/x86/events/amd/core.c
201
[C(RESULT_ACCESS)] = -1,
arch/x86/events/amd/core.c
202
[C(RESULT_MISS)] = -1,
arch/x86/events/amd/core.c
204
[C(OP_PREFETCH)] = {
arch/x86/events/amd/core.c
205
[C(RESULT_ACCESS)] = -1,
arch/x86/events/amd/core.c
206
[C(RESULT_MISS)] = -1,
arch/x86/events/amd/core.c
209
[C(BPU)] = {
arch/x86/events/amd/core.c
210
[C(OP_READ)] = {
arch/x86/events/amd/core.c
211
[C(RESULT_ACCESS)] = 0x00c2, /* Retired Branch Instr. */
arch/x86/events/amd/core.c
212
[C(RESULT_MISS)] = 0x00c3, /* Retired Mispredicted BI */
arch/x86/events/amd/core.c
214
[C(OP_WRITE)] = {
arch/x86/events/amd/core.c
215
[C(RESULT_ACCESS)] = -1,
arch/x86/events/amd/core.c
216
[C(RESULT_MISS)] = -1,
arch/x86/events/amd/core.c
218
[C(OP_PREFETCH)] = {
arch/x86/events/amd/core.c
219
[C(RESULT_ACCESS)] = -1,
arch/x86/events/amd/core.c
220
[C(RESULT_MISS)] = -1,
arch/x86/events/amd/core.c
223
[C(NODE)] = {
arch/x86/events/amd/core.c
224
[C(OP_READ)] = {
arch/x86/events/amd/core.c
225
[C(RESULT_ACCESS)] = 0,
arch/x86/events/amd/core.c
226
[C(RESULT_MISS)] = 0,
arch/x86/events/amd/core.c
228
[C(OP_WRITE)] = {
arch/x86/events/amd/core.c
229
[C(RESULT_ACCESS)] = -1,
arch/x86/events/amd/core.c
230
[C(RESULT_MISS)] = -1,
arch/x86/events/amd/core.c
232
[C(OP_PREFETCH)] = {
arch/x86/events/amd/core.c
233
[C(RESULT_ACCESS)] = -1,
arch/x86/events/amd/core.c
234
[C(RESULT_MISS)] = -1,
arch/x86/events/amd/core.c
35
[ C(L1D) ] = {
arch/x86/events/amd/core.c
36
[ C(OP_READ) ] = {
arch/x86/events/amd/core.c
37
[ C(RESULT_ACCESS) ] = 0x0040, /* Data Cache Accesses */
arch/x86/events/amd/core.c
38
[ C(RESULT_MISS) ] = 0x0141, /* Data Cache Misses */
arch/x86/events/amd/core.c
40
[ C(OP_WRITE) ] = {
arch/x86/events/amd/core.c
41
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/amd/core.c
42
[ C(RESULT_MISS) ] = 0,
arch/x86/events/amd/core.c
44
[ C(OP_PREFETCH) ] = {
arch/x86/events/amd/core.c
45
[ C(RESULT_ACCESS) ] = 0x0267, /* Data Prefetcher :attempts */
arch/x86/events/amd/core.c
46
[ C(RESULT_MISS) ] = 0x0167, /* Data Prefetcher :cancelled */
arch/x86/events/amd/core.c
49
[ C(L1I ) ] = {
arch/x86/events/amd/core.c
50
[ C(OP_READ) ] = {
arch/x86/events/amd/core.c
51
[ C(RESULT_ACCESS) ] = 0x0080, /* Instruction cache fetches */
arch/x86/events/amd/core.c
52
[ C(RESULT_MISS) ] = 0x0081, /* Instruction cache misses */
arch/x86/events/amd/core.c
54
[ C(OP_WRITE) ] = {
arch/x86/events/amd/core.c
55
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/amd/core.c
56
[ C(RESULT_MISS) ] = -1,
arch/x86/events/amd/core.c
58
[ C(OP_PREFETCH) ] = {
arch/x86/events/amd/core.c
59
[ C(RESULT_ACCESS) ] = 0x014B, /* Prefetch Instructions :Load */
arch/x86/events/amd/core.c
60
[ C(RESULT_MISS) ] = 0,
arch/x86/events/amd/core.c
63
[ C(LL ) ] = {
arch/x86/events/amd/core.c
64
[ C(OP_READ) ] = {
arch/x86/events/amd/core.c
65
[ C(RESULT_ACCESS) ] = 0x037D, /* Requests to L2 Cache :IC+DC */
arch/x86/events/amd/core.c
66
[ C(RESULT_MISS) ] = 0x037E, /* L2 Cache Misses : IC+DC */
arch/x86/events/amd/core.c
68
[ C(OP_WRITE) ] = {
arch/x86/events/amd/core.c
69
[ C(RESULT_ACCESS) ] = 0x017F, /* L2 Fill/Writeback */
arch/x86/events/amd/core.c
70
[ C(RESULT_MISS) ] = 0,
arch/x86/events/amd/core.c
72
[ C(OP_PREFETCH) ] = {
arch/x86/events/amd/core.c
73
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/amd/core.c
74
[ C(RESULT_MISS) ] = 0,
arch/x86/events/amd/core.c
77
[ C(DTLB) ] = {
arch/x86/events/amd/core.c
78
[ C(OP_READ) ] = {
arch/x86/events/amd/core.c
79
[ C(RESULT_ACCESS) ] = 0x0040, /* Data Cache Accesses */
arch/x86/events/amd/core.c
80
[ C(RESULT_MISS) ] = 0x0746, /* L1_DTLB_AND_L2_DLTB_MISS.ALL */
arch/x86/events/amd/core.c
82
[ C(OP_WRITE) ] = {
arch/x86/events/amd/core.c
83
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/amd/core.c
84
[ C(RESULT_MISS) ] = 0,
arch/x86/events/amd/core.c
86
[ C(OP_PREFETCH) ] = {
arch/x86/events/amd/core.c
87
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/amd/core.c
88
[ C(RESULT_MISS) ] = 0,
arch/x86/events/amd/core.c
91
[ C(ITLB) ] = {
arch/x86/events/amd/core.c
92
[ C(OP_READ) ] = {
arch/x86/events/amd/core.c
93
[ C(RESULT_ACCESS) ] = 0x0080, /* Instruction fecthes */
arch/x86/events/amd/core.c
94
[ C(RESULT_MISS) ] = 0x0385, /* L1_ITLB_AND_L2_ITLB_MISS.ALL */
arch/x86/events/amd/core.c
96
[ C(OP_WRITE) ] = {
arch/x86/events/amd/core.c
97
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/amd/core.c
98
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1035
[ C(L1D ) ] = {
arch/x86/events/intel/core.c
1036
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1037
[ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_INST_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
1038
[ C(RESULT_MISS) ] = 0x151, /* L1D.REPLACEMENT */
arch/x86/events/intel/core.c
1040
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1041
[ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_INST_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
1042
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1044
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1045
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1046
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1049
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
1050
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1051
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1052
[ C(RESULT_MISS) ] = 0x283, /* ICACHE_64B.MISS */
arch/x86/events/intel/core.c
1054
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1055
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1056
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1058
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1059
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1060
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1063
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1064
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1065
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1066
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1068
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1069
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1070
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1072
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1073
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1074
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1077
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
1078
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1079
[ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_INST_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
1080
[ C(RESULT_MISS) ] = 0xe08, /* DTLB_LOAD_MISSES.WALK_COMPLETED */
arch/x86/events/intel/core.c
1082
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1083
[ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_INST_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
1084
[ C(RESULT_MISS) ] = 0xe49, /* DTLB_STORE_MISSES.WALK_COMPLETED */
arch/x86/events/intel/core.c
1086
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1087
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1088
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1091
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
1092
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1093
[ C(RESULT_ACCESS) ] = 0x2085, /* ITLB_MISSES.STLB_HIT */
arch/x86/events/intel/core.c
1094
[ C(RESULT_MISS) ] = 0xe85, /* ITLB_MISSES.WALK_COMPLETED */
arch/x86/events/intel/core.c
1096
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1097
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1098
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1100
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1101
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1102
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1105
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
1106
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1107
[ C(RESULT_ACCESS) ] = 0xc4, /* BR_INST_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1108
[ C(RESULT_MISS) ] = 0xc5, /* BR_MISP_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1110
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1111
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1112
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1114
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1115
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1116
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1119
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1120
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1121
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1122
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1124
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1125
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1126
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1128
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1129
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1130
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1140
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1141
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1142
[ C(RESULT_ACCESS) ] = SKL_DEMAND_READ|
arch/x86/events/intel/core.c
1144
[ C(RESULT_MISS) ] = SKL_DEMAND_READ|
arch/x86/events/intel/core.c
1148
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1149
[ C(RESULT_ACCESS) ] = SKL_DEMAND_WRITE|
arch/x86/events/intel/core.c
1151
[ C(RESULT_MISS) ] = SKL_DEMAND_WRITE|
arch/x86/events/intel/core.c
1155
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1156
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1157
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1160
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1161
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1162
[ C(RESULT_ACCESS) ] = SKL_DEMAND_READ|
arch/x86/events/intel/core.c
1164
[ C(RESULT_MISS) ] = SKL_DEMAND_READ|
arch/x86/events/intel/core.c
1167
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1168
[ C(RESULT_ACCESS) ] = SKL_DEMAND_WRITE|
arch/x86/events/intel/core.c
1170
[ C(RESULT_MISS) ] = SKL_DEMAND_WRITE|
arch/x86/events/intel/core.c
1173
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1174
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1175
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1185
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1186
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1187
[ C(RESULT_ACCESS) ] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
1188
[ C(RESULT_MISS) ] = 0x3FBFC00001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
1190
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1191
[ C(RESULT_ACCESS) ] = 0x3F3FFC0002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
1192
[ C(RESULT_MISS) ] = 0x3F3FC00002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
1194
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1195
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1196
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1199
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1200
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1201
[ C(RESULT_ACCESS) ] = 0x104000001, /* OCR.DEMAND_DATA_RD.LOCAL_DRAM */
arch/x86/events/intel/core.c
1202
[ C(RESULT_MISS) ] = 0x730000001, /* OCR.DEMAND_DATA_RD.REMOTE_DRAM */
arch/x86/events/intel/core.c
1204
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1205
[ C(RESULT_ACCESS) ] = 0x104000002, /* OCR.DEMAND_RFO.LOCAL_DRAM */
arch/x86/events/intel/core.c
1206
[ C(RESULT_MISS) ] = 0x730000002, /* OCR.DEMAND_RFO.REMOTE_DRAM */
arch/x86/events/intel/core.c
1208
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1209
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1210
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1263
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1264
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1265
[ C(RESULT_ACCESS) ] = SNB_DMND_READ|SNB_L3_ACCESS,
arch/x86/events/intel/core.c
1266
[ C(RESULT_MISS) ] = SNB_DMND_READ|SNB_L3_MISS,
arch/x86/events/intel/core.c
1268
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1269
[ C(RESULT_ACCESS) ] = SNB_DMND_WRITE|SNB_L3_ACCESS,
arch/x86/events/intel/core.c
1270
[ C(RESULT_MISS) ] = SNB_DMND_WRITE|SNB_L3_MISS,
arch/x86/events/intel/core.c
1272
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1273
[ C(RESULT_ACCESS) ] = SNB_DMND_PREFETCH|SNB_L3_ACCESS,
arch/x86/events/intel/core.c
1274
[ C(RESULT_MISS) ] = SNB_DMND_PREFETCH|SNB_L3_MISS,
arch/x86/events/intel/core.c
1277
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1278
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1279
[ C(RESULT_ACCESS) ] = SNB_DMND_READ|SNB_DRAM_ANY,
arch/x86/events/intel/core.c
1280
[ C(RESULT_MISS) ] = SNB_DMND_READ|SNB_DRAM_REMOTE,
arch/x86/events/intel/core.c
1282
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1283
[ C(RESULT_ACCESS) ] = SNB_DMND_WRITE|SNB_DRAM_ANY,
arch/x86/events/intel/core.c
1284
[ C(RESULT_MISS) ] = SNB_DMND_WRITE|SNB_DRAM_REMOTE,
arch/x86/events/intel/core.c
1286
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1287
[ C(RESULT_ACCESS) ] = SNB_DMND_PREFETCH|SNB_DRAM_ANY,
arch/x86/events/intel/core.c
1288
[ C(RESULT_MISS) ] = SNB_DMND_PREFETCH|SNB_DRAM_REMOTE,
arch/x86/events/intel/core.c
1298
[ C(L1D) ] = {
arch/x86/events/intel/core.c
1299
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1300
[ C(RESULT_ACCESS) ] = 0xf1d0, /* MEM_UOP_RETIRED.LOADS */
arch/x86/events/intel/core.c
1301
[ C(RESULT_MISS) ] = 0x0151, /* L1D.REPLACEMENT */
arch/x86/events/intel/core.c
1303
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1304
[ C(RESULT_ACCESS) ] = 0xf2d0, /* MEM_UOP_RETIRED.STORES */
arch/x86/events/intel/core.c
1305
[ C(RESULT_MISS) ] = 0x0851, /* L1D.ALL_M_REPLACEMENT */
arch/x86/events/intel/core.c
1307
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1308
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1309
[ C(RESULT_MISS) ] = 0x024e, /* HW_PRE_REQ.DL1_MISS */
arch/x86/events/intel/core.c
1312
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
1313
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1314
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1315
[ C(RESULT_MISS) ] = 0x0280, /* ICACHE.MISSES */
arch/x86/events/intel/core.c
1317
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1318
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1319
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1321
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1322
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1323
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1326
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1327
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1329
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1331
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1333
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1335
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1337
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1339
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1341
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1343
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1346
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
1347
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1348
[ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_UOP_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
1349
[ C(RESULT_MISS) ] = 0x0108, /* DTLB_LOAD_MISSES.CAUSES_A_WALK */
arch/x86/events/intel/core.c
1351
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1352
[ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_UOP_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
1353
[ C(RESULT_MISS) ] = 0x0149, /* DTLB_STORE_MISSES.MISS_CAUSES_A_WALK */
arch/x86/events/intel/core.c
1355
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1356
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1357
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1360
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
1361
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1362
[ C(RESULT_ACCESS) ] = 0x1085, /* ITLB_MISSES.STLB_HIT */
arch/x86/events/intel/core.c
1363
[ C(RESULT_MISS) ] = 0x0185, /* ITLB_MISSES.CAUSES_A_WALK */
arch/x86/events/intel/core.c
1365
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1366
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1367
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1369
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1370
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1371
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1374
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
1375
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1376
[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1377
[ C(RESULT_MISS) ] = 0x00c5, /* BR_MISP_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1379
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1380
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1381
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1383
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1384
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1385
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1388
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1389
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1390
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1391
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1393
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1394
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1395
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1397
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1398
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1399
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1454
[ C(L1D ) ] = {
arch/x86/events/intel/core.c
1455
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1456
[ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
1457
[ C(RESULT_MISS) ] = 0x151, /* L1D.REPLACEMENT */
arch/x86/events/intel/core.c
1459
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1460
[ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
1461
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1463
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1464
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1465
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1468
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
1469
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1470
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1471
[ C(RESULT_MISS) ] = 0x280, /* ICACHE.MISSES */
arch/x86/events/intel/core.c
1473
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1474
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1475
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1477
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1478
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1479
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1482
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1483
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1484
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1485
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1487
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1488
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1489
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1491
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1492
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1493
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1496
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
1497
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1498
[ C(RESULT_ACCESS) ] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
1499
[ C(RESULT_MISS) ] = 0x108, /* DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK */
arch/x86/events/intel/core.c
1501
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1502
[ C(RESULT_ACCESS) ] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
1503
[ C(RESULT_MISS) ] = 0x149, /* DTLB_STORE_MISSES.MISS_CAUSES_A_WALK */
arch/x86/events/intel/core.c
1505
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1506
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1507
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1510
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
1511
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1512
[ C(RESULT_ACCESS) ] = 0x6085, /* ITLB_MISSES.STLB_HIT */
arch/x86/events/intel/core.c
1513
[ C(RESULT_MISS) ] = 0x185, /* ITLB_MISSES.MISS_CAUSES_A_WALK */
arch/x86/events/intel/core.c
1515
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1516
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1517
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1519
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1520
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1521
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1524
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
1525
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1526
[ C(RESULT_ACCESS) ] = 0xc4, /* BR_INST_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1527
[ C(RESULT_MISS) ] = 0xc5, /* BR_MISP_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1529
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1530
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1531
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1533
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1534
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1535
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1538
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1539
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1540
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1541
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1543
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1544
[ C(RESULT_ACCESS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1545
[ C(RESULT_MISS) ] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
1547
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1548
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1549
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1559
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1560
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1561
[ C(RESULT_ACCESS) ] = HSW_DEMAND_READ|
arch/x86/events/intel/core.c
1563
[ C(RESULT_MISS) ] = HSW_DEMAND_READ|
arch/x86/events/intel/core.c
1566
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1567
[ C(RESULT_ACCESS) ] = HSW_DEMAND_WRITE|
arch/x86/events/intel/core.c
1569
[ C(RESULT_MISS) ] = HSW_DEMAND_WRITE|
arch/x86/events/intel/core.c
1572
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1573
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1574
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1577
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1578
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1579
[ C(RESULT_ACCESS) ] = HSW_DEMAND_READ|
arch/x86/events/intel/core.c
1582
[ C(RESULT_MISS) ] = HSW_DEMAND_READ|
arch/x86/events/intel/core.c
1586
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1587
[ C(RESULT_ACCESS) ] = HSW_DEMAND_WRITE|
arch/x86/events/intel/core.c
1590
[ C(RESULT_MISS) ] = HSW_DEMAND_WRITE|
arch/x86/events/intel/core.c
1594
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1595
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1596
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1606
[ C(L1D) ] = {
arch/x86/events/intel/core.c
1607
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1608
[ C(RESULT_ACCESS) ] = 0x010b, /* MEM_INST_RETIRED.LOADS */
arch/x86/events/intel/core.c
1609
[ C(RESULT_MISS) ] = 0x0151, /* L1D.REPL */
arch/x86/events/intel/core.c
1611
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1612
[ C(RESULT_ACCESS) ] = 0x020b, /* MEM_INST_RETURED.STORES */
arch/x86/events/intel/core.c
1613
[ C(RESULT_MISS) ] = 0x0251, /* L1D.M_REPL */
arch/x86/events/intel/core.c
1615
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1616
[ C(RESULT_ACCESS) ] = 0x014e, /* L1D_PREFETCH.REQUESTS */
arch/x86/events/intel/core.c
1617
[ C(RESULT_MISS) ] = 0x024e, /* L1D_PREFETCH.MISS */
arch/x86/events/intel/core.c
1620
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
1621
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1622
[ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS */
arch/x86/events/intel/core.c
1623
[ C(RESULT_MISS) ] = 0x0280, /* L1I.MISSES */
arch/x86/events/intel/core.c
1625
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1626
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1627
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1629
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1630
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1631
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1634
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1635
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1637
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1639
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1645
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1647
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1649
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1651
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1653
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1655
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1658
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
1659
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1660
[ C(RESULT_ACCESS) ] = 0x010b, /* MEM_INST_RETIRED.LOADS */
arch/x86/events/intel/core.c
1661
[ C(RESULT_MISS) ] = 0x0108, /* DTLB_LOAD_MISSES.ANY */
arch/x86/events/intel/core.c
1663
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1664
[ C(RESULT_ACCESS) ] = 0x020b, /* MEM_INST_RETURED.STORES */
arch/x86/events/intel/core.c
1665
[ C(RESULT_MISS) ] = 0x010c, /* MEM_STORE_RETIRED.DTLB_MISS */
arch/x86/events/intel/core.c
1667
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1668
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1669
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1672
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
1673
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1674
[ C(RESULT_ACCESS) ] = 0x01c0, /* INST_RETIRED.ANY_P */
arch/x86/events/intel/core.c
1675
[ C(RESULT_MISS) ] = 0x0185, /* ITLB_MISSES.ANY */
arch/x86/events/intel/core.c
1677
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1678
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1679
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1681
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1682
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1683
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1686
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
1687
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1688
[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1689
[ C(RESULT_MISS) ] = 0x03e8, /* BPU_CLEARS.ANY */
arch/x86/events/intel/core.c
1691
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1692
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1693
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1695
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1696
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1697
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1700
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1701
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1702
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1703
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1705
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1706
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1707
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1709
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1710
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1711
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1754
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1755
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1756
[ C(RESULT_ACCESS) ] = NHM_DMND_READ|NHM_L3_ACCESS,
arch/x86/events/intel/core.c
1757
[ C(RESULT_MISS) ] = NHM_DMND_READ|NHM_L3_MISS,
arch/x86/events/intel/core.c
1759
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1760
[ C(RESULT_ACCESS) ] = NHM_DMND_WRITE|NHM_L3_ACCESS,
arch/x86/events/intel/core.c
1761
[ C(RESULT_MISS) ] = NHM_DMND_WRITE|NHM_L3_MISS,
arch/x86/events/intel/core.c
1763
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1764
[ C(RESULT_ACCESS) ] = NHM_DMND_PREFETCH|NHM_L3_ACCESS,
arch/x86/events/intel/core.c
1765
[ C(RESULT_MISS) ] = NHM_DMND_PREFETCH|NHM_L3_MISS,
arch/x86/events/intel/core.c
1768
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1769
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1770
[ C(RESULT_ACCESS) ] = NHM_DMND_READ|NHM_LOCAL|NHM_REMOTE,
arch/x86/events/intel/core.c
1771
[ C(RESULT_MISS) ] = NHM_DMND_READ|NHM_REMOTE,
arch/x86/events/intel/core.c
1773
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1774
[ C(RESULT_ACCESS) ] = NHM_DMND_WRITE|NHM_LOCAL|NHM_REMOTE,
arch/x86/events/intel/core.c
1775
[ C(RESULT_MISS) ] = NHM_DMND_WRITE|NHM_REMOTE,
arch/x86/events/intel/core.c
1777
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1778
[ C(RESULT_ACCESS) ] = NHM_DMND_PREFETCH|NHM_LOCAL|NHM_REMOTE,
arch/x86/events/intel/core.c
1779
[ C(RESULT_MISS) ] = NHM_DMND_PREFETCH|NHM_REMOTE,
arch/x86/events/intel/core.c
1789
[ C(L1D) ] = {
arch/x86/events/intel/core.c
1790
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1791
[ C(RESULT_ACCESS) ] = 0x010b, /* MEM_INST_RETIRED.LOADS */
arch/x86/events/intel/core.c
1792
[ C(RESULT_MISS) ] = 0x0151, /* L1D.REPL */
arch/x86/events/intel/core.c
1794
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1795
[ C(RESULT_ACCESS) ] = 0x020b, /* MEM_INST_RETURED.STORES */
arch/x86/events/intel/core.c
1796
[ C(RESULT_MISS) ] = 0x0251, /* L1D.M_REPL */
arch/x86/events/intel/core.c
1798
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1799
[ C(RESULT_ACCESS) ] = 0x014e, /* L1D_PREFETCH.REQUESTS */
arch/x86/events/intel/core.c
1800
[ C(RESULT_MISS) ] = 0x024e, /* L1D_PREFETCH.MISS */
arch/x86/events/intel/core.c
1803
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
1804
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1805
[ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS */
arch/x86/events/intel/core.c
1806
[ C(RESULT_MISS) ] = 0x0280, /* L1I.MISSES */
arch/x86/events/intel/core.c
1808
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1809
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1810
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1812
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1813
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1814
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1817
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1818
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1820
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1822
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1828
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1830
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1832
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1834
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1836
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1838
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1841
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
1842
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1843
[ C(RESULT_ACCESS) ] = 0x0f40, /* L1D_CACHE_LD.MESI (alias) */
arch/x86/events/intel/core.c
1844
[ C(RESULT_MISS) ] = 0x0108, /* DTLB_LOAD_MISSES.ANY */
arch/x86/events/intel/core.c
1846
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1847
[ C(RESULT_ACCESS) ] = 0x0f41, /* L1D_CACHE_ST.MESI (alias) */
arch/x86/events/intel/core.c
1848
[ C(RESULT_MISS) ] = 0x010c, /* MEM_STORE_RETIRED.DTLB_MISS */
arch/x86/events/intel/core.c
1850
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1851
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
1852
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/core.c
1855
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
1856
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1857
[ C(RESULT_ACCESS) ] = 0x01c0, /* INST_RETIRED.ANY_P */
arch/x86/events/intel/core.c
1858
[ C(RESULT_MISS) ] = 0x20c8, /* ITLB_MISS_RETIRED */
arch/x86/events/intel/core.c
1860
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1861
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1862
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1864
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1865
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1866
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1869
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
1870
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1871
[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
1872
[ C(RESULT_MISS) ] = 0x03e8, /* BPU_CLEARS.ANY */
arch/x86/events/intel/core.c
1874
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1875
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1876
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1878
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1879
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1880
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1883
[ C(NODE) ] = {
arch/x86/events/intel/core.c
1884
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1885
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1886
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1888
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1889
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1890
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1892
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1893
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
1894
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
1904
[ C(L1D) ] = {
arch/x86/events/intel/core.c
1905
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1906
[ C(RESULT_ACCESS) ] = 0x0f40, /* L1D_CACHE_LD.MESI */
arch/x86/events/intel/core.c
1907
[ C(RESULT_MISS) ] = 0x0140, /* L1D_CACHE_LD.I_STATE */
arch/x86/events/intel/core.c
1909
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1910
[ C(RESULT_ACCESS) ] = 0x0f41, /* L1D_CACHE_ST.MESI */
arch/x86/events/intel/core.c
1911
[ C(RESULT_MISS) ] = 0x0141, /* L1D_CACHE_ST.I_STATE */
arch/x86/events/intel/core.c
1913
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1914
[ C(RESULT_ACCESS) ] = 0x104e, /* L1D_PREFETCH.REQUESTS */
arch/x86/events/intel/core.c
1915
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
1918
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
1919
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1920
[ C(RESULT_ACCESS) ] = 0x0080, /* L1I.READS */
arch/x86/events/intel/core.c
1921
[ C(RESULT_MISS) ] = 0x0081, /* L1I.MISSES */
arch/x86/events/intel/core.c
1923
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1924
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1925
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1927
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1928
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
1929
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
1932
[ C(LL ) ] = {
arch/x86/events/intel/core.c
1933
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1934
[ C(RESULT_ACCESS) ] = 0x4f29, /* L2_LD.MESI */
arch/x86/events/intel/core.c
1935
[ C(RESULT_MISS) ] = 0x4129, /* L2_LD.ISTATE */
arch/x86/events/intel/core.c
1937
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1938
[ C(RESULT_ACCESS) ] = 0x4f2A, /* L2_ST.MESI */
arch/x86/events/intel/core.c
1939
[ C(RESULT_MISS) ] = 0x412A, /* L2_ST.ISTATE */
arch/x86/events/intel/core.c
1941
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1942
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
1943
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
1946
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
1947
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1948
[ C(RESULT_ACCESS) ] = 0x0f40, /* L1D_CACHE_LD.MESI (alias) */
arch/x86/events/intel/core.c
1949
[ C(RESULT_MISS) ] = 0x0208, /* DTLB_MISSES.MISS_LD */
arch/x86/events/intel/core.c
1951
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1952
[ C(RESULT_ACCESS) ] = 0x0f41, /* L1D_CACHE_ST.MESI (alias) */
arch/x86/events/intel/core.c
1953
[ C(RESULT_MISS) ] = 0x0808, /* DTLB_MISSES.MISS_ST */
arch/x86/events/intel/core.c
1955
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1956
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
1957
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
1960
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
1961
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1962
[ C(RESULT_ACCESS) ] = 0x00c0, /* INST_RETIRED.ANY_P */
arch/x86/events/intel/core.c
1963
[ C(RESULT_MISS) ] = 0x1282, /* ITLBMISSES */
arch/x86/events/intel/core.c
1965
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1966
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1967
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1969
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1970
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1971
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1974
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
1975
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1976
[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ANY */
arch/x86/events/intel/core.c
1977
[ C(RESULT_MISS) ] = 0x00c5, /* BP_INST_RETIRED.MISPRED */
arch/x86/events/intel/core.c
1979
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
1980
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1981
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1983
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
1984
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
1985
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
1995
[ C(L1D) ] = {
arch/x86/events/intel/core.c
1996
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
1997
[ C(RESULT_ACCESS) ] = 0x2140, /* L1D_CACHE.LD */
arch/x86/events/intel/core.c
1998
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2000
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2001
[ C(RESULT_ACCESS) ] = 0x2240, /* L1D_CACHE.ST */
arch/x86/events/intel/core.c
2002
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2004
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2005
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/core.c
2006
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2009
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
2010
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2011
[ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS */
arch/x86/events/intel/core.c
2012
[ C(RESULT_MISS) ] = 0x0280, /* L1I.MISSES */
arch/x86/events/intel/core.c
2014
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2015
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2016
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2018
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2019
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2020
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2023
[ C(LL ) ] = {
arch/x86/events/intel/core.c
2024
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2025
[ C(RESULT_ACCESS) ] = 0x4f29, /* L2_LD.MESI */
arch/x86/events/intel/core.c
2026
[ C(RESULT_MISS) ] = 0x4129, /* L2_LD.ISTATE */
arch/x86/events/intel/core.c
2028
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2029
[ C(RESULT_ACCESS) ] = 0x4f2A, /* L2_ST.MESI */
arch/x86/events/intel/core.c
2030
[ C(RESULT_MISS) ] = 0x412A, /* L2_ST.ISTATE */
arch/x86/events/intel/core.c
2032
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2033
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2034
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2037
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
2038
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2039
[ C(RESULT_ACCESS) ] = 0x2140, /* L1D_CACHE_LD.MESI (alias) */
arch/x86/events/intel/core.c
2040
[ C(RESULT_MISS) ] = 0x0508, /* DTLB_MISSES.MISS_LD */
arch/x86/events/intel/core.c
2042
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2043
[ C(RESULT_ACCESS) ] = 0x2240, /* L1D_CACHE_ST.MESI (alias) */
arch/x86/events/intel/core.c
2044
[ C(RESULT_MISS) ] = 0x0608, /* DTLB_MISSES.MISS_ST */
arch/x86/events/intel/core.c
2046
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2047
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2048
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2051
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
2052
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2053
[ C(RESULT_ACCESS) ] = 0x00c0, /* INST_RETIRED.ANY_P */
arch/x86/events/intel/core.c
2054
[ C(RESULT_MISS) ] = 0x0282, /* ITLB.MISSES */
arch/x86/events/intel/core.c
2056
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2057
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2058
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2060
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2061
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2062
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2065
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
2066
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2067
[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ANY */
arch/x86/events/intel/core.c
2068
[ C(RESULT_MISS) ] = 0x00c5, /* BP_INST_RETIRED.MISPRED */
arch/x86/events/intel/core.c
2070
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2071
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2072
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2074
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2075
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2076
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2125
[ C(LL ) ] = {
arch/x86/events/intel/core.c
2126
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2127
[ C(RESULT_ACCESS) ] = SLM_DMND_READ|SLM_LLC_ACCESS,
arch/x86/events/intel/core.c
2128
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2130
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2131
[ C(RESULT_ACCESS) ] = SLM_DMND_WRITE|SLM_LLC_ACCESS,
arch/x86/events/intel/core.c
2132
[ C(RESULT_MISS) ] = SLM_DMND_WRITE|SLM_LLC_MISS,
arch/x86/events/intel/core.c
2134
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2135
[ C(RESULT_ACCESS) ] = SLM_DMND_PREFETCH|SLM_LLC_ACCESS,
arch/x86/events/intel/core.c
2136
[ C(RESULT_MISS) ] = SLM_DMND_PREFETCH|SLM_LLC_MISS,
arch/x86/events/intel/core.c
2146
[ C(L1D) ] = {
arch/x86/events/intel/core.c
2147
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2148
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2149
[ C(RESULT_MISS) ] = 0x0104, /* LD_DCU_MISS */
arch/x86/events/intel/core.c
2151
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2152
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2153
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2155
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2156
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2157
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2160
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
2161
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2162
[ C(RESULT_ACCESS) ] = 0x0380, /* ICACHE.ACCESSES */
arch/x86/events/intel/core.c
2163
[ C(RESULT_MISS) ] = 0x0280, /* ICACGE.MISSES */
arch/x86/events/intel/core.c
2165
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2166
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2167
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2169
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2170
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2171
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2174
[ C(LL ) ] = {
arch/x86/events/intel/core.c
2175
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2177
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
2178
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2180
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2182
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
2184
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
2186
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2188
[ C(RESULT_ACCESS) ] = 0x01b7,
arch/x86/events/intel/core.c
2190
[ C(RESULT_MISS) ] = 0x01b7,
arch/x86/events/intel/core.c
2193
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
2194
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2195
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2196
[ C(RESULT_MISS) ] = 0x0804, /* LD_DTLB_MISS */
arch/x86/events/intel/core.c
2198
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2199
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2200
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2202
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2203
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/core.c
2204
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/core.c
2207
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
2208
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2209
[ C(RESULT_ACCESS) ] = 0x00c0, /* INST_RETIRED.ANY_P */
arch/x86/events/intel/core.c
2210
[ C(RESULT_MISS) ] = 0x40205, /* PAGE_WALKS.I_SIDE_WALKS */
arch/x86/events/intel/core.c
2212
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2213
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2214
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2216
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2217
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2218
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2221
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
2222
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
2223
[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ANY */
arch/x86/events/intel/core.c
2224
[ C(RESULT_MISS) ] = 0x00c5, /* BP_INST_RETIRED.MISPRED */
arch/x86/events/intel/core.c
2226
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
2227
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2228
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2230
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
2231
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
2232
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
2280
[C(L1D)] = {
arch/x86/events/intel/core.c
2281
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2282
[C(RESULT_ACCESS)] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
2283
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2285
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2286
[C(RESULT_ACCESS)] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
2287
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2289
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2290
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2291
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2294
[C(L1I)] = {
arch/x86/events/intel/core.c
2295
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2296
[C(RESULT_ACCESS)] = 0x0380, /* ICACHE.ACCESSES */
arch/x86/events/intel/core.c
2297
[C(RESULT_MISS)] = 0x0280, /* ICACHE.MISSES */
arch/x86/events/intel/core.c
2299
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2300
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2301
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2303
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2304
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2305
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2308
[C(LL)] = {
arch/x86/events/intel/core.c
2309
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2310
[C(RESULT_ACCESS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2311
[C(RESULT_MISS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2313
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2314
[C(RESULT_ACCESS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2315
[C(RESULT_MISS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2317
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2318
[C(RESULT_ACCESS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2319
[C(RESULT_MISS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2322
[C(DTLB)] = {
arch/x86/events/intel/core.c
2323
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2324
[C(RESULT_ACCESS)] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
2325
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2327
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2328
[C(RESULT_ACCESS)] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
2329
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2331
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2332
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2333
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2336
[C(ITLB)] = {
arch/x86/events/intel/core.c
2337
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2338
[C(RESULT_ACCESS)] = 0x00c0, /* INST_RETIRED.ANY_P */
arch/x86/events/intel/core.c
2339
[C(RESULT_MISS)] = 0x0481, /* ITLB.MISS */
arch/x86/events/intel/core.c
2341
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2342
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2343
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2345
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2346
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2347
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2350
[C(BPU)] = {
arch/x86/events/intel/core.c
2351
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2352
[C(RESULT_ACCESS)] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
2353
[C(RESULT_MISS)] = 0x00c5, /* BR_MISP_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
2355
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2356
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2357
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2359
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2360
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2361
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2370
[C(LL)] = {
arch/x86/events/intel/core.c
2371
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2372
[C(RESULT_ACCESS)] = GLM_DEMAND_READ|
arch/x86/events/intel/core.c
2374
[C(RESULT_MISS)] = GLM_DEMAND_READ|
arch/x86/events/intel/core.c
2377
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2378
[C(RESULT_ACCESS)] = GLM_DEMAND_WRITE|
arch/x86/events/intel/core.c
2380
[C(RESULT_MISS)] = GLM_DEMAND_WRITE|
arch/x86/events/intel/core.c
2383
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2384
[C(RESULT_ACCESS)] = GLM_DEMAND_PREFETCH|
arch/x86/events/intel/core.c
2386
[C(RESULT_MISS)] = GLM_DEMAND_PREFETCH|
arch/x86/events/intel/core.c
2396
[C(L1D)] = {
arch/x86/events/intel/core.c
2397
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2398
[C(RESULT_ACCESS)] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
2399
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2401
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2402
[C(RESULT_ACCESS)] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
2403
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2405
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2406
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2407
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2410
[C(L1I)] = {
arch/x86/events/intel/core.c
2411
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2412
[C(RESULT_ACCESS)] = 0x0380, /* ICACHE.ACCESSES */
arch/x86/events/intel/core.c
2413
[C(RESULT_MISS)] = 0x0280, /* ICACHE.MISSES */
arch/x86/events/intel/core.c
2415
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2416
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2417
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2419
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2420
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2421
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2424
[C(LL)] = {
arch/x86/events/intel/core.c
2425
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2426
[C(RESULT_ACCESS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2427
[C(RESULT_MISS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2429
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2430
[C(RESULT_ACCESS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2431
[C(RESULT_MISS)] = 0x1b7, /* OFFCORE_RESPONSE */
arch/x86/events/intel/core.c
2433
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2434
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2435
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2438
[C(DTLB)] = {
arch/x86/events/intel/core.c
2439
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2440
[C(RESULT_ACCESS)] = 0x81d0, /* MEM_UOPS_RETIRED.ALL_LOADS */
arch/x86/events/intel/core.c
2441
[C(RESULT_MISS)] = 0xe08, /* DTLB_LOAD_MISSES.WALK_COMPLETED */
arch/x86/events/intel/core.c
2443
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2444
[C(RESULT_ACCESS)] = 0x82d0, /* MEM_UOPS_RETIRED.ALL_STORES */
arch/x86/events/intel/core.c
2445
[C(RESULT_MISS)] = 0xe49, /* DTLB_STORE_MISSES.WALK_COMPLETED */
arch/x86/events/intel/core.c
2447
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2448
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2449
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2452
[C(ITLB)] = {
arch/x86/events/intel/core.c
2453
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2454
[C(RESULT_ACCESS)] = 0x00c0, /* INST_RETIRED.ANY_P */
arch/x86/events/intel/core.c
2455
[C(RESULT_MISS)] = 0x0481, /* ITLB.MISS */
arch/x86/events/intel/core.c
2457
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2458
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2459
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2461
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2462
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2463
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2466
[C(BPU)] = {
arch/x86/events/intel/core.c
2467
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2468
[C(RESULT_ACCESS)] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
2469
[C(RESULT_MISS)] = 0x00c5, /* BR_MISP_RETIRED.ALL_BRANCHES */
arch/x86/events/intel/core.c
2471
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2472
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2473
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2475
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2476
[C(RESULT_ACCESS)] = -1,
arch/x86/events/intel/core.c
2477
[C(RESULT_MISS)] = -1,
arch/x86/events/intel/core.c
2486
[C(LL)] = {
arch/x86/events/intel/core.c
2487
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2488
[C(RESULT_ACCESS)] = GLM_DEMAND_READ|
arch/x86/events/intel/core.c
2490
[C(RESULT_MISS)] = GLM_DEMAND_READ|
arch/x86/events/intel/core.c
2493
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2494
[C(RESULT_ACCESS)] = GLM_DEMAND_WRITE|
arch/x86/events/intel/core.c
2496
[C(RESULT_MISS)] = GLM_DEMAND_WRITE|
arch/x86/events/intel/core.c
2499
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2500
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2501
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2518
[C(LL)] = {
arch/x86/events/intel/core.c
2519
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2520
[C(RESULT_ACCESS)] = TNT_DEMAND_READ|
arch/x86/events/intel/core.c
2522
[C(RESULT_MISS)] = TNT_DEMAND_READ|
arch/x86/events/intel/core.c
2525
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2526
[C(RESULT_ACCESS)] = TNT_DEMAND_WRITE|
arch/x86/events/intel/core.c
2528
[C(RESULT_MISS)] = TNT_DEMAND_WRITE|
arch/x86/events/intel/core.c
2531
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2532
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/intel/core.c
2533
[C(RESULT_MISS)] = 0x0,
arch/x86/events/intel/core.c
2542
[C(LL)] = {
arch/x86/events/intel/core.c
2543
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2544
[C(RESULT_ACCESS)] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
2545
[C(RESULT_MISS)] = 0x3F84400001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
2547
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2548
[C(RESULT_ACCESS)] = 0x10002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
2549
[C(RESULT_MISS)] = 0x3F84400002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
2558
[C(LL)] = {
arch/x86/events/intel/core.c
2559
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2560
[C(RESULT_ACCESS)] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
2561
[C(RESULT_MISS)] = 0x3fbfc00001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
2563
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2564
[C(RESULT_ACCESS)] = 0x10002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
2565
[C(RESULT_MISS)] = 0x3fbfc00002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
2574
[C(LL)] = {
arch/x86/events/intel/core.c
2575
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2576
[C(RESULT_ACCESS)] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
2577
[C(RESULT_MISS)] = 0x13FBFC00001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
2579
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2580
[C(RESULT_ACCESS)] = 0x10002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
2581
[C(RESULT_MISS)] = 0x13FBFC00002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
2590
[C(LL)] = {
arch/x86/events/intel/core.c
2591
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2592
[C(RESULT_ACCESS)] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
2593
[C(RESULT_MISS)] = 0x33FBFC00001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
2595
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2596
[C(RESULT_ACCESS)] = 0x10002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
2597
[C(RESULT_MISS)] = 0x33FBFC00002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
2606
[C(LL)] = {
arch/x86/events/intel/core.c
2607
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2608
[C(RESULT_ACCESS)] = 0x4000000000000009, /* OMR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
2609
[C(RESULT_MISS)] = 0xFF03F000000009, /* OMR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
2611
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2612
[C(RESULT_ACCESS)] = 0x400000000000000A, /* OMR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
2613
[C(RESULT_MISS)] = 0xFF03F00000000A, /* OMR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
2723
[C(LL)] = {
arch/x86/events/intel/core.c
2724
[C(OP_READ)] = {
arch/x86/events/intel/core.c
2725
[C(RESULT_ACCESS)] = KNL_L2_READ | KNL_L2_ACCESS,
arch/x86/events/intel/core.c
2726
[C(RESULT_MISS)] = 0,
arch/x86/events/intel/core.c
2728
[C(OP_WRITE)] = {
arch/x86/events/intel/core.c
2729
[C(RESULT_ACCESS)] = KNL_L2_WRITE | KNL_L2_ACCESS,
arch/x86/events/intel/core.c
2730
[C(RESULT_MISS)] = KNL_L2_WRITE | KNL_L2_MISS,
arch/x86/events/intel/core.c
2732
[C(OP_PREFETCH)] = {
arch/x86/events/intel/core.c
2733
[C(RESULT_ACCESS)] = KNL_L2_PREFETCH | KNL_L2_ACCESS,
arch/x86/events/intel/core.c
2734
[C(RESULT_MISS)] = KNL_L2_PREFETCH | KNL_L2_MISS,
arch/x86/events/intel/core.c
649
[ C(L1D ) ] = {
arch/x86/events/intel/core.c
650
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
651
[ C(RESULT_ACCESS) ] = 0x81d0,
arch/x86/events/intel/core.c
652
[ C(RESULT_MISS) ] = 0xe124,
arch/x86/events/intel/core.c
654
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
655
[ C(RESULT_ACCESS) ] = 0x82d0,
arch/x86/events/intel/core.c
658
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
659
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
660
[ C(RESULT_MISS) ] = 0xe424,
arch/x86/events/intel/core.c
662
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
663
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
664
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
667
[ C(LL ) ] = {
arch/x86/events/intel/core.c
668
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
669
[ C(RESULT_ACCESS) ] = 0x12a,
arch/x86/events/intel/core.c
670
[ C(RESULT_MISS) ] = 0x12a,
arch/x86/events/intel/core.c
672
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
673
[ C(RESULT_ACCESS) ] = 0x12a,
arch/x86/events/intel/core.c
674
[ C(RESULT_MISS) ] = 0x12a,
arch/x86/events/intel/core.c
677
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
678
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
679
[ C(RESULT_ACCESS) ] = 0x81d0,
arch/x86/events/intel/core.c
680
[ C(RESULT_MISS) ] = 0xe12,
arch/x86/events/intel/core.c
682
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
683
[ C(RESULT_ACCESS) ] = 0x82d0,
arch/x86/events/intel/core.c
684
[ C(RESULT_MISS) ] = 0xe13,
arch/x86/events/intel/core.c
687
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
688
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
689
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
690
[ C(RESULT_MISS) ] = 0xe11,
arch/x86/events/intel/core.c
692
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
693
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
694
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
696
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
697
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
698
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
701
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
702
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
703
[ C(RESULT_ACCESS) ] = 0x4c4,
arch/x86/events/intel/core.c
704
[ C(RESULT_MISS) ] = 0x4c5,
arch/x86/events/intel/core.c
706
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
707
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
708
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
710
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
711
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
712
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
715
[ C(NODE) ] = {
arch/x86/events/intel/core.c
716
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
717
[ C(RESULT_ACCESS) ] = 0x12a,
arch/x86/events/intel/core.c
718
[ C(RESULT_MISS) ] = 0x12a,
arch/x86/events/intel/core.c
729
[ C(L1D ) ] = {
arch/x86/events/intel/core.c
730
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
731
[ C(RESULT_ACCESS) ] = 0x81d0,
arch/x86/events/intel/core.c
732
[ C(RESULT_MISS) ] = 0xe124,
arch/x86/events/intel/core.c
734
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
735
[ C(RESULT_ACCESS) ] = 0x82d0,
arch/x86/events/intel/core.c
738
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
739
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
740
[ C(RESULT_MISS) ] = 0xe424,
arch/x86/events/intel/core.c
742
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
743
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
744
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
747
[ C(LL ) ] = {
arch/x86/events/intel/core.c
748
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
749
[ C(RESULT_ACCESS) ] = 0x12a,
arch/x86/events/intel/core.c
750
[ C(RESULT_MISS) ] = 0x12a,
arch/x86/events/intel/core.c
752
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
753
[ C(RESULT_ACCESS) ] = 0x12a,
arch/x86/events/intel/core.c
754
[ C(RESULT_MISS) ] = 0x12a,
arch/x86/events/intel/core.c
757
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
758
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
759
[ C(RESULT_ACCESS) ] = 0x81d0,
arch/x86/events/intel/core.c
760
[ C(RESULT_MISS) ] = 0xe12,
arch/x86/events/intel/core.c
762
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
763
[ C(RESULT_ACCESS) ] = 0x82d0,
arch/x86/events/intel/core.c
764
[ C(RESULT_MISS) ] = 0xe13,
arch/x86/events/intel/core.c
767
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
768
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
769
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
770
[ C(RESULT_MISS) ] = 0xe11,
arch/x86/events/intel/core.c
772
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
773
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
774
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
776
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
7768
hybrid_var(pmu, hw_cache_event_ids)[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)] = -1;
arch/x86/events/intel/core.c
777
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
778
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
781
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
782
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
783
[ C(RESULT_ACCESS) ] = 0x4c4,
arch/x86/events/intel/core.c
784
[ C(RESULT_MISS) ] = 0x4c5,
arch/x86/events/intel/core.c
786
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
787
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
788
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
790
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
791
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
792
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
802
[ C(LL ) ] = {
arch/x86/events/intel/core.c
803
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
804
[ C(RESULT_ACCESS) ] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
805
[ C(RESULT_MISS) ] = 0x3fbfc00001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
807
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
808
[ C(RESULT_ACCESS) ] = 0x3f3ffc0002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
809
[ C(RESULT_MISS) ] = 0x3f3fc00002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
812
[ C(NODE) ] = {
arch/x86/events/intel/core.c
813
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
8133
hw_cache_event_ids[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)] = -1;
arch/x86/events/intel/core.c
814
[ C(RESULT_ACCESS) ] = 0x104000001, /* OCR.DEMAND_DATA_RD.LOCAL_DRAM */
arch/x86/events/intel/core.c
815
[ C(RESULT_MISS) ] = 0x730000001, /* OCR.DEMAND_DATA_RD.REMOTE_DRAM */
arch/x86/events/intel/core.c
826
[ C(LL ) ] = {
arch/x86/events/intel/core.c
8268
hw_cache_event_ids[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = 0x8108; /* DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK */
arch/x86/events/intel/core.c
827
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
828
[ C(RESULT_ACCESS) ] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
829
[ C(RESULT_MISS) ] = 0x3fbfc00001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
831
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
832
[ C(RESULT_ACCESS) ] = 0x10002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
833
[ C(RESULT_MISS) ] = 0x3fbfc00002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
8345
hw_cache_extra_regs[C(LL)][C(OP_READ)][C(RESULT_MISS)] = HSW_DEMAND_READ |
arch/x86/events/intel/core.c
8347
hw_cache_extra_regs[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = HSW_DEMAND_WRITE|BDW_L3_MISS|
arch/x86/events/intel/core.c
8349
hw_cache_extra_regs[C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = HSW_DEMAND_READ|
arch/x86/events/intel/core.c
8351
hw_cache_extra_regs[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = HSW_DEMAND_WRITE|
arch/x86/events/intel/core.c
843
[ C(LL ) ] = {
arch/x86/events/intel/core.c
844
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
845
[ C(RESULT_ACCESS) ] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
846
[ C(RESULT_MISS) ] = 0x9E7FA000001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
8469
hw_cache_event_ids[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)] = -1;
arch/x86/events/intel/core.c
848
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
849
[ C(RESULT_ACCESS) ] = 0x10002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
850
[ C(RESULT_MISS) ] = 0x9E7FA000002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
861
[ C(LL ) ] = {
arch/x86/events/intel/core.c
862
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
863
[ C(RESULT_ACCESS) ] = 0x10001, /* OCR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
864
[ C(RESULT_MISS) ] = 0xFE7F8000001, /* OCR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
866
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
867
[ C(RESULT_ACCESS) ] = 0x10002, /* OCR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
868
[ C(RESULT_MISS) ] = 0xFE7F8000002, /* OCR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
878
[ C(L1D ) ] = {
arch/x86/events/intel/core.c
879
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
880
[ C(RESULT_ACCESS) ] = 0x81d0,
arch/x86/events/intel/core.c
881
[ C(RESULT_MISS) ] = 0xe124,
arch/x86/events/intel/core.c
883
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
884
[ C(RESULT_ACCESS) ] = 0x82d0,
arch/x86/events/intel/core.c
887
[ C(L1I ) ] = {
arch/x86/events/intel/core.c
888
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
889
[ C(RESULT_MISS) ] = 0xe424,
arch/x86/events/intel/core.c
891
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
892
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
893
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
896
[ C(LL ) ] = {
arch/x86/events/intel/core.c
897
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
898
[ C(RESULT_ACCESS) ] = 0x12a,
arch/x86/events/intel/core.c
899
[ C(RESULT_MISS) ] = 0x12a,
arch/x86/events/intel/core.c
901
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
902
[ C(RESULT_ACCESS) ] = 0x12a,
arch/x86/events/intel/core.c
903
[ C(RESULT_MISS) ] = 0x12a,
arch/x86/events/intel/core.c
906
[ C(DTLB) ] = {
arch/x86/events/intel/core.c
907
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
908
[ C(RESULT_ACCESS) ] = 0x81d0,
arch/x86/events/intel/core.c
909
[ C(RESULT_MISS) ] = 0xe12,
arch/x86/events/intel/core.c
911
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
912
[ C(RESULT_ACCESS) ] = 0x82d0,
arch/x86/events/intel/core.c
913
[ C(RESULT_MISS) ] = 0xe13,
arch/x86/events/intel/core.c
916
[ C(ITLB) ] = {
arch/x86/events/intel/core.c
917
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
918
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
919
[ C(RESULT_MISS) ] = 0xe11,
arch/x86/events/intel/core.c
921
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
922
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
923
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
925
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
926
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
927
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
930
[ C(BPU ) ] = {
arch/x86/events/intel/core.c
931
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
932
[ C(RESULT_ACCESS) ] = 0x4c4,
arch/x86/events/intel/core.c
933
[ C(RESULT_MISS) ] = 0x4c5,
arch/x86/events/intel/core.c
935
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
936
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
937
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
939
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/core.c
940
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
941
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
944
[ C(NODE) ] = {
arch/x86/events/intel/core.c
945
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
946
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/core.c
947
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/core.c
957
[ C(LL ) ] = {
arch/x86/events/intel/core.c
958
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
959
[ C(RESULT_ACCESS) ] = 0x4000000000000001, /* OMR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
960
[ C(RESULT_MISS) ] = 0xFFFFF000000001, /* OMR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
962
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
963
[ C(RESULT_ACCESS) ] = 0x4000000000000002, /* OMR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
964
[ C(RESULT_MISS) ] = 0xFFFFF000000002, /* OMR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/core.c
974
[ C(LL ) ] = {
arch/x86/events/intel/core.c
975
[ C(OP_READ) ] = {
arch/x86/events/intel/core.c
976
[ C(RESULT_ACCESS) ] = 0x4000000000000001, /* OMR.DEMAND_DATA_RD.ANY_RESPONSE */
arch/x86/events/intel/core.c
977
[ C(RESULT_MISS) ] = 0xFF03F000000001, /* OMR.DEMAND_DATA_RD.L3_MISS */
arch/x86/events/intel/core.c
979
[ C(OP_WRITE) ] = {
arch/x86/events/intel/core.c
980
[ C(RESULT_ACCESS) ] = 0x4000000000000002, /* OMR.DEMAND_RFO.ANY_RESPONSE */
arch/x86/events/intel/core.c
981
[ C(RESULT_MISS) ] = 0xFF03F000000002, /* OMR.DEMAND_RFO.L3_MISS */
arch/x86/events/intel/knc.c
100
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/knc.c
101
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/knc.c
104
[ C(BPU ) ] = {
arch/x86/events/intel/knc.c
105
[ C(OP_READ) ] = {
arch/x86/events/intel/knc.c
106
[ C(RESULT_ACCESS) ] = 0x0012, /* BRANCHES */
arch/x86/events/intel/knc.c
107
[ C(RESULT_MISS) ] = 0x002b, /* BRANCHES_MISPREDICTED */
arch/x86/events/intel/knc.c
109
[ C(OP_WRITE) ] = {
arch/x86/events/intel/knc.c
110
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/knc.c
111
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/knc.c
113
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/knc.c
114
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/knc.c
115
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/knc.c
27
[ C(L1D) ] = {
arch/x86/events/intel/knc.c
28
[ C(OP_READ) ] = {
arch/x86/events/intel/knc.c
33
[ C(RESULT_ACCESS) ] = ARCH_PERFMON_EVENTSEL_INT,
arch/x86/events/intel/knc.c
35
[ C(RESULT_MISS) ] = 0x0003, /* DATA_READ_MISS */
arch/x86/events/intel/knc.c
37
[ C(OP_WRITE) ] = {
arch/x86/events/intel/knc.c
38
[ C(RESULT_ACCESS) ] = 0x0001, /* DATA_WRITE */
arch/x86/events/intel/knc.c
39
[ C(RESULT_MISS) ] = 0x0004, /* DATA_WRITE_MISS */
arch/x86/events/intel/knc.c
41
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/knc.c
42
[ C(RESULT_ACCESS) ] = 0x0011, /* L1_DATA_PF1 */
arch/x86/events/intel/knc.c
43
[ C(RESULT_MISS) ] = 0x001c, /* L1_DATA_PF1_MISS */
arch/x86/events/intel/knc.c
46
[ C(L1I ) ] = {
arch/x86/events/intel/knc.c
47
[ C(OP_READ) ] = {
arch/x86/events/intel/knc.c
48
[ C(RESULT_ACCESS) ] = 0x000c, /* CODE_READ */
arch/x86/events/intel/knc.c
49
[ C(RESULT_MISS) ] = 0x000e, /* CODE_CACHE_MISS */
arch/x86/events/intel/knc.c
51
[ C(OP_WRITE) ] = {
arch/x86/events/intel/knc.c
52
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/knc.c
53
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/knc.c
55
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/knc.c
56
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/knc.c
57
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/knc.c
60
[ C(LL ) ] = {
arch/x86/events/intel/knc.c
61
[ C(OP_READ) ] = {
arch/x86/events/intel/knc.c
62
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/knc.c
63
[ C(RESULT_MISS) ] = 0x10cb, /* L2_READ_MISS */
arch/x86/events/intel/knc.c
65
[ C(OP_WRITE) ] = {
arch/x86/events/intel/knc.c
66
[ C(RESULT_ACCESS) ] = 0x10cc, /* L2_WRITE_HIT */
arch/x86/events/intel/knc.c
67
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/knc.c
69
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/knc.c
70
[ C(RESULT_ACCESS) ] = 0x10fc, /* L2_DATA_PF2 */
arch/x86/events/intel/knc.c
71
[ C(RESULT_MISS) ] = 0x10fe, /* L2_DATA_PF2_MISS */
arch/x86/events/intel/knc.c
74
[ C(DTLB) ] = {
arch/x86/events/intel/knc.c
75
[ C(OP_READ) ] = {
arch/x86/events/intel/knc.c
76
[ C(RESULT_ACCESS) ] = ARCH_PERFMON_EVENTSEL_INT,
arch/x86/events/intel/knc.c
79
[ C(RESULT_MISS) ] = 0x0002, /* DATA_PAGE_WALK */
arch/x86/events/intel/knc.c
81
[ C(OP_WRITE) ] = {
arch/x86/events/intel/knc.c
82
[ C(RESULT_ACCESS) ] = 0x0001, /* DATA_WRITE */
arch/x86/events/intel/knc.c
83
[ C(RESULT_MISS) ] = 0x0002, /* DATA_PAGE_WALK */
arch/x86/events/intel/knc.c
85
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/knc.c
86
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/knc.c
87
[ C(RESULT_MISS) ] = 0x0,
arch/x86/events/intel/knc.c
90
[ C(ITLB) ] = {
arch/x86/events/intel/knc.c
91
[ C(OP_READ) ] = {
arch/x86/events/intel/knc.c
92
[ C(RESULT_ACCESS) ] = 0x000c, /* CODE_READ */
arch/x86/events/intel/knc.c
93
[ C(RESULT_MISS) ] = 0x000d, /* CODE_PAGE_WALK */
arch/x86/events/intel/knc.c
95
[ C(OP_WRITE) ] = {
arch/x86/events/intel/knc.c
96
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/knc.c
97
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/knc.c
99
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p4.c
521
[ C(L1D ) ] = {
arch/x86/events/intel/p4.c
522
[ C(OP_READ) ] = {
arch/x86/events/intel/p4.c
523
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/p4.c
524
[ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
arch/x86/events/intel/p4.c
528
[ C(LL ) ] = {
arch/x86/events/intel/p4.c
529
[ C(OP_READ) ] = {
arch/x86/events/intel/p4.c
530
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/p4.c
531
[ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
arch/x86/events/intel/p4.c
535
[ C(DTLB) ] = {
arch/x86/events/intel/p4.c
536
[ C(OP_READ) ] = {
arch/x86/events/intel/p4.c
537
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/p4.c
538
[ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
arch/x86/events/intel/p4.c
541
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p4.c
542
[ C(RESULT_ACCESS) ] = 0x0,
arch/x86/events/intel/p4.c
543
[ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_REPLAY_EVENT, NBOGUS,
arch/x86/events/intel/p4.c
547
[ C(ITLB) ] = {
arch/x86/events/intel/p4.c
548
[ C(OP_READ) ] = {
arch/x86/events/intel/p4.c
549
[ C(RESULT_ACCESS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, HIT,
arch/x86/events/intel/p4.c
551
[ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, MISS,
arch/x86/events/intel/p4.c
554
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p4.c
555
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p4.c
556
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p4.c
558
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p4.c
559
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p4.c
560
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p4.c
563
[ C(NODE) ] = {
arch/x86/events/intel/p4.c
564
[ C(OP_READ) ] = {
arch/x86/events/intel/p4.c
565
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p4.c
566
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p4.c
568
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p4.c
569
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p4.c
570
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p4.c
572
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p4.c
573
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p4.c
574
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p6.c
101
[ C(BPU ) ] = {
arch/x86/events/intel/p6.c
102
[ C(OP_READ) ] = {
arch/x86/events/intel/p6.c
103
[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED */
arch/x86/events/intel/p6.c
104
[ C(RESULT_MISS) ] = 0x00c5, /* BR_MISS_PRED_RETIRED */
arch/x86/events/intel/p6.c
106
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p6.c
107
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p6.c
108
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p6.c
110
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p6.c
111
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p6.c
112
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p6.c
31
[ C(L1D) ] = {
arch/x86/events/intel/p6.c
32
[ C(OP_READ) ] = {
arch/x86/events/intel/p6.c
33
[ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */
arch/x86/events/intel/p6.c
34
[ C(RESULT_MISS) ] = 0x0045, /* DCU_LINES_IN */
arch/x86/events/intel/p6.c
36
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p6.c
37
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
38
[ C(RESULT_MISS) ] = 0x0f29, /* L2_LD:M:E:S:I */
arch/x86/events/intel/p6.c
40
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p6.c
41
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
42
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/p6.c
45
[ C(L1I ) ] = {
arch/x86/events/intel/p6.c
46
[ C(OP_READ) ] = {
arch/x86/events/intel/p6.c
47
[ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */
arch/x86/events/intel/p6.c
48
[ C(RESULT_MISS) ] = 0x0f28, /* L2_IFETCH:M:E:S:I */
arch/x86/events/intel/p6.c
50
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p6.c
51
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p6.c
52
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p6.c
54
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p6.c
55
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
56
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/p6.c
59
[ C(LL ) ] = {
arch/x86/events/intel/p6.c
60
[ C(OP_READ) ] = {
arch/x86/events/intel/p6.c
61
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
62
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/p6.c
64
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p6.c
65
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
66
[ C(RESULT_MISS) ] = 0x0025, /* L2_M_LINES_INM */
arch/x86/events/intel/p6.c
68
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p6.c
69
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
70
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/p6.c
73
[ C(DTLB) ] = {
arch/x86/events/intel/p6.c
74
[ C(OP_READ) ] = {
arch/x86/events/intel/p6.c
75
[ C(RESULT_ACCESS) ] = 0x0043, /* DATA_MEM_REFS */
arch/x86/events/intel/p6.c
76
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/p6.c
78
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p6.c
79
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
80
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/p6.c
82
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p6.c
83
[ C(RESULT_ACCESS) ] = 0,
arch/x86/events/intel/p6.c
84
[ C(RESULT_MISS) ] = 0,
arch/x86/events/intel/p6.c
87
[ C(ITLB) ] = {
arch/x86/events/intel/p6.c
88
[ C(OP_READ) ] = {
arch/x86/events/intel/p6.c
89
[ C(RESULT_ACCESS) ] = 0x0080, /* IFU_IFETCH */
arch/x86/events/intel/p6.c
90
[ C(RESULT_MISS) ] = 0x0085, /* ITLB_MISS */
arch/x86/events/intel/p6.c
92
[ C(OP_WRITE) ] = {
arch/x86/events/intel/p6.c
93
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p6.c
94
[ C(RESULT_MISS) ] = -1,
arch/x86/events/intel/p6.c
96
[ C(OP_PREFETCH) ] = {
arch/x86/events/intel/p6.c
97
[ C(RESULT_ACCESS) ] = -1,
arch/x86/events/intel/p6.c
98
[ C(RESULT_MISS) ] = -1,
arch/x86/events/zhaoxin/core.c
100
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
101
[C(RESULT_ACCESS)] = 0x0043,
arch/x86/events/zhaoxin/core.c
102
[C(RESULT_MISS)] = 0x0530,
arch/x86/events/zhaoxin/core.c
104
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
105
[C(RESULT_ACCESS)] = 0x0564,
arch/x86/events/zhaoxin/core.c
106
[C(RESULT_MISS)] = 0x0565,
arch/x86/events/zhaoxin/core.c
109
[C(ITLB)] = {
arch/x86/events/zhaoxin/core.c
110
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
111
[C(RESULT_ACCESS)] = 0x00c0,
arch/x86/events/zhaoxin/core.c
112
[C(RESULT_MISS)] = 0x0534,
arch/x86/events/zhaoxin/core.c
114
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
115
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
116
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
118
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
119
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
120
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
123
[C(BPU)] = {
arch/x86/events/zhaoxin/core.c
124
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
125
[C(RESULT_ACCESS)] = 0x0700,
arch/x86/events/zhaoxin/core.c
126
[C(RESULT_MISS)] = 0x0709,
arch/x86/events/zhaoxin/core.c
128
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
129
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
130
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
132
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
133
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
134
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
137
[C(NODE)] = {
arch/x86/events/zhaoxin/core.c
138
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
139
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
140
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
142
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
143
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
144
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
146
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
147
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
148
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
157
[C(L1D)] = {
arch/x86/events/zhaoxin/core.c
158
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
159
[C(RESULT_ACCESS)] = 0x0568,
arch/x86/events/zhaoxin/core.c
160
[C(RESULT_MISS)] = 0x054b,
arch/x86/events/zhaoxin/core.c
162
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
163
[C(RESULT_ACCESS)] = 0x0669,
arch/x86/events/zhaoxin/core.c
164
[C(RESULT_MISS)] = 0x0562,
arch/x86/events/zhaoxin/core.c
166
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
167
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
168
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
171
[C(L1I)] = {
arch/x86/events/zhaoxin/core.c
172
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
173
[C(RESULT_ACCESS)] = 0x0300,
arch/x86/events/zhaoxin/core.c
174
[C(RESULT_MISS)] = 0x0301,
arch/x86/events/zhaoxin/core.c
176
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
177
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
178
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
180
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
181
[C(RESULT_ACCESS)] = 0x030a,
arch/x86/events/zhaoxin/core.c
182
[C(RESULT_MISS)] = 0x030b,
arch/x86/events/zhaoxin/core.c
185
[C(LL)] = {
arch/x86/events/zhaoxin/core.c
186
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
187
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/zhaoxin/core.c
188
[C(RESULT_MISS)] = 0x0,
arch/x86/events/zhaoxin/core.c
190
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
191
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/zhaoxin/core.c
192
[C(RESULT_MISS)] = 0x0,
arch/x86/events/zhaoxin/core.c
194
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
195
[C(RESULT_ACCESS)] = 0x0,
arch/x86/events/zhaoxin/core.c
196
[C(RESULT_MISS)] = 0x0,
arch/x86/events/zhaoxin/core.c
199
[C(DTLB)] = {
arch/x86/events/zhaoxin/core.c
200
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
201
[C(RESULT_ACCESS)] = 0x0568,
arch/x86/events/zhaoxin/core.c
202
[C(RESULT_MISS)] = 0x052c,
arch/x86/events/zhaoxin/core.c
204
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
205
[C(RESULT_ACCESS)] = 0x0669,
arch/x86/events/zhaoxin/core.c
206
[C(RESULT_MISS)] = 0x0530,
arch/x86/events/zhaoxin/core.c
208
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
209
[C(RESULT_ACCESS)] = 0x0564,
arch/x86/events/zhaoxin/core.c
210
[C(RESULT_MISS)] = 0x0565,
arch/x86/events/zhaoxin/core.c
213
[C(ITLB)] = {
arch/x86/events/zhaoxin/core.c
214
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
215
[C(RESULT_ACCESS)] = 0x00c0,
arch/x86/events/zhaoxin/core.c
216
[C(RESULT_MISS)] = 0x0534,
arch/x86/events/zhaoxin/core.c
218
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
219
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
220
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
222
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
223
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
224
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
227
[C(BPU)] = {
arch/x86/events/zhaoxin/core.c
228
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
229
[C(RESULT_ACCESS)] = 0x0028,
arch/x86/events/zhaoxin/core.c
230
[C(RESULT_MISS)] = 0x0029,
arch/x86/events/zhaoxin/core.c
232
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
233
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
234
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
236
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
237
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
238
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
241
[C(NODE)] = {
arch/x86/events/zhaoxin/core.c
242
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
243
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
244
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
246
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
247
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
248
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
250
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
251
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
252
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
53
[C(L1D)] = {
arch/x86/events/zhaoxin/core.c
54
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
55
[C(RESULT_ACCESS)] = 0x0042,
arch/x86/events/zhaoxin/core.c
56
[C(RESULT_MISS)] = 0x0538,
arch/x86/events/zhaoxin/core.c
58
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
59
[C(RESULT_ACCESS)] = 0x0043,
arch/x86/events/zhaoxin/core.c
60
[C(RESULT_MISS)] = 0x0562,
arch/x86/events/zhaoxin/core.c
62
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
63
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
64
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
67
[C(L1I)] = {
arch/x86/events/zhaoxin/core.c
68
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
69
[C(RESULT_ACCESS)] = 0x0300,
arch/x86/events/zhaoxin/core.c
70
[C(RESULT_MISS)] = 0x0301,
arch/x86/events/zhaoxin/core.c
72
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
73
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
74
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
76
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
77
[C(RESULT_ACCESS)] = 0x030a,
arch/x86/events/zhaoxin/core.c
78
[C(RESULT_MISS)] = 0x030b,
arch/x86/events/zhaoxin/core.c
81
[C(LL)] = {
arch/x86/events/zhaoxin/core.c
82
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
83
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
84
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
86
[C(OP_WRITE)] = {
arch/x86/events/zhaoxin/core.c
87
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
88
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
90
[C(OP_PREFETCH)] = {
arch/x86/events/zhaoxin/core.c
91
[C(RESULT_ACCESS)] = -1,
arch/x86/events/zhaoxin/core.c
92
[C(RESULT_MISS)] = -1,
arch/x86/events/zhaoxin/core.c
95
[C(DTLB)] = {
arch/x86/events/zhaoxin/core.c
96
[C(OP_READ)] = {
arch/x86/events/zhaoxin/core.c
97
[C(RESULT_ACCESS)] = 0x0042,
arch/x86/events/zhaoxin/core.c
98
[C(RESULT_MISS)] = 0x052c,
arch/x86/xen/enlighten_pv.c
1277
C(device);
arch/x86/xen/enlighten_pv.c
1278
C(version);
arch/x86/xen/enlighten_pv.c
1279
C(interface_support);
arch/x86/xen/enlighten_pv.c
1280
C(legacy_max_cylinder);
arch/x86/xen/enlighten_pv.c
1281
C(legacy_max_head);
arch/x86/xen/enlighten_pv.c
1282
C(legacy_sectors_per_track);
arch/xtensa/kernel/perf_event.c
100
[C(OP_READ)] = {
arch/xtensa/kernel/perf_event.c
101
[C(RESULT_ACCESS)] = XTENSA_PMU_MASK(9, 0x1),
arch/xtensa/kernel/perf_event.c
102
[C(RESULT_MISS)] = XTENSA_PMU_MASK(9, 0x8),
arch/xtensa/kernel/perf_event.c
105
[C(ITLB)] = {
arch/xtensa/kernel/perf_event.c
106
[C(OP_READ)] = {
arch/xtensa/kernel/perf_event.c
107
[C(RESULT_ACCESS)] = XTENSA_PMU_MASK(7, 0x1),
arch/xtensa/kernel/perf_event.c
108
[C(RESULT_MISS)] = XTENSA_PMU_MASK(7, 0x8),
arch/xtensa/kernel/perf_event.c
123
cache_op >= C(OP_MAX) ||
arch/xtensa/kernel/perf_event.c
124
cache_result >= C(RESULT_MAX))
arch/xtensa/kernel/perf_event.c
82
static const u32 xtensa_cache_ctl[][C(OP_MAX)][C(RESULT_MAX)] = {
arch/xtensa/kernel/perf_event.c
83
[C(L1D)] = {
arch/xtensa/kernel/perf_event.c
84
[C(OP_READ)] = {
arch/xtensa/kernel/perf_event.c
85
[C(RESULT_ACCESS)] = XTENSA_PMU_MASK(10, 0x1),
arch/xtensa/kernel/perf_event.c
86
[C(RESULT_MISS)] = XTENSA_PMU_MASK(10, 0x2),
arch/xtensa/kernel/perf_event.c
88
[C(OP_WRITE)] = {
arch/xtensa/kernel/perf_event.c
89
[C(RESULT_ACCESS)] = XTENSA_PMU_MASK(11, 0x1),
arch/xtensa/kernel/perf_event.c
90
[C(RESULT_MISS)] = XTENSA_PMU_MASK(11, 0x2),
arch/xtensa/kernel/perf_event.c
93
[C(L1I)] = {
arch/xtensa/kernel/perf_event.c
94
[C(OP_READ)] = {
arch/xtensa/kernel/perf_event.c
95
[C(RESULT_ACCESS)] = XTENSA_PMU_MASK(8, 0x1),
arch/xtensa/kernel/perf_event.c
96
[C(RESULT_MISS)] = XTENSA_PMU_MASK(8, 0x2),
arch/xtensa/kernel/perf_event.c
99
[C(DTLB)] = {
crypto/streebog_generic.c
29
static const struct streebog_uint512 C[12] = {
crypto/streebog_generic.c
905
streebog_xlps(Ki, &C[i], Ki);
crypto/streebog_generic.c
957
streebog_xlps(&Ki, &C[11], &Ki);
drivers/clk/qcom/clk-rcg.h
22
#define FMS(f, s, h, m, n) { (f), 1, (const struct freq_conf []){ C(s, h, m, n) } }
drivers/clk/qcom/gcc-ipq6018.c
515
C(P_UNIPHY1_RX, 12.5, 0, 0),
drivers/clk/qcom/gcc-ipq6018.c
516
C(P_UNIPHY0_RX, 5, 0, 0),
drivers/clk/qcom/gcc-ipq6018.c
520
C(P_UNIPHY1_RX, 2.5, 0, 0),
drivers/clk/qcom/gcc-ipq6018.c
521
C(P_UNIPHY0_RX, 1, 0, 0),
drivers/clk/qcom/gcc-ipq6018.c
570
C(P_UNIPHY1_TX, 12.5, 0, 0),
drivers/clk/qcom/gcc-ipq6018.c
571
C(P_UNIPHY0_TX, 5, 0, 0),
drivers/clk/qcom/gcc-ipq6018.c
575
C(P_UNIPHY1_TX, 2.5, 0, 0),
drivers/clk/qcom/gcc-ipq6018.c
576
C(P_UNIPHY0_TX, 1, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1681
C(P_UNIPHY1_RX, 12.5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1682
C(P_UNIPHY0_RX, 5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1686
C(P_UNIPHY1_RX, 2.5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1687
C(P_UNIPHY0_RX, 1, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1751
C(P_UNIPHY1_TX, 12.5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1752
C(P_UNIPHY0_TX, 5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1756
C(P_UNIPHY1_TX, 2.5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1757
C(P_UNIPHY0_TX, 1, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1821
C(P_UNIPHY2_RX, 5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1822
C(P_UNIPHY2_RX, 12.5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1826
C(P_UNIPHY2_RX, 1, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1827
C(P_UNIPHY2_RX, 2.5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1886
C(P_UNIPHY2_TX, 5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1887
C(P_UNIPHY2_TX, 12.5, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1891
C(P_UNIPHY2_TX, 1, 0, 0),
drivers/clk/qcom/gcc-ipq8074.c
1892
C(P_UNIPHY2_TX, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
188
C(P_UNIPHY0_NSS_RX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
189
C(P_UNIPHY0_NSS_RX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
193
C(P_UNIPHY0_NSS_RX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
194
C(P_UNIPHY0_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
222
C(P_UNIPHY0_NSS_TX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
223
C(P_UNIPHY0_NSS_TX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
227
C(P_UNIPHY0_NSS_TX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
228
C(P_UNIPHY0_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
256
C(P_UNIPHY1_NSS_RX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
257
C(P_UNIPHY1_NSS_RX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
261
C(P_UNIPHY1_NSS_RX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
262
C(P_UNIPHY1_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
290
C(P_UNIPHY1_NSS_TX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
291
C(P_UNIPHY1_NSS_TX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
295
C(P_UNIPHY1_NSS_TX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
296
C(P_UNIPHY1_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
324
C(P_UNIPHY2_NSS_RX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
325
C(P_UNIPHY2_NSS_RX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
329
C(P_UNIPHY2_NSS_RX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
330
C(P_UNIPHY2_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
358
C(P_UNIPHY2_NSS_TX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
359
C(P_UNIPHY2_NSS_TX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
363
C(P_UNIPHY2_NSS_TX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq5424.c
364
C(P_UNIPHY2_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
347
C(P_UNIPHY0_NSS_RX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
348
C(P_UNIPHY0_NSS_RX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
352
C(P_UNIPHY0_NSS_RX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
353
C(P_UNIPHY0_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
366
C(P_UNIPHY0_NSS_TX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
367
C(P_UNIPHY0_NSS_TX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
371
C(P_UNIPHY0_NSS_TX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
372
C(P_UNIPHY0_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
385
C(P_UNIPHY1_NSS_RX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
386
C(P_UNIPHY0_NSS_RX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
390
C(P_UNIPHY1_NSS_RX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
391
C(P_UNIPHY0_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
395
C(P_UNIPHY1_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
396
C(P_UNIPHY0_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
410
C(P_UNIPHY1_NSS_TX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
411
C(P_UNIPHY0_NSS_TX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
415
C(P_UNIPHY1_NSS_TX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
416
C(P_UNIPHY0_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
420
C(P_UNIPHY1_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
421
C(P_UNIPHY0_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
435
C(P_UNIPHY2_NSS_RX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
436
C(P_UNIPHY2_NSS_RX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
440
C(P_UNIPHY2_NSS_RX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
441
C(P_UNIPHY2_NSS_RX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
455
C(P_UNIPHY2_NSS_TX_CLK, 12.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
456
C(P_UNIPHY2_NSS_TX_CLK, 5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
460
C(P_UNIPHY2_NSS_TX_CLK, 2.5, 0, 0),
drivers/clk/qcom/nsscc-ipq9574.c
461
C(P_UNIPHY2_NSS_TX_CLK, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1054
C(P_UNIPHY0_RX, 12.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1055
C(P_UNIPHY0_RX, 5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1056
C(P_UNIPHY1_TX312P5M, 12.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1057
C(P_UNIPHY1_RX312P5M, 12.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1061
C(P_UNIPHY0_RX, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1062
C(P_UNIPHY0_RX, 2.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1063
C(P_UNIPHY1_TX312P5M, 2.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1064
C(P_UNIPHY1_RX312P5M, 2.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1068
C(P_UNIPHY0_RX, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1069
C(P_UNIPHY1_TX312P5M, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1070
C(P_UNIPHY1_RX312P5M, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1213
C(P_UNIPHY0_TX, 12.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1214
C(P_UNIPHY0_TX, 5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1215
C(P_UNIPHY1_TX312P5M, 12.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1219
C(P_UNIPHY0_TX, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1220
C(P_UNIPHY0_TX, 2.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1221
C(P_UNIPHY1_TX312P5M, 2.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1225
C(P_UNIPHY0_TX, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
1226
C(P_UNIPHY1_TX312P5M, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
285
C(P_UNIPHY1_TX312P5M, 12.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
286
C(P_UNIPHY1_RX312P5M, 12.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
290
C(P_UNIPHY1_TX312P5M, 2.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
291
C(P_UNIPHY1_RX312P5M, 2.5, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
295
C(P_UNIPHY1_TX312P5M, 1, 0, 0),
drivers/clk/qcom/nsscc-qca8k.c
296
C(P_UNIPHY1_RX312P5M, 1, 0, 0),
drivers/comedi/drivers/s626.c
98
#define S626_INDXMASK(C) (1 << (((C) > 2) ? ((C) * 2 - 1) : ((C) * 2 + 4)))
drivers/comedi/drivers/s626.c
99
#define S626_OVERMASK(C) (1 << (((C) > 2) ? ((C) * 2 + 5) : ((C) * 2 + 10)))
drivers/cxl/cxlmem.h
162
C(SUCCESS, 0, NULL), \
drivers/cxl/cxlmem.h
163
C(BACKGROUND, -ENXIO, "background cmd started successfully"), \
drivers/cxl/cxlmem.h
164
C(INPUT, -ENXIO, "cmd input was invalid"), \
drivers/cxl/cxlmem.h
165
C(UNSUPPORTED, -ENXIO, "cmd is not supported"), \
drivers/cxl/cxlmem.h
166
C(INTERNAL, -ENXIO, "internal device error"), \
drivers/cxl/cxlmem.h
167
C(RETRY, -ENXIO, "temporary error, retry once"), \
drivers/cxl/cxlmem.h
168
C(BUSY, -ENXIO, "ongoing background operation"), \
drivers/cxl/cxlmem.h
169
C(MEDIADISABLED, -ENXIO, "media access is disabled"), \
drivers/cxl/cxlmem.h
170
C(FWINPROGRESS, -ENXIO, "one FW package can be transferred at a time"), \
drivers/cxl/cxlmem.h
171
C(FWOOO, -ENXIO, "FW package content was transferred out of order"), \
drivers/cxl/cxlmem.h
172
C(FWAUTH, -ENXIO, "FW package authentication failed"), \
drivers/cxl/cxlmem.h
173
C(FWSLOT, -ENXIO, "FW slot is not supported for requested operation"), \
drivers/cxl/cxlmem.h
174
C(FWROLLBACK, -ENXIO, "rolled back to the previous active FW"), \
drivers/cxl/cxlmem.h
175
C(FWRESET, -ENXIO, "FW failed to activate, needs cold reset"), \
drivers/cxl/cxlmem.h
176
C(HANDLE, -ENXIO, "one or more Event Record Handles were invalid"), \
drivers/cxl/cxlmem.h
177
C(PADDR, -EFAULT, "physical address specified is invalid"), \
drivers/cxl/cxlmem.h
178
C(POISONLMT, -EBUSY, "poison injection limit has been reached"), \
drivers/cxl/cxlmem.h
179
C(MEDIAFAILURE, -ENXIO, "permanent issue with the media"), \
drivers/cxl/cxlmem.h
180
C(ABORT, -ENXIO, "background cmd was aborted by device"), \
drivers/cxl/cxlmem.h
181
C(SECURITY, -ENXIO, "not valid in the current security state"), \
drivers/cxl/cxlmem.h
182
C(PASSPHRASE, -ENXIO, "phrase doesn't match current set passphrase"), \
drivers/cxl/cxlmem.h
183
C(MBUNSUPPORTED, -ENXIO, "unsupported on the mailbox it was issued on"),\
drivers/cxl/cxlmem.h
184
C(PAYLOADLEN, -ENXIO, "invalid payload length"), \
drivers/cxl/cxlmem.h
185
C(LOG, -ENXIO, "invalid or unsupported log page"), \
drivers/cxl/cxlmem.h
186
C(INTERRUPTED, -ENXIO, "asynchronous event occured"), \
drivers/cxl/cxlmem.h
187
C(FEATUREVERSION, -ENXIO, "unsupported feature version"), \
drivers/cxl/cxlmem.h
188
C(FEATURESELVALUE, -ENXIO, "unsupported feature selection value"), \
drivers/cxl/cxlmem.h
189
C(FEATURETRANSFERIP, -ENXIO, "feature transfer in progress"), \
drivers/cxl/cxlmem.h
190
C(FEATURETRANSFEROOO, -ENXIO, "feature transfer out of order"), \
drivers/cxl/cxlmem.h
191
C(RESOURCEEXHAUSTED, -ENXIO, "resources are exhausted"), \
drivers/cxl/cxlmem.h
192
C(EXTLIST, -ENXIO, "invalid Extent List"), \
drivers/edac/pnd2_edac.c
760
C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
drivers/edac/pnd2_edac.c
762
R(10), C(7), C(8), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
770
C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
drivers/edac/pnd2_edac.c
772
R(10), C(7), C(8), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
780
C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
drivers/edac/pnd2_edac.c
782
R(10), C(7), C(8), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
790
C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
drivers/edac/pnd2_edac.c
792
R(10), C(7), C(8), C(9), R(11), RS, C(11), R(12), R(13),
drivers/edac/pnd2_edac.c
800
C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
drivers/edac/pnd2_edac.c
802
R(9), R(10), C(8), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
810
C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
drivers/edac/pnd2_edac.c
812
R(9), R(10), C(8), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
820
C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
drivers/edac/pnd2_edac.c
822
R(9), R(10), C(8), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
830
C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
drivers/edac/pnd2_edac.c
832
R(9), R(10), C(8), C(9), R(11), RS, C(11), R(12), R(13),
drivers/edac/pnd2_edac.c
840
C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
drivers/edac/pnd2_edac.c
842
R(8), R(9), R(10), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
850
C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
drivers/edac/pnd2_edac.c
852
R(8), R(9), R(10), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
860
C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
drivers/edac/pnd2_edac.c
862
R(8), R(9), R(10), C(9), R(11), RS, R(12), R(13), R(14),
drivers/edac/pnd2_edac.c
870
C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
drivers/edac/pnd2_edac.c
872
R(8), R(9), R(10), C(9), R(11), RS, C(11), R(12), R(13),
drivers/edac/pnd2_edac.c
936
case C(0):
drivers/gpio/gpio-tegra186.c
1054
TEGRA186_MAIN_GPIO_PORT( C, 3, 1, 7),
drivers/gpio/gpio-tegra186.c
1115
TEGRA194_MAIN_GPIO_PORT( C, 4, 3, 8),
drivers/gpio/gpio-tegra186.c
1187
TEGRA234_MAIN_GPIO_PORT( C, 5, 1, 8),
drivers/gpio/gpio-tegra186.c
1249
TEGRA238_MAIN_GPIO_PORT(C, 0, 2, 8),
drivers/gpio/gpio-tegra186.c
1310
TEGRA241_MAIN_GPIO_PORT(C, 0, 2, 2),
drivers/gpio/gpio-tegra186.c
1408
TEGRA264_UPHY_GPIO_PORT(C, 0, 2, 3),
drivers/gpio/gpio-tegra186.c
1428
TEGRA256_MAIN_GPIO_PORT(C, 0, 2, 8),
drivers/gpio/gpio-tegra186.c
1450
TEGRA410_COMPUTE_GPIO_PORT(C, 1, 1, 3),
drivers/gpio/gpio-tegra186.c
1470
TEGRA410_SYSTEM_GPIO_PORT(C, 0, 2, 8),
drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
374
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
412
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
505
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
197
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
325
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1247
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
156
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
206
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
388
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
207
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
372
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
548
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
972
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
217
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
421
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
234
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
428
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
228
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
423
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
214
clk_src_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
411
link_regs(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1139
link_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
2322
clk_src_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
1127
link_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
1817
clk_src_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1167
link_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1988
clk_src_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1147
link_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1961
clk_src_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1154
link_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1961
clk_src_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1125
link_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
2013
clk_src_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1156
link_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1977
clk_src_regs_init(2, C),
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1198
link_regs_init(2, C);
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1929
clk_src_regs_init(2, C),
drivers/gpu/drm/display/drm_hdmi_helper.c
100
#define HDMI_COLORIMETRY_BT2020_CYCC (C(3) | EC(5) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
101
#define HDMI_COLORIMETRY_BT2020_RGB (C(3) | EC(6) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
102
#define HDMI_COLORIMETRY_BT2020_YCC (C(3) | EC(6) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
103
#define HDMI_COLORIMETRY_DCI_P3_RGB_D65 (C(3) | EC(7) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
104
#define HDMI_COLORIMETRY_DCI_P3_RGB_THEATER (C(3) | EC(7) | ACE(1))
drivers/gpu/drm/display/drm_hdmi_helper.c
93
#define HDMI_COLORIMETRY_SMPTE_170M_YCC (C(1) | EC(0) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
94
#define HDMI_COLORIMETRY_BT709_YCC (C(2) | EC(0) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
95
#define HDMI_COLORIMETRY_XVYCC_601 (C(3) | EC(0) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
96
#define HDMI_COLORIMETRY_XVYCC_709 (C(3) | EC(1) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
97
#define HDMI_COLORIMETRY_SYCC_601 (C(3) | EC(2) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
98
#define HDMI_COLORIMETRY_OPYCC_601 (C(3) | EC(3) | ACE(0))
drivers/gpu/drm/display/drm_hdmi_helper.c
99
#define HDMI_COLORIMETRY_OPRGB (C(3) | EC(4) | ACE(0))
drivers/gpu/drm/i915/display/intel_dp_aux.c
70
done = wait_event_timeout(display->gmbus.wait_queue, C,
drivers/gpu/drm/i915/display/intel_dp_hdcp.c
49
ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
126
C = alloc_fence();
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
127
if (!C) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
132
if (i915_sw_fence_await_sw_fence_gfp(B, C, GFP_KERNEL) == -EINVAL) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
136
if (i915_sw_fence_await_sw_fence_gfp(C, B, GFP_KERNEL) != -EINVAL) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
140
if (i915_sw_fence_await_sw_fence_gfp(C, A, GFP_KERNEL) != -EINVAL) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
144
if (i915_sw_fence_await_sw_fence_gfp(A, C, GFP_KERNEL) == -EINVAL) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
151
i915_sw_fence_commit(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
154
if (!i915_sw_fence_done(C)) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
167
free_fence(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
225
struct i915_sw_fence *A, *B, *C;
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
239
C = alloc_fence();
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
240
if (!C) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
253
ret = i915_sw_fence_await_sw_fence_gfp(B, C, GFP_KERNEL);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
279
i915_sw_fence_commit(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
282
if (!i915_sw_fence_done(C)) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
295
free_fence(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
305
struct i915_sw_fence *A, *B, *C;
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
319
C = alloc_fence();
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
320
if (!C) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
325
ret = i915_sw_fence_await_sw_fence_gfp(A, C, GFP_KERNEL);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
333
ret = i915_sw_fence_await_sw_fence_gfp(B, C, GFP_KERNEL);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
355
i915_sw_fence_commit(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
356
if (!i915_sw_fence_done(C)) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
372
free_fence(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
382
struct i915_sw_fence *A, *B, *C;
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
396
C = alloc_fence();
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
397
if (!C) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
402
ret = i915_sw_fence_await_sw_fence_gfp(C, A, GFP_KERNEL);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
410
ret = i915_sw_fence_await_sw_fence_gfp(C, B, GFP_KERNEL);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
419
i915_sw_fence_commit(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
420
if (i915_sw_fence_done(C))
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
436
if (!i915_sw_fence_done(C)) {
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
442
free_fence(C);
drivers/gpu/drm/i915/selftests/i915_sw_fence.c
98
struct i915_sw_fence *A, *B, *C;
drivers/gpu/drm/nouveau/include/nvif/push.h
262
#define PUSH_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
drivers/gpu/drm/nouveau/include/nvif/push.h
353
#define PUSH_NV_(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,U,V,W,X,IMPL,...) IMPL
drivers/iio/light/rohm-bu27034.c
600
unsigned int C;
drivers/iio/light/rohm-bu27034.c
701
.C = 190880000, /* 19.088 */
drivers/iio/light/rohm-bu27034.c
706
.C = 305408000, /* 30.5408 */
drivers/iio/light/rohm-bu27034.c
719
terms[2] = bu27034_fixp_calc_t23(c->C, ch0, gain0);
drivers/media/dvb-frontends/mb86a16.c
456
unsigned char C, F, B;
drivers/media/dvb-frontends/mb86a16.c
462
C = 1;
drivers/media/dvb-frontends/mb86a16.c
464
C = 2;
drivers/media/dvb-frontends/mb86a16.c
466
C = 3;
drivers/media/dvb-frontends/mb86a16.c
468
C = 4;
drivers/media/dvb-frontends/mb86a16.c
502
rf_val[0] = 0x01 | (C << 3) | (F << 1);
drivers/media/pci/cx18/cx18-av-core.c
634
ch[2] = C;
drivers/media/pci/cx18/cx18-av-core.c
638
ch[1] = C;
drivers/media/pci/cx18/cx18-av-core.c
713
case C:
drivers/media/pci/cx18/cx18-av-core.c
718
if (i == 0 && ch[i] == C)
drivers/net/dsa/yt921x.c
1139
static u32 rate2token(u64 rate, unsigned int slot_ns, int unit, int C)
drivers/net/dsa/yt921x.c
1141
int e = 2 * unit + C + YT921X_TOKEN_RATE_C;
drivers/net/dsa/yt921x.c
1146
static u64 token2rate(u32 token, unsigned int slot_ns, int unit, int C)
drivers/net/dsa/yt921x.c
1148
int e = 2 * unit + C + YT921X_TOKEN_RATE_C;
drivers/net/dsa/yt921x.c
1154
static u32 burst2token(u64 burst, int unit, int C)
drivers/net/dsa/yt921x.c
1156
return ldexpu64(burst, -(2 * unit + C));
drivers/net/dsa/yt921x.c
1159
static u64 token2burst(u32 token, int unit, int C)
drivers/net/dsa/yt921x.c
1161
return ldexpu64(token, 2 * unit + C);
drivers/net/dsa/yt921x.c
1181
const int C = flags & YT921X_MARKER_PKT_MODE ? YT921X_TOKEN_PKT_C :
drivers/net/dsa/yt921x.c
1191
rate_max = token2rate(cir_max, slot_ns, m.unit, C);
drivers/net/dsa/yt921x.c
1192
burst_max = token2burst(cbs_max, m.unit, C);
drivers/net/dsa/yt921x.c
1222
m.cir = rate2token(rate, slot_ns, m.unit, C);
drivers/net/dsa/yt921x.c
1227
m.cbs = burst2token(burst, m.unit, C);
drivers/net/dsa/yt921x.c
1245
m.cbs = burst2token(burst_est, m.unit, C);
drivers/net/ethernet/aeroflex/greth.c
87
#define SKIP_TX(N, C) (((N) + C) & GRETH_TXBD_NUM_MASK)
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7730
u8 C[8];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7742
C[i] = crc & 1;
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7747
D[16] ^ D[14] ^ D[12] ^ D[8] ^ D[7] ^ D[6] ^ D[0] ^ C[4] ^
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7748
C[6] ^ C[7];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7751
D[12] ^ D[9] ^ D[6] ^ D[1] ^ D[0] ^ C[0] ^ C[4] ^ C[5] ^
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7752
C[6];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7755
C[0] ^ C[1] ^ C[4] ^ C[5];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7758
C[1] ^ C[2] ^ C[5] ^ C[6];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7761
C[0] ^ C[2] ^ C[3] ^ C[6] ^ C[7];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7763
D[15] ^ D[13] ^ D[11] ^ D[9] ^ D[5] ^ D[4] ^ D[3] ^ C[1] ^
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7764
C[3] ^ C[4] ^ C[7];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7766
D[14] ^ D[12] ^ D[10] ^ D[6] ^ D[5] ^ D[4] ^ C[2] ^ C[4] ^
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7767
C[5];
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7769
D[15] ^ D[13] ^ D[11] ^ D[7] ^ D[6] ^ D[5] ^ C[3] ^ C[5] ^
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
7770
C[6];
drivers/net/ethernet/sfc/falcon/nic.c
190
#define REGISTER_CZ(name) REGISTER(name, F, C, Z)
drivers/net/ethernet/sfc/falcon/nic.c
325
REGISTER_TABLE_DIMENSIONS(name, FR_BZ_ ## name, F, C, Z, \
drivers/net/ethernet/sfc/falcon/nic.c
328
#define REGISTER_TABLE_CZ(name) REGISTER_TABLE(name, F, C, Z)
drivers/net/ethernet/sfc/siena/nic.c
196
#define REGISTER_CZ(name) REGISTER(name, F, C, Z)
drivers/net/ethernet/sfc/siena/nic.c
331
REGISTER_TABLE_DIMENSIONS(name, FR_BZ_ ## name, F, C, Z, \
drivers/net/ethernet/sfc/siena/nic.c
334
#define REGISTER_TABLE_CZ(name) REGISTER_TABLE(name, F, C, Z)
drivers/net/wan/farsync.c
492
#define FST_RDB(C, E) (readb((C)->mem + WIN_OFFSET(E)))
drivers/net/wan/farsync.c
493
#define FST_RDW(C, E) (readw((C)->mem + WIN_OFFSET(E)))
drivers/net/wan/farsync.c
494
#define FST_RDL(C, E) (readl((C)->mem + WIN_OFFSET(E)))
drivers/net/wan/farsync.c
496
#define FST_WRB(C, E, B) (writeb((B), (C)->mem + WIN_OFFSET(E)))
drivers/net/wan/farsync.c
497
#define FST_WRW(C, E, W) (writew((W), (C)->mem + WIN_OFFSET(E)))
drivers/net/wan/farsync.c
498
#define FST_WRL(C, E, L) (writel((L), (C)->mem + WIN_OFFSET(E)))
drivers/net/wireless/realtek/rtw88/rtw8814a_table.c
12551
RTW_DECL_TABLE_RF_RADIO(rtw8814a_rf_c, C);
drivers/net/wireless/virtual/mac80211_hwsim_main.c
2813
C(20);
drivers/net/wireless/virtual/mac80211_hwsim_main.c
2814
C(40);
drivers/net/wireless/virtual/mac80211_hwsim_main.c
2815
C(80);
drivers/net/wireless/virtual/mac80211_hwsim_main.c
2816
C(160);
drivers/net/wireless/virtual/mac80211_hwsim_main.c
2817
C(320);
drivers/nvdimm/security.c
495
C( OP_FREEZE, "freeze", 1), \
drivers/nvdimm/security.c
496
C( OP_DISABLE, "disable", 2), \
drivers/nvdimm/security.c
497
C( OP_DISABLE_MASTER, "disable_master", 2), \
drivers/nvdimm/security.c
498
C( OP_UPDATE, "update", 3), \
drivers/nvdimm/security.c
499
C( OP_ERASE, "erase", 2), \
drivers/nvdimm/security.c
500
C( OP_OVERWRITE, "overwrite", 2), \
drivers/nvdimm/security.c
501
C( OP_MASTER_UPDATE, "master_update", 3), \
drivers/nvdimm/security.c
502
C( OP_MASTER_ERASE, "master_erase", 2)
drivers/perf/arm_pmuv3.c
100
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR,
drivers/perf/arm_pmuv3.c
102
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD,
drivers/perf/arm_pmuv3.c
103
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR,
drivers/perf/arm_pmuv3.c
105
[C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
drivers/perf/arm_pmuv3.c
106
[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
drivers/perf/arm_pmuv3.c
114
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD,
drivers/perf/arm_pmuv3.c
115
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
drivers/perf/arm_pmuv3.c
123
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD,
drivers/perf/arm_pmuv3.c
124
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD,
drivers/perf/arm_pmuv3.c
125
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
drivers/perf/arm_pmuv3.c
126
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1D_CACHE_MISS_ST,
drivers/perf/arm_pmuv3.c
127
[C(L1D)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1D_CACHE_PREF_ACCESS,
drivers/perf/arm_pmuv3.c
128
[C(L1D)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1D_CACHE_PREF_MISS,
drivers/perf/arm_pmuv3.c
130
[C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_ACCESS,
drivers/perf/arm_pmuv3.c
131
[C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_MISS,
drivers/perf/arm_pmuv3.c
133
[C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD,
drivers/perf/arm_pmuv3.c
134
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD,
drivers/perf/arm_pmuv3.c
135
[C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR,
drivers/perf/arm_pmuv3.c
136
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR,
drivers/perf/arm_pmuv3.c
144
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD,
drivers/perf/arm_pmuv3.c
145
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD,
drivers/perf/arm_pmuv3.c
146
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
drivers/perf/arm_pmuv3.c
147
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR,
drivers/perf/arm_pmuv3.c
149
[C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD,
drivers/perf/arm_pmuv3.c
150
[C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR,
drivers/perf/arm_pmuv3.c
151
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD,
drivers/perf/arm_pmuv3.c
152
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR,
drivers/perf/arm_pmuv3.c
154
[C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
drivers/perf/arm_pmuv3.c
155
[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
drivers/perf/arm_pmuv3.c
62
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1D_CACHE,
drivers/perf/arm_pmuv3.c
63
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL,
drivers/perf/arm_pmuv3.c
65
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE,
drivers/perf/arm_pmuv3.c
66
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL,
drivers/perf/arm_pmuv3.c
68
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL,
drivers/perf/arm_pmuv3.c
69
[C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1D_TLB,
drivers/perf/arm_pmuv3.c
71
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL,
drivers/perf/arm_pmuv3.c
72
[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1I_TLB,
drivers/perf/arm_pmuv3.c
74
[C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD,
drivers/perf/arm_pmuv3.c
75
[C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_LL_CACHE_RD,
drivers/perf/arm_pmuv3.c
77
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_BR_PRED,
drivers/perf/arm_pmuv3.c
78
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_BR_MIS_PRED,
drivers/perf/arm_pmuv3.c
86
[C(L1D)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_A53_PERFCTR_PREF_LINEFILL,
drivers/perf/arm_pmuv3.c
88
[C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD,
drivers/perf/arm_pmuv3.c
89
[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR,
drivers/perf/arm_pmuv3.c
97
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD,
drivers/perf/arm_pmuv3.c
98
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD,
drivers/perf/arm_pmuv3.c
99
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR,
drivers/perf/arm_v6_pmu.c
100
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS,
drivers/perf/arm_v6_pmu.c
108
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_DTLB_MISS,
drivers/perf/arm_v6_pmu.c
109
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6_PERFCTR_DTLB_MISS,
drivers/perf/arm_v6_pmu.c
111
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_ITLB_MISS,
drivers/perf/arm_v6_pmu.c
112
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6_PERFCTR_ITLB_MISS,
drivers/perf/arm_v6_pmu.c
95
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS,
drivers/perf/arm_v6_pmu.c
96
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS,
drivers/perf/arm_v6_pmu.c
97
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS,
drivers/perf/arm_v6_pmu.c
98
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS,
drivers/perf/arm_v7_pmu.c
177
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
178
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
179
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
180
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
182
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
183
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
drivers/perf/arm_v7_pmu.c
185
[C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
186
[C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
drivers/perf/arm_v7_pmu.c
187
[C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
188
[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
drivers/perf/arm_v7_pmu.c
190
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
191
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
193
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
194
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
196
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
197
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
198
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
199
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
227
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
228
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
229
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
230
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
232
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
drivers/perf/arm_v7_pmu.c
234
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
235
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
237
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
238
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
240
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
241
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
242
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
243
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
264
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
265
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
266
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
267
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
268
[C(L1D)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
drivers/perf/arm_v7_pmu.c
269
[C(L1D)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
drivers/perf/arm_v7_pmu.c
271
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
272
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
drivers/perf/arm_v7_pmu.c
277
[C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
drivers/perf/arm_v7_pmu.c
278
[C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
drivers/perf/arm_v7_pmu.c
280
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
281
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
283
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
284
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
286
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
287
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
288
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
289
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
311
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ,
drivers/perf/arm_v7_pmu.c
312
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ,
drivers/perf/arm_v7_pmu.c
313
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE,
drivers/perf/arm_v7_pmu.c
314
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE,
drivers/perf/arm_v7_pmu.c
321
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
322
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
drivers/perf/arm_v7_pmu.c
324
[C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ,
drivers/perf/arm_v7_pmu.c
325
[C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ,
drivers/perf/arm_v7_pmu.c
326
[C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE,
drivers/perf/arm_v7_pmu.c
327
[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE,
drivers/perf/arm_v7_pmu.c
329
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ,
drivers/perf/arm_v7_pmu.c
330
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE,
drivers/perf/arm_v7_pmu.c
332
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
333
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
335
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
336
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
337
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
338
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
365
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
366
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
367
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
368
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
370
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
371
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
drivers/perf/arm_v7_pmu.c
373
[C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_CACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
374
[C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL,
drivers/perf/arm_v7_pmu.c
375
[C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_CACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
376
[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL,
drivers/perf/arm_v7_pmu.c
378
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
379
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
381
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
382
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
384
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
385
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
386
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
387
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
409
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L1_DCACHE_ACCESS_READ,
drivers/perf/arm_v7_pmu.c
410
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
411
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L1_DCACHE_ACCESS_WRITE,
drivers/perf/arm_v7_pmu.c
412
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
419
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
420
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
drivers/perf/arm_v7_pmu.c
422
[C(LL)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L2_CACHE_ACCESS_READ,
drivers/perf/arm_v7_pmu.c
423
[C(LL)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL,
drivers/perf/arm_v7_pmu.c
424
[C(LL)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_A12_PERFCTR_L2_CACHE_ACCESS_WRITE,
drivers/perf/arm_v7_pmu.c
425
[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACHE_REFILL,
drivers/perf/arm_v7_pmu.c
427
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
428
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL,
drivers/perf/arm_v7_pmu.c
429
[C(DTLB)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV7_A12_PERFCTR_PF_TLB_REFILL,
drivers/perf/arm_v7_pmu.c
431
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
432
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL,
drivers/perf/arm_v7_pmu.c
434
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
435
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
436
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
437
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
470
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
471
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
472
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
473
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
475
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = KRAIT_PERFCTR_L1_ICACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
476
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = KRAIT_PERFCTR_L1_ICACHE_MISS,
drivers/perf/arm_v7_pmu.c
478
[C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = KRAIT_PERFCTR_L1_DTLB_ACCESS,
drivers/perf/arm_v7_pmu.c
479
[C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = KRAIT_PERFCTR_L1_DTLB_ACCESS,
drivers/perf/arm_v7_pmu.c
481
[C(ITLB)][C(OP_READ)][C(RESULT_ACCESS)] = KRAIT_PERFCTR_L1_ITLB_ACCESS,
drivers/perf/arm_v7_pmu.c
482
[C(ITLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = KRAIT_PERFCTR_L1_ITLB_ACCESS,
drivers/perf/arm_v7_pmu.c
484
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
485
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
486
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
487
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
511
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
512
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
513
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
514
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
drivers/perf/arm_v7_pmu.c
515
[C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_ICACHE_ACCESS,
drivers/perf/arm_v7_pmu.c
516
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_ICACHE_MISS,
drivers/perf/arm_v7_pmu.c
521
[C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_DTLB_ACCESS,
drivers/perf/arm_v7_pmu.c
522
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_DTLB_MISS,
drivers/perf/arm_v7_pmu.c
523
[C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = SCORPION_DTLB_ACCESS,
drivers/perf/arm_v7_pmu.c
524
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = SCORPION_DTLB_MISS,
drivers/perf/arm_v7_pmu.c
525
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
drivers/perf/arm_v7_pmu.c
526
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
drivers/perf/arm_v7_pmu.c
527
[C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
528
[C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_v7_pmu.c
529
[C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
drivers/perf/arm_v7_pmu.c
530
[C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
drivers/perf/arm_xscale_pmu.c
73
[C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = XSCALE_PERFCTR_DCACHE_ACCESS,
drivers/perf/arm_xscale_pmu.c
74
[C(L1D)][C(OP_READ)][C(RESULT_MISS)] = XSCALE_PERFCTR_DCACHE_MISS,
drivers/perf/arm_xscale_pmu.c
75
[C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = XSCALE_PERFCTR_DCACHE_ACCESS,
drivers/perf/arm_xscale_pmu.c
76
[C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = XSCALE_PERFCTR_DCACHE_MISS,
drivers/perf/arm_xscale_pmu.c
78
[C(L1I)][C(OP_READ)][C(RESULT_MISS)] = XSCALE_PERFCTR_ICACHE_MISS,
drivers/perf/arm_xscale_pmu.c
80
[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = XSCALE_PERFCTR_DTLB_MISS,
drivers/perf/arm_xscale_pmu.c
81
[C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = XSCALE_PERFCTR_DTLB_MISS,
drivers/perf/arm_xscale_pmu.c
83
[C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = XSCALE_PERFCTR_ITLB_MISS,
drivers/perf/arm_xscale_pmu.c
84
[C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = XSCALE_PERFCTR_ITLB_MISS,
drivers/perf/riscv_pmu_sbi.c
160
[C(L1D)] = {
drivers/perf/riscv_pmu_sbi.c
161
[C(OP_READ)] = {
drivers/perf/riscv_pmu_sbi.c
162
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
163
C(OP_READ), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
164
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
165
C(OP_READ), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
167
[C(OP_WRITE)] = {
drivers/perf/riscv_pmu_sbi.c
168
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
169
C(OP_WRITE), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
170
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
171
C(OP_WRITE), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
173
[C(OP_PREFETCH)] = {
drivers/perf/riscv_pmu_sbi.c
174
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
175
C(OP_PREFETCH), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
176
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
177
C(OP_PREFETCH), C(L1D), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
180
[C(L1I)] = {
drivers/perf/riscv_pmu_sbi.c
181
[C(OP_READ)] = {
drivers/perf/riscv_pmu_sbi.c
182
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
183
C(OP_READ), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
184
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS), C(OP_READ),
drivers/perf/riscv_pmu_sbi.c
185
C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
187
[C(OP_WRITE)] = {
drivers/perf/riscv_pmu_sbi.c
188
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
189
C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
190
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
191
C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
193
[C(OP_PREFETCH)] = {
drivers/perf/riscv_pmu_sbi.c
194
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
195
C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
196
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
197
C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
200
[C(LL)] = {
drivers/perf/riscv_pmu_sbi.c
201
[C(OP_READ)] = {
drivers/perf/riscv_pmu_sbi.c
202
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
203
C(OP_READ), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
204
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
205
C(OP_READ), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
207
[C(OP_WRITE)] = {
drivers/perf/riscv_pmu_sbi.c
208
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
209
C(OP_WRITE), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
210
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
211
C(OP_WRITE), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
213
[C(OP_PREFETCH)] = {
drivers/perf/riscv_pmu_sbi.c
214
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
215
C(OP_PREFETCH), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
216
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
217
C(OP_PREFETCH), C(LL), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
220
[C(DTLB)] = {
drivers/perf/riscv_pmu_sbi.c
221
[C(OP_READ)] = {
drivers/perf/riscv_pmu_sbi.c
222
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
223
C(OP_READ), C(DTLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
224
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
225
C(OP_READ), C(DTLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
227
[C(OP_WRITE)] = {
drivers/perf/riscv_pmu_sbi.c
228
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
229
C(OP_WRITE), C(DTLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
230
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
231
C(OP_WRITE), C(DTLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
233
[C(OP_PREFETCH)] = {
drivers/perf/riscv_pmu_sbi.c
234
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
235
C(OP_PREFETCH), C(DTLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
236
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
237
C(OP_PREFETCH), C(DTLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
240
[C(ITLB)] = {
drivers/perf/riscv_pmu_sbi.c
241
[C(OP_READ)] = {
drivers/perf/riscv_pmu_sbi.c
242
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
243
C(OP_READ), C(ITLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
244
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
245
C(OP_READ), C(ITLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
247
[C(OP_WRITE)] = {
drivers/perf/riscv_pmu_sbi.c
248
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
249
C(OP_WRITE), C(ITLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
250
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
251
C(OP_WRITE), C(ITLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
253
[C(OP_PREFETCH)] = {
drivers/perf/riscv_pmu_sbi.c
254
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
255
C(OP_PREFETCH), C(ITLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
256
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
257
C(OP_PREFETCH), C(ITLB), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
260
[C(BPU)] = {
drivers/perf/riscv_pmu_sbi.c
261
[C(OP_READ)] = {
drivers/perf/riscv_pmu_sbi.c
262
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
263
C(OP_READ), C(BPU), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
264
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
265
C(OP_READ), C(BPU), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
267
[C(OP_WRITE)] = {
drivers/perf/riscv_pmu_sbi.c
268
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
269
C(OP_WRITE), C(BPU), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
270
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
271
C(OP_WRITE), C(BPU), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
273
[C(OP_PREFETCH)] = {
drivers/perf/riscv_pmu_sbi.c
274
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
275
C(OP_PREFETCH), C(BPU), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
276
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
277
C(OP_PREFETCH), C(BPU), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
280
[C(NODE)] = {
drivers/perf/riscv_pmu_sbi.c
281
[C(OP_READ)] = {
drivers/perf/riscv_pmu_sbi.c
282
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
283
C(OP_READ), C(NODE), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
284
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
285
C(OP_READ), C(NODE), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
287
[C(OP_WRITE)] = {
drivers/perf/riscv_pmu_sbi.c
288
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
289
C(OP_WRITE), C(NODE), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
290
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
291
C(OP_WRITE), C(NODE), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
293
[C(OP_PREFETCH)] = {
drivers/perf/riscv_pmu_sbi.c
294
[C(RESULT_ACCESS)] = {.hw_cache_event = {C(RESULT_ACCESS),
drivers/perf/riscv_pmu_sbi.c
295
C(OP_PREFETCH), C(NODE), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/perf/riscv_pmu_sbi.c
296
[C(RESULT_MISS)] = {.hw_cache_event = {C(RESULT_MISS),
drivers/perf/riscv_pmu_sbi.c
297
C(OP_PREFETCH), C(NODE), SBI_PMU_EVENT_TYPE_CACHE, 0}},
drivers/phy/freescale/phy-fsl-lynx-10g.c
746
pccr->shift = QSGMII_CFG(C);
drivers/phy/freescale/phy-fsl-lynx-10g.c
786
return QSGMIIaCR0(C);
drivers/pinctrl/actions/pinctrl-s500.c
1629
OWL_GPIO_PORT(C, 0x0018, 32, 0x0, 0x4, 0x8, 0x1EC, 0x200, 0x204, 0x228, 2),
drivers/pinctrl/actions/pinctrl-s700.c
1811
OWL_GPIO_PORT(C, 0x0018, 32, 0x0, 0x4, 0x8, 0x204, 0x218, 0x21C, 0x240, 2),
drivers/pinctrl/actions/pinctrl-s900.c
1715
OWL_GPIO_PORT(C, 0x0018, 12, 0x0, 0x4, 0x8, 0x52C, 0x200, 0x204, 0x238, 0),
drivers/pinctrl/renesas/pinctrl-rzg2l.c
2325
RZG2L_GPIO_PORT_PACK(5, 0x35, RZG3L_MPXED_PIN_FUNCS(C)), /* PL */
drivers/pinctrl/renesas/pinctrl-rzg2l.c
2326
RZG2L_GPIO_PORT_PACK(8, 0x36, RZG3L_MPXED_PIN_FUNCS(C)), /* PM */
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
157
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
164
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
170
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
176
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
182
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
189
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
196
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
205
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
374
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
379
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
384
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
389
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
393
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
397
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
403
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
408
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
413
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
418
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
423
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
428
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
433
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
439
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
445
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
451
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
457
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
461
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
465
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
469
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
474
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
479
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
484
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
489
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
493
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
100
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
106
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
112
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
118
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
124
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
130
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
136
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
142
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
148
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
154
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
160
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
166
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
172
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
178
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
184
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
191
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
94
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
101
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
106
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
111
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
115
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
120
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
125
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
129
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
134
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
139
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
144
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
149
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
154
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
159
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
164
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
169
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
90
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
95
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
152
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
157
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
163
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
168
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
173
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
178
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
183
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
188
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
192
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
197
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
202
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
207
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
212
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
217
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
222
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
227
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
232
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
106
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
111
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
116
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
121
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
126
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
131
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
137
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
143
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
149
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
154
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
159
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
164
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
169
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
174
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
179
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
184
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
188
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
101
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
107
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
113
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
119
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
125
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
131
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
137
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
143
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
149
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
155
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
161
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
167
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
172
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
178
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
184
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
191
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
94
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
280
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
285
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
290
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
295
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
300
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
304
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
308
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
313
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
318
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
323
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
328
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
333
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
338
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
343
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
348
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
353
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
358
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
364
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 17),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
370
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 18),
drivers/pinctrl/sunxi/pinctrl-sun5i.c
377
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
302
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
307
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
312
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
317
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
321
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
325
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
329
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
335
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
341
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
347
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
353
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
359
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
365
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
371
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
377
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
383
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
390
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 16), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
395
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 17), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
400
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 18), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
405
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 19), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
410
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 20), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
415
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 21), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
420
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 22), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
425
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 23), PINCTRL_SUN6I_A31,
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
430
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
436
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
440
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26),
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
444
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
111
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
116
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
121
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
126
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
131
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
135
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
140
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
145
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
149
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
154
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
159
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
164
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
169
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
174
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
179
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
184
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
189
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
194
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
198
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
100
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
105
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
109
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
114
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
119
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
124
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
129
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
134
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
139
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
144
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
149
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
71
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
76
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
81
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
86
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
91
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
95
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
104
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
109
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
113
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
118
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
123
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
127
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
132
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
137
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
142
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
147
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
152
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
157
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
162
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
167
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
172
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
176
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
89
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
94
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
99
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
149
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
154
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
159
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
164
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
169
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
173
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
178
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
183
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
187
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
192
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
197
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
202
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
207
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
212
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
217
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
222
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
227
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
107
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
112
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
117
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
122
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
127
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
132
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
137
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
142
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
147
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
152
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
157
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
162
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
167
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
172
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
177
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
181
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
185
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
189
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
194
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
199
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
204
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
209
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
214
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
219
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
224
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
229
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
234
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
239
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
244
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
249
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
254
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
drivers/pinctrl/sunxi/pinctrl-suniv-f1c100s.c
100
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
drivers/pinctrl/sunxi/pinctrl-suniv-f1c100s.c
105
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
drivers/pinctrl/sunxi/pinctrl-suniv-f1c100s.c
110
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
drivers/pinctrl/sunxi/pinctrl-suniv-f1c100s.c
96
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
drivers/pwm/pwm-pca9685.c
80
#define REG_ON_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C)))
drivers/pwm/pwm-pca9685.c
81
#define REG_ON_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C)))
drivers/pwm/pwm-pca9685.c
82
#define REG_OFF_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C)))
drivers/pwm/pwm-pca9685.c
83
#define REG_OFF_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C)))
drivers/regulator/rtq2208-regulator.c
393
BUCK_INFO("buck-c", C),
drivers/scsi/aic94xx/aic94xx_dump.c
210
asd_read_reg_byte(_ha, C##_n))
drivers/scsi/aic94xx/aic94xx_dump.c
212
asd_read_reg_word(_ha, C##_n))
drivers/scsi/aic94xx/aic94xx_dump.c
214
asd_read_reg_dword(_ha, C##_n))
drivers/scsi/isci/phy.h
377
C(PHY_INITIAL),\
drivers/scsi/isci/phy.h
378
C(PHY_STOPPED),\
drivers/scsi/isci/phy.h
379
C(PHY_STARTING),\
drivers/scsi/isci/phy.h
380
C(PHY_SUB_INITIAL),\
drivers/scsi/isci/phy.h
381
C(PHY_SUB_AWAIT_OSSP_EN),\
drivers/scsi/isci/phy.h
382
C(PHY_SUB_AWAIT_SAS_SPEED_EN),\
drivers/scsi/isci/phy.h
383
C(PHY_SUB_AWAIT_IAF_UF),\
drivers/scsi/isci/phy.h
384
C(PHY_SUB_AWAIT_SAS_POWER),\
drivers/scsi/isci/phy.h
385
C(PHY_SUB_AWAIT_SATA_POWER),\
drivers/scsi/isci/phy.h
386
C(PHY_SUB_AWAIT_SATA_PHY_EN),\
drivers/scsi/isci/phy.h
387
C(PHY_SUB_AWAIT_SATA_SPEED_EN),\
drivers/scsi/isci/phy.h
388
C(PHY_SUB_AWAIT_SIG_FIS_UF),\
drivers/scsi/isci/phy.h
389
C(PHY_SUB_FINAL),\
drivers/scsi/isci/phy.h
390
C(PHY_READY),\
drivers/scsi/isci/phy.h
391
C(PHY_RESETTING),\
drivers/scsi/isci/phy.h
392
C(PHY_FINAL),\
drivers/scsi/isci/port.h
175
C(PORT_STOPPED),\
drivers/scsi/isci/port.h
176
C(PORT_STOPPING),\
drivers/scsi/isci/port.h
177
C(PORT_READY),\
drivers/scsi/isci/port.h
178
C(PORT_SUB_WAITING),\
drivers/scsi/isci/port.h
179
C(PORT_SUB_OPERATIONAL),\
drivers/scsi/isci/port.h
180
C(PORT_SUB_CONFIGURING),\
drivers/scsi/isci/port.h
181
C(PORT_RESETTING),\
drivers/scsi/isci/port.h
182
C(PORT_FAILED),\
drivers/scsi/isci/remote_device.h
238
C(DEV_INITIAL),\
drivers/scsi/isci/remote_device.h
239
C(DEV_STOPPED),\
drivers/scsi/isci/remote_device.h
240
C(DEV_STARTING),\
drivers/scsi/isci/remote_device.h
241
C(DEV_READY),\
drivers/scsi/isci/remote_device.h
242
C(STP_DEV_IDLE),\
drivers/scsi/isci/remote_device.h
243
C(STP_DEV_CMD),\
drivers/scsi/isci/remote_device.h
244
C(STP_DEV_NCQ),\
drivers/scsi/isci/remote_device.h
245
C(STP_DEV_NCQ_ERROR),\
drivers/scsi/isci/remote_device.h
246
C(STP_DEV_ATAPI_ERROR),\
drivers/scsi/isci/remote_device.h
247
C(STP_DEV_AWAIT_RESET),\
drivers/scsi/isci/remote_device.h
248
C(SMP_DEV_IDLE),\
drivers/scsi/isci/remote_device.h
249
C(SMP_DEV_CMD),\
drivers/scsi/isci/remote_device.h
250
C(DEV_STOPPING),\
drivers/scsi/isci/remote_device.h
251
C(DEV_FAILED),\
drivers/scsi/isci/remote_device.h
252
C(DEV_RESETTING),\
drivers/scsi/isci/remote_device.h
253
C(DEV_FINAL),\
drivers/scsi/isci/remote_node_context.h
123
C(RNC_INITIAL),\
drivers/scsi/isci/remote_node_context.h
124
C(RNC_POSTING),\
drivers/scsi/isci/remote_node_context.h
125
C(RNC_INVALIDATING),\
drivers/scsi/isci/remote_node_context.h
126
C(RNC_RESUMING),\
drivers/scsi/isci/remote_node_context.h
127
C(RNC_READY),\
drivers/scsi/isci/remote_node_context.h
128
C(RNC_TX_SUSPENDED),\
drivers/scsi/isci/remote_node_context.h
129
C(RNC_TX_RX_SUSPENDED),\
drivers/scsi/isci/remote_node_context.h
130
C(RNC_AWAIT_SUSPENSION),\
drivers/scsi/isci/request.h
228
C(REQ_INIT),\
drivers/scsi/isci/request.h
229
C(REQ_CONSTRUCTED),\
drivers/scsi/isci/request.h
230
C(REQ_STARTED),\
drivers/scsi/isci/request.h
231
C(REQ_STP_UDMA_WAIT_TC_COMP),\
drivers/scsi/isci/request.h
232
C(REQ_STP_UDMA_WAIT_D2H),\
drivers/scsi/isci/request.h
233
C(REQ_STP_NON_DATA_WAIT_H2D),\
drivers/scsi/isci/request.h
234
C(REQ_STP_NON_DATA_WAIT_D2H),\
drivers/scsi/isci/request.h
235
C(REQ_STP_PIO_WAIT_H2D),\
drivers/scsi/isci/request.h
236
C(REQ_STP_PIO_WAIT_FRAME),\
drivers/scsi/isci/request.h
237
C(REQ_STP_PIO_DATA_IN),\
drivers/scsi/isci/request.h
238
C(REQ_STP_PIO_DATA_OUT),\
drivers/scsi/isci/request.h
239
C(REQ_ATAPI_WAIT_H2D),\
drivers/scsi/isci/request.h
240
C(REQ_ATAPI_WAIT_PIO_SETUP),\
drivers/scsi/isci/request.h
241
C(REQ_ATAPI_WAIT_D2H),\
drivers/scsi/isci/request.h
242
C(REQ_ATAPI_WAIT_TC_COMP),\
drivers/scsi/isci/request.h
243
C(REQ_TASK_WAIT_TC_COMP),\
drivers/scsi/isci/request.h
244
C(REQ_TASK_WAIT_TC_RESP),\
drivers/scsi/isci/request.h
245
C(REQ_SMP_WAIT_RESP),\
drivers/scsi/isci/request.h
246
C(REQ_SMP_WAIT_TC_COMP),\
drivers/scsi/isci/request.h
247
C(REQ_COMPLETED),\
drivers/scsi/isci/request.h
248
C(REQ_ABORTING),\
drivers/scsi/isci/request.h
249
C(REQ_FINAL),\
drivers/scsi/lpfc/lpfc_init.c
2957
uint32_t A, B, C, D, E;
drivers/scsi/lpfc/lpfc_init.c
2969
C = HashResultPointer[2];
drivers/scsi/lpfc/lpfc_init.c
2975
TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
drivers/scsi/lpfc/lpfc_init.c
2977
TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
drivers/scsi/lpfc/lpfc_init.c
2979
TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
drivers/scsi/lpfc/lpfc_init.c
2981
TEMP = (B ^ C ^ D) + 0xCA62C1D6;
drivers/scsi/lpfc/lpfc_init.c
2985
D = C;
drivers/scsi/lpfc/lpfc_init.c
2986
C = S(30, B);
drivers/scsi/lpfc/lpfc_init.c
2993
HashResultPointer[2] += C;
drivers/usb/renesas_usbhs/pipe.c
137
CASE_PIPExTRN(C);
drivers/usb/renesas_usbhs/pipe.c
173
CASE_PIPExTRE(C);
drivers/video/fbdev/sis/init.c
3543
int B, C, D, E, F, temp;
drivers/video/fbdev/sis/init.c
3570
C = (temp > 0) ? temp : (temp + 64);
drivers/video/fbdev/sis/init.c
3572
D = B - F - C;
drivers/video/fbdev/sis/init.c
3577
var->hsync_len = C * 8;
drivers/video/fbdev/sis/init.c
3605
C = (temp > 0) ? temp : (temp + 32);
drivers/video/fbdev/sis/init.c
3607
D = B - F - C;
drivers/video/fbdev/sis/init.c
3612
var->vsync_len = C;
drivers/video/fbdev/stifb.c
385
#define BA(F,C,S,A,J,B,I) \
drivers/video/fbdev/stifb.c
386
(((F)<<31)|((C)<<27)|((S)<<24)|((A)<<21)|((J)<<16)|((B)<<12)|(I))
fs/afs/internal.h
1925
#define ASSERTIF(C, X) \
fs/afs/internal.h
1927
if (unlikely((C) && !(X))) { \
fs/afs/internal.h
1934
#define ASSERTIFCMP(C, X, OP, Y) \
fs/afs/internal.h
1936
if (unlikely((C) && !((X) OP (Y)))) { \
fs/afs/internal.h
1961
#define ASSERTIF(C, X) \
fs/afs/internal.h
1965
#define ASSERTIFCMP(C, X, OP, Y) \
fs/cachefiles/internal.h
515
#define ASSERTIF(C, X) \
fs/cachefiles/internal.h
517
if (unlikely((C) && !(X))) { \
fs/cachefiles/internal.h
524
#define ASSERTIFCMP(C, X, OP, Y) \
fs/cachefiles/internal.h
526
if (unlikely((C) && !((X) OP (Y)))) { \
fs/cachefiles/internal.h
539
#define ASSERTIF(C, X) do {} while (0)
fs/cachefiles/internal.h
540
#define ASSERTIFCMP(C, X, OP, Y) do {} while (0)
fs/netfs/internal.h
525
#define ASSERTIF(C, X) \
fs/netfs/internal.h
527
if (unlikely((C) && !(X))) { \
fs/netfs/internal.h
534
#define ASSERTIFCMP(C, X, OP, Y) \
fs/netfs/internal.h
536
if (unlikely((C) && !((X) OP (Y)))) { \
fs/netfs/internal.h
549
#define ASSERTIF(C, X) do {} while (0)
fs/netfs/internal.h
550
#define ASSERTIFCMP(C, X, OP, Y) do {} while (0)
include/linux/perf/arm_pmu.h
47
[0 ... C(MAX) - 1] = { \
include/linux/perf/arm_pmu.h
48
[0 ... C(OP_MAX) - 1] = { \
include/linux/perf/arm_pmu.h
49
[0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
kernel/trace/trace.h
1422
C(DISPLAY_GRAPH, "display-graph"),
kernel/trace/trace.h
1429
C(BRANCH, "branch"),
kernel/trace/trace.h
1436
C(FUNCTION, "function-trace"), \
kernel/trace/trace.h
1437
C(FUNC_FORK, "function-fork"),
kernel/trace/trace.h
1447
C(STACKTRACE, "stacktrace"),
kernel/trace/trace.h
1454
C(PROF_TEXT_OFFSET, "prof-text-offset"),
kernel/trace/trace.h
1457
C(GRAPH_TIME, "graph-time"),
kernel/trace/trace.h
1478
C(PRINT_PARENT, "print-parent"), \
kernel/trace/trace.h
1479
C(SYM_OFFSET, "sym-offset"), \
kernel/trace/trace.h
1480
C(SYM_ADDR, "sym-addr"), \
kernel/trace/trace.h
1481
C(VERBOSE, "verbose"), \
kernel/trace/trace.h
1482
C(RAW, "raw"), \
kernel/trace/trace.h
1483
C(HEX, "hex"), \
kernel/trace/trace.h
1484
C(BIN, "bin"), \
kernel/trace/trace.h
1485
C(BLOCK, "block"), \
kernel/trace/trace.h
1486
C(FIELDS, "fields"), \
kernel/trace/trace.h
1487
C(PRINTK, "trace_printk"), \
kernel/trace/trace.h
1488
C(ANNOTATE, "annotate"), \
kernel/trace/trace.h
1489
C(USERSTACKTRACE, "userstacktrace"), \
kernel/trace/trace.h
1490
C(SYM_USEROBJ, "sym-userobj"), \
kernel/trace/trace.h
1491
C(PRINTK_MSGONLY, "printk-msg-only"), \
kernel/trace/trace.h
1492
C(CONTEXT_INFO, "context-info"), /* Print pid/cpu/time */ \
kernel/trace/trace.h
1493
C(LATENCY_FMT, "latency-format"), \
kernel/trace/trace.h
1494
C(RECORD_CMD, "record-cmd"), \
kernel/trace/trace.h
1495
C(RECORD_TGID, "record-tgid"), \
kernel/trace/trace.h
1496
C(OVERWRITE, "overwrite"), \
kernel/trace/trace.h
1497
C(STOP_ON_FREE, "disable_on_free"), \
kernel/trace/trace.h
1498
C(IRQ_INFO, "irq-info"), \
kernel/trace/trace.h
1499
C(MARKERS, "markers"), \
kernel/trace/trace.h
1500
C(EVENT_FORK, "event-fork"), \
kernel/trace/trace.h
1501
C(TRACE_PRINTK, "trace_printk_dest"), \
kernel/trace/trace.h
1502
C(COPY_MARKER, "copy_trace_marker"), \
kernel/trace/trace.h
1503
C(PAUSE_ON_TRACE, "pause-on-trace"), \
kernel/trace/trace.h
1504
C(HASH_PTR, "hash-ptr"), /* Print hashed pointer */ \
kernel/trace/trace.h
1505
C(BITMASK_LIST, "bitmask-list"), \
kernel/trace/trace_events_filter.c
100
C(NONE, "No error"), \
kernel/trace/trace_events_filter.c
101
C(INVALID_OP, "Invalid operator"), \
kernel/trace/trace_events_filter.c
102
C(TOO_MANY_OPEN, "Too many '('"), \
kernel/trace/trace_events_filter.c
103
C(TOO_MANY_CLOSE, "Too few '('"), \
kernel/trace/trace_events_filter.c
104
C(MISSING_QUOTE, "Missing matching quote"), \
kernel/trace/trace_events_filter.c
105
C(MISSING_BRACE_OPEN, "Missing '{'"), \
kernel/trace/trace_events_filter.c
106
C(MISSING_BRACE_CLOSE, "Missing '}'"), \
kernel/trace/trace_events_filter.c
107
C(OPERAND_TOO_LONG, "Operand too long"), \
kernel/trace/trace_events_filter.c
108
C(EXPECT_STRING, "Expecting string field"), \
kernel/trace/trace_events_filter.c
109
C(EXPECT_DIGIT, "Expecting numeric field"), \
kernel/trace/trace_events_filter.c
110
C(ILLEGAL_FIELD_OP, "Illegal operation for field type"), \
kernel/trace/trace_events_filter.c
111
C(FIELD_NOT_FOUND, "Field not found"), \
kernel/trace/trace_events_filter.c
112
C(ILLEGAL_INTVAL, "Illegal integer value"), \
kernel/trace/trace_events_filter.c
113
C(BAD_SUBSYS_FILTER, "Couldn't find or set field in one of a subsystem's events"), \
kernel/trace/trace_events_filter.c
114
C(TOO_MANY_PREDS, "Too many terms in predicate expression"), \
kernel/trace/trace_events_filter.c
115
C(INVALID_FILTER, "Meaningless filter expression"), \
kernel/trace/trace_events_filter.c
116
C(INVALID_CPULIST, "Invalid cpulist"), \
kernel/trace/trace_events_filter.c
117
C(IP_FIELD_ONLY, "Only 'ip' field is supported for function trace"), \
kernel/trace/trace_events_filter.c
118
C(INVALID_VALUE, "Invalid value (did you forget quotes)?"), \
kernel/trace/trace_events_filter.c
119
C(NO_FUNCTION, "Function not found"), \
kernel/trace/trace_events_filter.c
120
C(ERRNO, "Error"), \
kernel/trace/trace_events_filter.c
121
C(NO_FILTER, "No filter found")
kernel/trace/trace_events_filter.c
26
C( OP_GLOB, "~" ), \
kernel/trace/trace_events_filter.c
27
C( OP_NE, "!=" ), \
kernel/trace/trace_events_filter.c
28
C( OP_EQ, "==" ), \
kernel/trace/trace_events_filter.c
29
C( OP_LE, "<=" ), \
kernel/trace/trace_events_filter.c
30
C( OP_LT, "<" ), \
kernel/trace/trace_events_filter.c
31
C( OP_GE, ">=" ), \
kernel/trace/trace_events_filter.c
32
C( OP_GT, ">" ), \
kernel/trace/trace_events_filter.c
33
C( OP_BAND, "&" ), \
kernel/trace/trace_events_filter.c
34
C( OP_MAX, NULL )
kernel/trace/trace_events_hist.c
110
C(NOP, "nop"), \
kernel/trace/trace_events_hist.c
111
C(VAR_REF, "var_ref"), \
kernel/trace/trace_events_hist.c
112
C(COUNTER, "counter"), \
kernel/trace/trace_events_hist.c
113
C(CONST, "const"), \
kernel/trace/trace_events_hist.c
114
C(LOG2, "log2"), \
kernel/trace/trace_events_hist.c
115
C(BUCKET, "bucket"), \
kernel/trace/trace_events_hist.c
116
C(TIMESTAMP, "timestamp"), \
kernel/trace/trace_events_hist.c
117
C(CPU, "cpu"), \
kernel/trace/trace_events_hist.c
118
C(COMM, "comm"), \
kernel/trace/trace_events_hist.c
119
C(STRING, "string"), \
kernel/trace/trace_events_hist.c
120
C(DYNSTRING, "dynstring"), \
kernel/trace/trace_events_hist.c
121
C(RELDYNSTRING, "reldynstring"), \
kernel/trace/trace_events_hist.c
122
C(PSTRING, "pstring"), \
kernel/trace/trace_events_hist.c
123
C(S64, "s64"), \
kernel/trace/trace_events_hist.c
124
C(U64, "u64"), \
kernel/trace/trace_events_hist.c
125
C(S32, "s32"), \
kernel/trace/trace_events_hist.c
126
C(U32, "u32"), \
kernel/trace/trace_events_hist.c
127
C(S16, "s16"), \
kernel/trace/trace_events_hist.c
128
C(U16, "u16"), \
kernel/trace/trace_events_hist.c
129
C(S8, "s8"), \
kernel/trace/trace_events_hist.c
130
C(U8, "u8"), \
kernel/trace/trace_events_hist.c
131
C(UMINUS, "uminus"), \
kernel/trace/trace_events_hist.c
132
C(MINUS, "minus"), \
kernel/trace/trace_events_hist.c
133
C(PLUS, "plus"), \
kernel/trace/trace_events_hist.c
134
C(DIV, "div"), \
kernel/trace/trace_events_hist.c
135
C(MULT, "mult"), \
kernel/trace/trace_events_hist.c
136
C(DIV_POWER2, "div_power2"), \
kernel/trace/trace_events_hist.c
137
C(DIV_NOT_POWER2, "div_not_power2"), \
kernel/trace/trace_events_hist.c
138
C(DIV_MULT_SHIFT, "div_mult_shift"), \
kernel/trace/trace_events_hist.c
139
C(EXECNAME, "execname"), \
kernel/trace/trace_events_hist.c
140
C(STACK, "stack"),
kernel/trace/trace_events_hist.c
26
C(NONE, "No error"), \
kernel/trace/trace_events_hist.c
27
C(DUPLICATE_VAR, "Variable already defined"), \
kernel/trace/trace_events_hist.c
28
C(VAR_NOT_UNIQUE, "Variable name not unique, need to use fully qualified name (subsys.event.var) for variable"), \
kernel/trace/trace_events_hist.c
29
C(TOO_MANY_VARS, "Too many variables defined"), \
kernel/trace/trace_events_hist.c
30
C(MALFORMED_ASSIGNMENT, "Malformed assignment"), \
kernel/trace/trace_events_hist.c
31
C(NAMED_MISMATCH, "Named hist trigger doesn't match existing named trigger (includes variables)"), \
kernel/trace/trace_events_hist.c
32
C(TRIGGER_EEXIST, "Hist trigger already exists"), \
kernel/trace/trace_events_hist.c
33
C(TRIGGER_ENOENT_CLEAR, "Can't clear or continue a nonexistent hist trigger"), \
kernel/trace/trace_events_hist.c
34
C(SET_CLOCK_FAIL, "Couldn't set trace_clock"), \
kernel/trace/trace_events_hist.c
35
C(BAD_FIELD_MODIFIER, "Invalid field modifier"), \
kernel/trace/trace_events_hist.c
36
C(TOO_MANY_SUBEXPR, "Too many subexpressions (3 max)"), \
kernel/trace/trace_events_hist.c
37
C(TIMESTAMP_MISMATCH, "Timestamp units in expression don't match"), \
kernel/trace/trace_events_hist.c
38
C(TOO_MANY_FIELD_VARS, "Too many field variables defined"), \
kernel/trace/trace_events_hist.c
39
C(EVENT_FILE_NOT_FOUND, "Event file not found"), \
kernel/trace/trace_events_hist.c
40
C(HIST_NOT_FOUND, "Matching event histogram not found"), \
kernel/trace/trace_events_hist.c
41
C(HIST_CREATE_FAIL, "Couldn't create histogram for field"), \
kernel/trace/trace_events_hist.c
42
C(SYNTH_VAR_NOT_FOUND, "Couldn't find synthetic variable"), \
kernel/trace/trace_events_hist.c
43
C(SYNTH_EVENT_NOT_FOUND,"Couldn't find synthetic event"), \
kernel/trace/trace_events_hist.c
44
C(SYNTH_TYPE_MISMATCH, "Param type doesn't match synthetic event field type"), \
kernel/trace/trace_events_hist.c
45
C(SYNTH_COUNT_MISMATCH, "Param count doesn't match synthetic event field count"), \
kernel/trace/trace_events_hist.c
46
C(FIELD_VAR_PARSE_FAIL, "Couldn't parse field variable"), \
kernel/trace/trace_events_hist.c
47
C(VAR_CREATE_FIND_FAIL, "Couldn't create or find variable"), \
kernel/trace/trace_events_hist.c
48
C(ONX_NOT_VAR, "For onmax(x) or onchange(x), x must be a variable"), \
kernel/trace/trace_events_hist.c
49
C(ONX_VAR_NOT_FOUND, "Couldn't find onmax or onchange variable"), \
kernel/trace/trace_events_hist.c
50
C(ONX_VAR_CREATE_FAIL, "Couldn't create onmax or onchange variable"), \
kernel/trace/trace_events_hist.c
51
C(FIELD_VAR_CREATE_FAIL,"Couldn't create field variable"), \
kernel/trace/trace_events_hist.c
52
C(TOO_MANY_PARAMS, "Too many action params"), \
kernel/trace/trace_events_hist.c
53
C(PARAM_NOT_FOUND, "Couldn't find param"), \
kernel/trace/trace_events_hist.c
54
C(INVALID_PARAM, "Invalid action param"), \
kernel/trace/trace_events_hist.c
55
C(ACTION_NOT_FOUND, "No action found"), \
kernel/trace/trace_events_hist.c
56
C(NO_SAVE_PARAMS, "No params found for save()"), \
kernel/trace/trace_events_hist.c
57
C(TOO_MANY_SAVE_ACTIONS,"Can't have more than one save() action per hist"), \
kernel/trace/trace_events_hist.c
58
C(ACTION_MISMATCH, "Handler doesn't support action"), \
kernel/trace/trace_events_hist.c
59
C(NO_CLOSING_PAREN, "No closing paren found"), \
kernel/trace/trace_events_hist.c
60
C(SUBSYS_NOT_FOUND, "Missing subsystem"), \
kernel/trace/trace_events_hist.c
61
C(INVALID_SUBSYS_EVENT, "Invalid subsystem or event name"), \
kernel/trace/trace_events_hist.c
62
C(INVALID_REF_KEY, "Using variable references in keys not supported"), \
kernel/trace/trace_events_hist.c
63
C(VAR_NOT_FOUND, "Couldn't find variable"), \
kernel/trace/trace_events_hist.c
64
C(FIELD_NOT_FOUND, "Couldn't find field"), \
kernel/trace/trace_events_hist.c
65
C(EMPTY_ASSIGNMENT, "Empty assignment"), \
kernel/trace/trace_events_hist.c
66
C(INVALID_SORT_MODIFIER,"Invalid sort modifier"), \
kernel/trace/trace_events_hist.c
67
C(EMPTY_SORT_FIELD, "Empty sort field"), \
kernel/trace/trace_events_hist.c
68
C(TOO_MANY_SORT_FIELDS, "Too many sort fields (Max = 2)"), \
kernel/trace/trace_events_hist.c
69
C(INVALID_SORT_FIELD, "Sort field must be a key or a val"), \
kernel/trace/trace_events_hist.c
70
C(INVALID_STR_OPERAND, "String type can not be an operand in expression"), \
kernel/trace/trace_events_hist.c
71
C(EXPECT_NUMBER, "Expecting numeric literal"), \
kernel/trace/trace_events_hist.c
72
C(UNARY_MINUS_SUBEXPR, "Unary minus not supported in sub-expressions"), \
kernel/trace/trace_events_hist.c
73
C(DIVISION_BY_ZERO, "Division by zero"), \
kernel/trace/trace_events_hist.c
74
C(NEED_NOHC_VAL, "Non-hitcount value is required for 'nohitcount'"),
kernel/trace/trace_events_synth.c
27
C(BAD_NAME, "Illegal name"), \
kernel/trace/trace_events_synth.c
28
C(INVALID_CMD, "Command must be of the form: <name> field[;field] ..."),\
kernel/trace/trace_events_synth.c
29
C(INVALID_DYN_CMD, "Command must be of the form: s or -:[synthetic/]<name> field[;field] ..."),\
kernel/trace/trace_events_synth.c
30
C(EVENT_EXISTS, "Event already exists"), \
kernel/trace/trace_events_synth.c
31
C(TOO_MANY_FIELDS, "Too many fields"), \
kernel/trace/trace_events_synth.c
32
C(INCOMPLETE_TYPE, "Incomplete type"), \
kernel/trace/trace_events_synth.c
33
C(INVALID_TYPE, "Invalid type"), \
kernel/trace/trace_events_synth.c
34
C(INVALID_FIELD, "Invalid field"), \
kernel/trace/trace_events_synth.c
35
C(INVALID_ARRAY_SPEC, "Invalid array specification"),
kernel/trace/trace_probe.h
488
C(FILE_NOT_FOUND, "Failed to find the given file"), \
kernel/trace/trace_probe.h
489
C(NO_REGULAR_FILE, "Not a regular file"), \
kernel/trace/trace_probe.h
490
C(BAD_REFCNT, "Invalid reference counter offset"), \
kernel/trace/trace_probe.h
491
C(REFCNT_OPEN_BRACE, "Reference counter brace is not closed"), \
kernel/trace/trace_probe.h
492
C(BAD_REFCNT_SUFFIX, "Reference counter has wrong suffix"), \
kernel/trace/trace_probe.h
493
C(BAD_UPROBE_OFFS, "Invalid uprobe offset"), \
kernel/trace/trace_probe.h
494
C(BAD_MAXACT_TYPE, "Maxactive is only for function exit"), \
kernel/trace/trace_probe.h
495
C(BAD_MAXACT, "Invalid maxactive number"), \
kernel/trace/trace_probe.h
496
C(MAXACT_TOO_BIG, "Maxactive is too big"), \
kernel/trace/trace_probe.h
497
C(BAD_PROBE_ADDR, "Invalid probed address or symbol"), \
kernel/trace/trace_probe.h
498
C(NON_UNIQ_SYMBOL, "The symbol is not unique"), \
kernel/trace/trace_probe.h
499
C(BAD_RETPROBE, "Retprobe address must be an function entry"), \
kernel/trace/trace_probe.h
500
C(NO_TRACEPOINT, "Tracepoint is not found"), \
kernel/trace/trace_probe.h
501
C(BAD_TP_NAME, "Invalid character in tracepoint name"),\
kernel/trace/trace_probe.h
502
C(BAD_ADDR_SUFFIX, "Invalid probed address suffix"), \
kernel/trace/trace_probe.h
503
C(NO_GROUP_NAME, "Group name is not specified"), \
kernel/trace/trace_probe.h
504
C(GROUP_TOO_LONG, "Group name is too long"), \
kernel/trace/trace_probe.h
505
C(BAD_GROUP_NAME, "Group name must follow the same rules as C identifiers"), \
kernel/trace/trace_probe.h
506
C(NO_EVENT_NAME, "Event name is not specified"), \
kernel/trace/trace_probe.h
507
C(EVENT_TOO_LONG, "Event name is too long"), \
kernel/trace/trace_probe.h
508
C(BAD_EVENT_NAME, "Event name must follow the same rules as C identifiers"), \
kernel/trace/trace_probe.h
509
C(EVENT_EXIST, "Given group/event name is already used by another event"), \
kernel/trace/trace_probe.h
510
C(RETVAL_ON_PROBE, "$retval is not available on probe"), \
kernel/trace/trace_probe.h
511
C(NO_RETVAL, "This function returns 'void' type"), \
kernel/trace/trace_probe.h
512
C(BAD_STACK_NUM, "Invalid stack number"), \
kernel/trace/trace_probe.h
513
C(BAD_ARG_NUM, "Invalid argument number"), \
kernel/trace/trace_probe.h
514
C(BAD_VAR, "Invalid $-variable specified"), \
kernel/trace/trace_probe.h
515
C(BAD_REG_NAME, "Invalid register name"), \
kernel/trace/trace_probe.h
516
C(BAD_MEM_ADDR, "Invalid memory address"), \
kernel/trace/trace_probe.h
517
C(BAD_IMM, "Invalid immediate value"), \
kernel/trace/trace_probe.h
518
C(IMMSTR_NO_CLOSE, "String is not closed with '\"'"), \
kernel/trace/trace_probe.h
519
C(FILE_ON_KPROBE, "File offset is not available with kprobe"), \
kernel/trace/trace_probe.h
520
C(BAD_FILE_OFFS, "Invalid file offset value"), \
kernel/trace/trace_probe.h
521
C(SYM_ON_UPROBE, "Symbol is not available with uprobe"), \
kernel/trace/trace_probe.h
522
C(TOO_MANY_OPS, "Dereference is too much nested"), \
kernel/trace/trace_probe.h
523
C(DEREF_NEED_BRACE, "Dereference needs a brace"), \
kernel/trace/trace_probe.h
524
C(BAD_DEREF_OFFS, "Invalid dereference offset"), \
kernel/trace/trace_probe.h
525
C(DEREF_OPEN_BRACE, "Dereference brace is not closed"), \
kernel/trace/trace_probe.h
526
C(COMM_CANT_DEREF, "$comm can not be dereferenced"), \
kernel/trace/trace_probe.h
527
C(BAD_FETCH_ARG, "Invalid fetch argument"), \
kernel/trace/trace_probe.h
528
C(ARRAY_NO_CLOSE, "Array is not closed"), \
kernel/trace/trace_probe.h
529
C(BAD_ARRAY_SUFFIX, "Array has wrong suffix"), \
kernel/trace/trace_probe.h
530
C(BAD_ARRAY_NUM, "Invalid array size"), \
kernel/trace/trace_probe.h
531
C(ARRAY_TOO_BIG, "Array number is too big"), \
kernel/trace/trace_probe.h
532
C(BAD_TYPE, "Unknown type is specified"), \
kernel/trace/trace_probe.h
533
C(BAD_STRING, "String accepts only memory argument"), \
kernel/trace/trace_probe.h
534
C(BAD_SYMSTRING, "Symbol String doesn't accept data/userdata"), \
kernel/trace/trace_probe.h
535
C(BAD_BITFIELD, "Invalid bitfield"), \
kernel/trace/trace_probe.h
536
C(ARG_NAME_TOO_LONG, "Argument name is too long"), \
kernel/trace/trace_probe.h
537
C(NO_ARG_NAME, "Argument name is not specified"), \
kernel/trace/trace_probe.h
538
C(BAD_ARG_NAME, "Argument name must follow the same rules as C identifiers"), \
kernel/trace/trace_probe.h
539
C(USED_ARG_NAME, "This argument name is already used"), \
kernel/trace/trace_probe.h
540
C(ARG_TOO_LONG, "Argument expression is too long"), \
kernel/trace/trace_probe.h
541
C(NO_ARG_BODY, "No argument expression"), \
kernel/trace/trace_probe.h
542
C(BAD_INSN_BNDRY, "Probe point is not an instruction boundary"),\
kernel/trace/trace_probe.h
543
C(FAIL_REG_PROBE, "Failed to register probe event"),\
kernel/trace/trace_probe.h
544
C(DIFF_PROBE_TYPE, "Probe type is different from existing probe"),\
kernel/trace/trace_probe.h
545
C(DIFF_ARG_TYPE, "Argument type or name is different from existing probe"),\
kernel/trace/trace_probe.h
546
C(SAME_PROBE, "There is already the exact same probe event"),\
kernel/trace/trace_probe.h
547
C(NO_EVENT_INFO, "This requires both group and event name to attach"),\
kernel/trace/trace_probe.h
548
C(BAD_ATTACH_EVENT, "Attached event does not exist"),\
kernel/trace/trace_probe.h
549
C(BAD_ATTACH_ARG, "Attached event does not have this field"),\
kernel/trace/trace_probe.h
550
C(NO_EP_FILTER, "No filter rule after 'if'"), \
kernel/trace/trace_probe.h
551
C(NOSUP_BTFARG, "BTF is not available or not supported"), \
kernel/trace/trace_probe.h
552
C(NO_BTFARG, "This variable is not found at this probe point"),\
kernel/trace/trace_probe.h
553
C(NO_BTF_ENTRY, "No BTF entry for this probe point"), \
kernel/trace/trace_probe.h
554
C(BAD_VAR_ARGS, "$arg* must be an independent parameter without name etc."),\
kernel/trace/trace_probe.h
555
C(NOFENTRY_ARGS, "$arg* can be used only on function entry or exit"), \
kernel/trace/trace_probe.h
556
C(DOUBLE_ARGS, "$arg* can be used only once in the parameters"), \
kernel/trace/trace_probe.h
557
C(ARGS_2LONG, "$arg* failed because the argument list is too long"), \
kernel/trace/trace_probe.h
558
C(ARGIDX_2BIG, "$argN index is too big"), \
kernel/trace/trace_probe.h
559
C(NO_PTR_STRCT, "This is not a pointer to union/structure."), \
kernel/trace/trace_probe.h
560
C(NOSUP_DAT_ARG, "Non pointer structure/union argument is not supported."),\
kernel/trace/trace_probe.h
561
C(BAD_HYPHEN, "Failed to parse single hyphen. Forgot '>'?"), \
kernel/trace/trace_probe.h
562
C(NO_BTF_FIELD, "This field is not found."), \
kernel/trace/trace_probe.h
563
C(BAD_BTF_TID, "Failed to get BTF type info."),\
kernel/trace/trace_probe.h
564
C(BAD_TYPE4STR, "This type does not fit for string."),\
kernel/trace/trace_probe.h
565
C(NEED_STRING_TYPE, "$comm and immediate-string only accepts string type"),\
kernel/trace/trace_probe.h
566
C(TOO_MANY_ARGS, "Too many arguments are specified"), \
kernel/trace/trace_probe.h
567
C(TOO_MANY_EARGS, "Too many entry arguments specified"), \
kernel/trace/trace_probe.h
568
C(EVENT_TOO_BIG, "Event too big (too many fields?)"), \
kernel/trace/trace_probe.h
569
C(TYPECAST_NOT_EVENT, "Typecasts are only for eprobe fields"),
lib/crypto/sha1.c
102
T_40_59(i, A, B, C, D, E);
lib/crypto/sha1.c
106
T_60_79(i, A, B, C, D, E);
lib/crypto/sha1.c
110
state->h[2] += C;
lib/crypto/sha1.c
61
#define SHA_ROUND(t, input, fn, constant, A, B, C, D, E) do { \
lib/crypto/sha1.c
65
TEMP = E; E = D; D = C; C = B; B = A; A = TEMP; } while (0)
lib/crypto/sha1.c
67
#define T_0_15(t, A, B, C, D, E) SHA_ROUND(t, SHA_SRC, (((C^D)&B)^D) , 0x5a827999, A, B, C, D, E )
lib/crypto/sha1.c
68
#define T_16_19(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (((C^D)&B)^D) , 0x5a827999, A, B, C, D, E )
lib/crypto/sha1.c
69
#define T_20_39(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (B^C^D) , 0x6ed9eba1, A, B, C, D, E )
lib/crypto/sha1.c
70
#define T_40_59(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, ((B&C)+(D&(B^C))) , 0x8f1bbcdc, A, B, C, D, E )
lib/crypto/sha1.c
71
#define T_60_79(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (B^C^D) , 0xca62c1d6, A, B, C, D, E )
lib/crypto/sha1.c
79
__u32 A, B, C, D, E;
lib/crypto/sha1.c
84
C = state->h[2];
lib/crypto/sha1.c
90
T_0_15(i, A, B, C, D, E);
lib/crypto/sha1.c
94
T_16_19(i, A, B, C, D, E);
lib/crypto/sha1.c
98
T_20_39(i, A, B, C, D, E);
lib/locking-selftest.c
1402
I1(A); I1(B); I1(C); I1(D);
lib/locking-selftest.c
1410
I2(A); I2(B); I2(C); I2(D);
lib/locking-selftest.c
562
LOCK_UNLOCK_2(B, C); \
lib/locking-selftest.c
563
LOCK_UNLOCK_2(C, A); /* fail */
lib/locking-selftest.c
595
LOCK_UNLOCK_2(C, A); \
lib/locking-selftest.c
596
LOCK_UNLOCK_2(B, C); /* fail */
lib/locking-selftest.c
628
LOCK_UNLOCK_2(B, C); \
lib/locking-selftest.c
629
LOCK_UNLOCK_2(C, D); \
lib/locking-selftest.c
661
LOCK_UNLOCK_2(C, D); \
lib/locking-selftest.c
694
LOCK_UNLOCK_2(C, D); \
lib/locking-selftest.c
695
LOCK_UNLOCK_2(B, C); \
lib/zstd/common/cpu.h
100
C(pclmuldq, 1)
lib/zstd/common/cpu.h
101
C(dtes64, 2)
lib/zstd/common/cpu.h
102
C(monitor, 3)
lib/zstd/common/cpu.h
103
C(dscpl, 4)
lib/zstd/common/cpu.h
104
C(vmx, 5)
lib/zstd/common/cpu.h
105
C(smx, 6)
lib/zstd/common/cpu.h
106
C(eist, 7)
lib/zstd/common/cpu.h
107
C(tm2, 8)
lib/zstd/common/cpu.h
108
C(ssse3, 9)
lib/zstd/common/cpu.h
109
C(cnxtid, 10)
lib/zstd/common/cpu.h
110
C(fma, 12)
lib/zstd/common/cpu.h
111
C(cx16, 13)
lib/zstd/common/cpu.h
112
C(xtpr, 14)
lib/zstd/common/cpu.h
113
C(pdcm, 15)
lib/zstd/common/cpu.h
114
C(pcid, 17)
lib/zstd/common/cpu.h
115
C(dca, 18)
lib/zstd/common/cpu.h
116
C(sse41, 19)
lib/zstd/common/cpu.h
117
C(sse42, 20)
lib/zstd/common/cpu.h
118
C(x2apic, 21)
lib/zstd/common/cpu.h
119
C(movbe, 22)
lib/zstd/common/cpu.h
120
C(popcnt, 23)
lib/zstd/common/cpu.h
121
C(tscdeadline, 24)
lib/zstd/common/cpu.h
122
C(aes, 25)
lib/zstd/common/cpu.h
123
C(xsave, 26)
lib/zstd/common/cpu.h
124
C(osxsave, 27)
lib/zstd/common/cpu.h
125
C(avx, 28)
lib/zstd/common/cpu.h
126
C(f16c, 29)
lib/zstd/common/cpu.h
127
C(rdrand, 30)
lib/zstd/common/cpu.h
128
#undef C
lib/zstd/common/cpu.h
189
C(prefetchwt1, 0)
lib/zstd/common/cpu.h
190
C(avx512vbmi, 1)
lib/zstd/common/cpu.h
191
#undef C
lib/zstd/common/cpu.h
99
C(sse3, 0)
net/core/skbuff.c
1615
C(len);
net/core/skbuff.c
1616
C(data_len);
net/core/skbuff.c
1617
C(mac_len);
net/core/skbuff.c
1622
C(pfmemalloc);
net/core/skbuff.c
1623
C(pp_recycle);
net/core/skbuff.c
1625
C(tail);
net/core/skbuff.c
1626
C(end);
net/core/skbuff.c
1627
C(head);
net/core/skbuff.c
1628
C(head_frag);
net/core/skbuff.c
1629
C(data);
net/core/skbuff.c
1630
C(truesize);
net/ethtool/common.c
346
__MED(C) | __MED(S) | __MED(L)),
net/ethtool/common.c
359
__DEFINE_LINK_MODE_PARAMS(40000, CR4, Full, C),
net/ethtool/common.c
363
__DEFINE_LINK_MODE_PARAMS(56000, CR4, Full, C),
net/ethtool/common.c
366
__DEFINE_LINK_MODE_PARAMS(25000, CR, Full, C),
net/ethtool/common.c
369
__DEFINE_LINK_MODE_PARAMS(50000, CR2, Full, C),
net/ethtool/common.c
373
__DEFINE_LINK_MODE_PARAMS(100000, CR4, Full, C),
net/ethtool/common.c
378
__MED(C) | __MED(S) | __MED(L)),
net/ethtool/common.c
379
__DEFINE_LINK_MODE_PARAMS(10000, CR, Full, C),
net/ethtool/common.c
391
__DEFINE_LINK_MODE_PARAMS(50000, CR, Full, C),
net/ethtool/common.c
397
__DEFINE_LINK_MODE_PARAMS(100000, CR2, Full, C),
net/ethtool/common.c
406
__DEFINE_LINK_MODE_PARAMS(200000, CR4, Full, C),
net/ethtool/common.c
414
__DEFINE_LINK_MODE_PARAMS(400000, CR8, Full, C),
net/ethtool/common.c
421
__DEFINE_LINK_MODE_PARAMS(100000, CR, Full, C),
net/ethtool/common.c
427
__DEFINE_LINK_MODE_PARAMS(200000, CR2, Full, C),
net/ethtool/common.c
433
__DEFINE_LINK_MODE_PARAMS(400000, CR4, Full, C),
net/ethtool/common.c
437
__DEFINE_LINK_MODE_PARAMS(800000, CR8, Full, C),
net/ethtool/common.c
447
__DEFINE_LINK_MODE_PARAMS(200000, CR, Full, C),
net/ethtool/common.c
453
__DEFINE_LINK_MODE_PARAMS(400000, CR2, Full, C),
net/ethtool/common.c
459
__DEFINE_LINK_MODE_PARAMS(800000, CR4, Full, C),
net/ethtool/common.c
465
__DEFINE_LINK_MODE_PARAMS(1600000, CR8, Full, C),
net/netfilter/ipvs/ip_vs_nfct.c
61
#define ARG_CONN(C) IP_VS_DBG_ADDR((C)->af, &((C)->caddr)), \
net/netfilter/ipvs/ip_vs_nfct.c
62
ntohs((C)->cport), \
net/netfilter/ipvs/ip_vs_nfct.c
63
IP_VS_DBG_ADDR((C)->af, &((C)->vaddr)), \
net/netfilter/ipvs/ip_vs_nfct.c
64
ntohs((C)->vport), \
net/netfilter/ipvs/ip_vs_nfct.c
65
IP_VS_DBG_ADDR((C)->daf, &((C)->daddr)), \
net/netfilter/ipvs/ip_vs_nfct.c
66
ntohs((C)->dport), \
net/netfilter/ipvs/ip_vs_nfct.c
67
(C)->protocol, (C)->state
net/rxrpc/ar-internal.h
1690
#define ASSERTIF(C, X) \
net/rxrpc/ar-internal.h
1692
if (unlikely((C) && !(X))) { \
net/rxrpc/ar-internal.h
1698
#define ASSERTIFCMP(C, X, OP, Y) \
net/rxrpc/ar-internal.h
1702
if (unlikely((C) && !(_x OP _y))) { \
net/rxrpc/ar-internal.h
1720
#define ASSERTIF(C, X) \
net/rxrpc/ar-internal.h
1724
#define ASSERTIFCMP(C, X, OP, Y) \
scripts/gendwarfksyms/examples/kabi_ex.h
60
KABI_ENUMERATOR_IGNORE(e, C);
security/apparmor/include/audit.h
176
#define DEFINE_AUDIT_DATA(NAME, T, C, X) \
security/apparmor/include/audit.h
179
.class = (C), \
security/apparmor/include/label.h
249
static inline bool label_mediates(struct aa_label *L, unsigned char C)
security/apparmor/include/label.h
251
return (L)->mediates & (((u64) 1) << (C));
security/apparmor/include/label.h
254
static inline bool label_mediates_safe(struct aa_label *L, unsigned char C)
security/apparmor/include/label.h
256
if (C > AA_CLASS_LAST)
security/apparmor/include/label.h
258
return label_mediates(L, C);
security/apparmor/match.c
440
#define match_char(state, def, base, next, check, C) \
security/apparmor/match.c
443
unsigned int pos = base_idx(b) + (C); \
security/selinux/hooks.c
7317
#define bpf_token_cmd(T, C) \
security/selinux/hooks.c
7318
((T)->allowed_cmds & (1ULL << (C)))
sound/soc/renesas/rcar/mix.c
91
u32 volC = rsnd_mix_get_vol(mix, C);
tools/perf/util/evsel.c
878
#define CACHE_READ (1 << C(OP_READ))
tools/perf/util/evsel.c
879
#define CACHE_WRITE (1 << C(OP_WRITE))
tools/perf/util/evsel.c
880
#define CACHE_PREFETCH (1 << C(OP_PREFETCH))
tools/perf/util/evsel.c
888
static const unsigned long evsel__hw_cache_stat[C(MAX)] = {
tools/perf/util/evsel.c
889
[C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
tools/perf/util/evsel.c
890
[C(L1I)] = (CACHE_READ | CACHE_PREFETCH),
tools/perf/util/evsel.c
891
[C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
tools/perf/util/evsel.c
892
[C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
tools/perf/util/evsel.c
893
[C(ITLB)] = (CACHE_READ),
tools/perf/util/evsel.c
894
[C(BPU)] = (CACHE_READ),
tools/perf/util/evsel.c
895
[C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
tools/testing/selftests/bpf/prog_tests/reg_bounds.c
1413
const u64 C = y.a;
tools/testing/selftests/bpf/prog_tests/reg_bounds.c
1433
reg_state_set_const(&rc, init_t, C);
tools/testing/selftests/bpf/progs/bpf_qdisc_fq.c
129
private(C) struct bpf_spin_lock fq_old_flows_lock;
tools/testing/selftests/bpf/progs/bpf_qdisc_fq.c
130
private(C) struct bpf_list_head fq_old_flows __contains(fq_flow_node, list_node);
tools/testing/selftests/bpf/progs/btf_dump_test_case_namespacing.c
63
enum C c;
tools/testing/selftests/bpf/progs/core_kern.c
99
#define C30 C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;
tools/testing/selftests/bpf/progs/linked_list.c
21
private(C) struct bpf_spin_lock glock_c;
tools/testing/selftests/bpf/progs/linked_list.c
22
private(C) struct bpf_list_head ghead_array[2] __contains(foo, node2);
tools/testing/selftests/bpf/progs/linked_list.c
23
private(C) struct bpf_list_head ghead_array_one[1] __contains(foo, node2);
tools/testing/selftests/bpf/progs/refcounted_kptr.c
48
private(C) struct bpf_spin_lock block;
tools/testing/selftests/bpf/progs/refcounted_kptr.c
49
private(C) struct bpf_rb_root broot __contains(node_data, r);
tools/testing/selftests/bpf/progs/test_global_func9.c
97
const struct C c = {.x = skb->len, .y = skb->family };
tools/testing/selftests/bpf/progs/test_verif_scale1.c
26
#define C30 C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;
tools/testing/selftests/bpf/progs/test_verif_scale2.c
26
#define C30 C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;
tools/testing/selftests/bpf/progs/test_verif_scale3.c
26
#define C30 C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;C;
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
37
C(fn, 8) C(fn, 16) C(fn, 24) C(fn, 32) C(fn, 40) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
38
C(fn, 48) C(fn, 56) C(fn, 64) C(fn, 72) C(fn, 80) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
39
C(fn, 88) C(fn, 96) C(fn, 104) C(fn, 112) C(fn, 120) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
40
C(fn, 128) C(fn, 136) C(fn, 144) C(fn, 152) C(fn, 160) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
41
C(fn, 168) C(fn, 176) C(fn, 184) C(fn, 192) C(fn, 200) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
42
C(fn, 208) C(fn, 216) C(fn, 224) C(fn, 232) C(fn, 240) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
43
C(fn, 248) C(fn, 256) C(fn, 264) C(fn, 272) C(fn, 280) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
44
C(fn, 288) C(fn, 296) C(fn, 304) C(fn, 312) C(fn, 320) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
45
C(fn, 328) C(fn, 336) C(fn, 344) C(fn, 352) C(fn, 360) \
tools/testing/selftests/bpf/progs/verifier_liveness_exp.c
46
C(fn, 368) C(fn, 376) C(fn, 384) C(fn, 392) C(fn, 400)
tools/testing/selftests/kvm/riscv/get-reg-list.c
542
KVM_ISA_EXT_ARR(C),
tools/testing/selftests/powerpc/benchmarks/futex_bench.c
18
#define futex(A, B, C, D, E, F) syscall(__NR_futex, A, B, C, D, E, F)
tools/tracing/latency/latency-collector.c
44
C(FUNC_TR, "function-trace"), \
tools/tracing/latency/latency-collector.c
45
C(DISP_GR, "display-graph"), \
tools/tracing/latency/latency-collector.c
46
C(NR, NULL)
tools/virtio/linux/thread_info.h
1
#define check_copy_size(A, B, C) (1)
virt/kvm/async_pf.h
21
#define kvm_async_pf_vcpu_init(C) do {} while (0)