#ifndef _SMRT_SCSI_H
#define _SMRT_SCSI_H
#include <sys/types.h>
#include <sys/scsi/adapters/smrt/smrt_ciss.h>
#ifdef __cplusplus
extern "C" {
#endif
#define PERIPHERIAL_DEV_ADDR 0x0
#define LOGICAL_VOL_ADDR 0x1
#define MASK_PERIPHERIAL_DEV_ADDR 0x3
#define CISS_PHYS_MODE 0x0
#define CISS_SCMD_READ 0xC0
#define CISS_SCMD_WRITE 0xC1
#define CISS_SCMD_REPORT_LOGICAL_LUNS 0xC2
#define CISS_SCMD_REPORT_PHYSICAL_LUNS 0xC3
#define CISS_SCMD_BMIC_READ 0x26
#define CISS_SCMD_BMIC_WRITE 0x27
#define CISS_MSG_ABORT 0x0
#define CISS_ABORT_TASK 0x0
#define CISS_ABORT_TASKSET 0x1
#define CISS_MSG_RESET 0x1
#define CISS_RESET_CTLR 0x0
#define CISS_RESET_BUS 0x1
#define CISS_RESET_TGT 0x3
#define CISS_RESET_LUN 0x4
#define CISS_MSG_NOP 0x3
#define CISS_BMIC_IDENTIFY_CONTROLLER 0x11
#define CISS_BMIC_IDENTIFY_PHYSICAL_DEVICE 0x15
#define CISS_BMIC_NOTIFY_ON_EVENT 0xD0
#define CISS_BMIC_NOTIFY_ON_EVENT_CANCEL 0xD1
#define SMRT_DTYPE_PSCSI 0x00
#define SMRT_DTYPE_SATA 0x01
#define SMRT_DTYPE_SAS 0x02
#define SMRT_DTYPE_SATA_BW 0x03
#define SMRT_DTYPE_SAS_BW 0x04
#define SMRT_DTYPE_EXPANDER 0x05
#define SMRT_DTYPE_SES 0x06
#define SMRT_DTYPE_CONTROLLER 0x07
#define SMRT_DTYPE_SGPIO 0x08
#define SMRT_DTYPE_NVME 0x09
#define SMRT_DTYPE_NOPHY 0xFF
#pragma pack(1)
typedef struct smrt_report_logical_lun_ent {
LogDevAddr_t smrle_addr;
} smrt_report_logical_lun_ent_t;
typedef struct smrt_report_logical_lun_extent {
LogDevAddr_t smrle_addr;
uint8_t smrle_wwn[16];
} smrt_report_logical_lun_extent_t;
typedef struct smrt_report_logical_lun {
uint32_t smrll_datasize;
uint8_t smrll_extflag;
uint8_t smrll_reserved1[3];
union {
smrt_report_logical_lun_ent_t ents[SMRT_MAX_LOGDRV];
smrt_report_logical_lun_extent_t extents[SMRT_MAX_LOGDRV];
} smrll_data;
} smrt_report_logical_lun_t;
typedef struct smrt_report_logical_lun_req {
uint8_t smrllr_opcode;
uint8_t smrllr_extflag;
uint8_t smrllr_reserved1[4];
uint32_t smrllr_datasize;
uint8_t smrllr_reserved2;
uint8_t smrllr_control;
} smrt_report_logical_lun_req_t;
typedef struct smrt_report_physical_lun_ent {
PhysDevAddr_t srple_addr;
} smrt_report_physical_lun_ent_t;
typedef struct smrt_report_physical_pnid {
uint8_t srpp_node[8];
uint8_t srpp_port[8];
} smrt_report_physical_pnid_t;
typedef struct smrt_report_physical_opdi {
uint8_t srpo_wwid[8];
uint8_t srpo_dtype;
uint8_t srpo_flags;
uint8_t srpo_multilun;
uint8_t srpo_paths;
uint32_t srpo_iohdl;
} smrt_report_physical_opdi_t;
typedef struct smrt_report_physical_lun_extent {
PhysDevAddr_t srple_addr;
union {
smrt_report_physical_pnid_t srple_pnid;
smrt_report_physical_opdi_t srple_opdi;
} srple_extdata;
} smrt_report_physical_lun_extent_t;
#define SMRT_REPORT_PHYSICAL_LUN_EXT_NONE 0x00
#define SMRT_REPORT_PHYSICAL_LUN_EXT_PNID 0x01
#define SMRT_REPORT_PHYSICAL_LUN_EXT_OPDI 0x02
#define SMRT_REPORT_PHYSICAL_LUN_EXT_MASK 0x0f
#define SMRT_REPORT_PHYSICAL_LUN_CTRL_ONLY (1 << 6)
#define SMRT_REPORT_PHYSICAL_LUN_ALL_PATHS (1 << 7)
typedef struct smrt_report_physical_lun {
uint32_t smrpl_datasize;
uint8_t smrpl_extflag;
uint8_t smrpl_reserved1[3];
union {
smrt_report_physical_lun_ent_t ents[SMRT_MAX_PHYSDEV];
smrt_report_physical_lun_extent_t extents[SMRT_MAX_PHYSDEV];
} smrpl_data;
} smrt_report_physical_lun_t;
typedef struct smrt_report_physical_lun_req {
uint8_t smrplr_opcode;
uint8_t smrplr_extflag;
uint8_t smrplr_reserved[1];
uint32_t smrplr_datasize;
uint8_t smrplr_reserved2;
uint8_t smrplr_control;
} smrt_report_physical_lun_req_t;
typedef struct smrt_identify_controller_req {
uint8_t smicr_opcode;
uint8_t smicr_lun;
uint8_t smicr_reserved1[4];
uint8_t smicr_command;
uint8_t smicr_reserved2[2];
uint8_t smicr_reserved3[1];
uint8_t smicr_reserved4[6];
} smrt_identify_controller_req_t;
typedef struct smrt_identify_controller {
uint8_t smic_logical_drive_count;
uint32_t smic_config_signature;
uint8_t smic_firmware_rev[4];
uint8_t smic_recovery_rev[4];
uint8_t smic_hardware_version;
uint8_t smic_bootblock_rev[4];
uint32_t smic_drive_present_map;
uint32_t smic_external_drive_map;
uint32_t smic_board_id;
} smrt_identify_controller_t;
typedef struct smrt_identify_physical_drive_req {
uint8_t sipdr_opcode;
uint8_t sipdr_lun;
uint8_t sipdr_bmic_index1;
uint8_t sipdr_reserved1[3];
uint8_t sipdr_command;
uint8_t sipdr_reserved2[2];
uint8_t sipdr_bmic_index2;
uint8_t sipdr_reserved4[6];
} smrt_identify_physical_drive_req_t;
#define SMRT_MORE_FLAGS_LOGVOL (1 << 5)
#define SMRT_MORE_FLAGS_SPARE (1 << 6)
typedef struct smrt_identify_physical_drive {
uint8_t sipd_scsi_bus;
uint8_t sipd_scsi_id;
uint16_t sipd_lblk_size;
uint32_t sipd_nblocks;
uint32_t sipd_rsrvd_blocsk;
uint8_t sipd_model[40];
uint8_t sipd_serial[40];
uint8_t sipd_firmware[8];
uint8_t sipd_scsi_inquiry;
uint8_t sipd_compaq_stamp;
uint8_t sipd_last_failure;
uint8_t sipd_flags;
uint8_t sipd_more_flags;
uint8_t sipd_scsi_lun;
uint8_t sipd_yet_more_flags;
uint8_t sipd_even_more_flags;
uint32_t sipd_spi_speed_rules;
uint8_t sipd_phys_connector[2];
uint8_t sipd_phys_box_on_bus;
uint8_t sipd_phys_bay_in_box;
uint32_t sipd_rpm;
uint8_t sipd_device_type;
uint8_t sipd_sata_version;
uint64_t sipd_big_nblocks;
uint64_t sipd_ris_slba;
uint32_t sipd_ris_size;
uint8_t sipd_wwid[20];
uint8_t sipd_controller_phy_map[32];
uint16_t sipd_phy_count;
uint8_t sipd_phy_connected_dev_type[256];
uint8_t sipd_phy_to_drive_bay[256];
uint16_t sipd_phy_to_attached_dev[256];
uint8_t sipd_box_index;
uint8_t sipd_drive_support;
uint16_t sipd_extra_flags;
uint8_t sipd_neogiated_link_rate[256];
uint8_t sipd_phy_to_phy_map[256];
uint8_t sipd_pad[312];
} smrt_identify_physical_drive_t;
typedef struct smrt_event_notify_req {
uint8_t senr_opcode;
uint8_t senr_subcode;
uint8_t senr_reserved1[2];
uint32_t senr_flags;
uint32_t senr_size;
uint8_t senr_control;
} smrt_event_notify_req_t;
#define SMRT_EVENT_NOTIFY_BUFLEN 512
#define SMRT_EVENT_CLASS_PROTOCOL 0
#define SMRT_EVENT_PROTOCOL_SUBCLASS_ERROR 1
#define SMRT_EVENT_CLASS_HOTPLUG 1
#define SMRT_EVENT_HOTPLUG_SUBCLASS_DRIVE 0
#define SMRT_EVENT_CLASS_HWERROR 2
#define SMRT_EVENT_CLASS_ENVIRONMENT 3
#define SMRT_EVENT_CLASS_PHYS 4
#define SMRT_EVENT_PHYS_SUBCLASS_STATE 0
#define SMRT_EVENT_CLASS_LOGVOL 5
typedef struct smrt_event_notify {
uint32_t sen_timestamp;
uint16_t sen_class;
uint16_t sen_subclass;
uint16_t sen_detail;
uint8_t sen_data[64];
char sen_message[80];
uint32_t sen_tag;
uint16_t sen_date;
uint16_t sen_year;
uint32_t sen_time;
uint16_t sen_pre_power_time;
LUNAddr_t sen_addr;
} smrt_event_notify_t;
#pragma pack()
#ifdef __cplusplus
}
#endif
#endif