#ifndef _AFEIMPL_H
#define _AFEIMPL_H
#ifdef _KERNEL
#include <sys/mac_provider.h>
#define AFE_RXRING 128
#define AFE_TXRING 128
#define AFE_TXRECLAIM 8
#define AFE_TXRESCHED 120
#define AFE_WDOGTIMER 5000
#define AFE_HEADROOM 34
#define AFE_BUFSZ (1664)
#define AFE_MCHASH (64)
typedef struct afe afe_t;
typedef struct afe_card afe_card_t;
typedef struct afe_rxbuf afe_rxbuf_t;
typedef struct afe_txbuf afe_txbuf_t;
typedef struct afe_desc afe_desc_t;
typedef enum {
MODEL_CENTAUR = 1,
MODEL_COMET,
} afe_model_t;
struct afe_card {
uint16_t card_venid;
uint16_t card_devid;
char *card_cardname;
afe_model_t card_model;
};
struct afe {
dev_info_t *afe_dip;
mac_handle_t afe_mh;
mii_handle_t afe_mii;
afe_card_t *afe_cardp;
uint16_t afe_cachesize;
uint8_t afe_sromwidth;
int afe_flags;
kmutex_t afe_xmtlock;
kmutex_t afe_intrlock;
ddi_iblock_cookie_t afe_icookie;
uintptr_t afe_regs;
ddi_acc_handle_t afe_regshandle;
int afe_rxhead;
struct afe_desc *afe_rxdescp;
ddi_dma_handle_t afe_rxdesc_dmah;
ddi_acc_handle_t afe_rxdesc_acch;
uint32_t afe_rxdesc_paddr;
struct afe_rxbuf **afe_rxbufs;
int afe_txreclaim;
int afe_txsend;
int afe_txavail;
struct afe_desc *afe_txdescp;
ddi_dma_handle_t afe_txdesc_dmah;
ddi_acc_handle_t afe_txdesc_acch;
uint32_t afe_txdesc_paddr;
struct afe_txbuf **afe_txbufs;
hrtime_t afe_txstall_time;
boolean_t afe_wantw;
int afe_phyaddr;
int afe_phyid;
int afe_phyinuse;
int afe_forcefiber;
uchar_t afe_curraddr[ETHERADDRL];
boolean_t afe_promisc;
uint16_t afe_mccount[AFE_MCHASH];
uint32_t afe_mctab[AFE_MCHASH / 32];
kstat_t *afe_intrstat;
uint64_t afe_ipackets;
uint64_t afe_opackets;
uint64_t afe_rbytes;
uint64_t afe_obytes;
uint64_t afe_brdcstxmt;
uint64_t afe_multixmt;
uint64_t afe_brdcstrcv;
uint64_t afe_multircv;
unsigned afe_norcvbuf;
unsigned afe_errrcv;
unsigned afe_errxmt;
unsigned afe_missed;
unsigned afe_underflow;
unsigned afe_overflow;
unsigned afe_align_errors;
unsigned afe_fcs_errors;
unsigned afe_carrier_errors;
unsigned afe_collisions;
unsigned afe_ex_collisions;
unsigned afe_tx_late_collisions;
unsigned afe_defer_xmts;
unsigned afe_first_collisions;
unsigned afe_multi_collisions;
unsigned afe_sqe_errors;
unsigned afe_macxmt_errors;
unsigned afe_macrcv_errors;
unsigned afe_toolong_errors;
unsigned afe_runt;
unsigned afe_jabber;
};
struct afe_rxbuf {
caddr_t rxb_buf;
ddi_dma_handle_t rxb_dmah;
ddi_acc_handle_t rxb_acch;
uint32_t rxb_paddr;
};
struct afe_txbuf {
caddr_t txb_buf;
uint32_t txb_paddr;
ddi_dma_handle_t txb_dmah;
ddi_acc_handle_t txb_acch;
};
struct afe_desc {
unsigned desc_status;
unsigned desc_control;
unsigned desc_buffer1;
unsigned desc_buffer2;
};
#define PUTTXDESC(afep, member, val) \
ddi_put32(afep->afe_txdesc_acch, &member, val)
#define PUTRXDESC(afep, member, val) \
ddi_put32(afep->afe_rxdesc_acch, &member, val)
#define GETTXDESC(afep, member) \
ddi_get32(afep->afe_txdesc_acch, &member)
#define GETRXDESC(afep, member) \
ddi_get32(afep->afe_rxdesc_acch, &member)
#define RXSTAT_OWN 0x80000000U
#define RXSTAT_RXLEN 0x3FFF0000U
#define RXSTAT_RXERR 0x00008000U
#define RXSTAT_DESCERR 0x00004000U
#define RXSTAT_RXTYPE 0x00003000U
#define RXSTAT_RUNT 0x00000800U
#define RXSTAT_GROUP 0x00000400U
#define RXSTAT_FIRST 0x00000200U
#define RXSTAT_LAST 0x00000100U
#define RXSTAT_TOOLONG 0x00000080U
#define RXSTAT_COLLSEEN 0x00000040U
#define RXSTAT_FRTYPE 0x00000020U
#define RXSTAT_WATCHDOG 0x00000010U
#define RXSTAT_DRIBBLE 0x00000004U
#define RXSTAT_CRCERR 0x00000002U
#define RXSTAT_OFLOW 0x00000001U
#define RXSTAT_ERRS (RXSTAT_DESCERR | RXSTAT_RUNT | \
RXSTAT_COLLSEEN | RXSTAT_DRIBBLE | \
RXSTAT_CRCERR | RXSTAT_OFLOW)
#define RXLENGTH(x) ((x & RXSTAT_RXLEN) >> 16)
#define RXCTL_ENDRING 0x02000000U
#define RXCTL_CHAIN 0x01000000U
#define RXCTL_BUFLEN2 0x003FF800U
#define RXCTL_BUFLEN1 0x000007FFU
#define TXSTAT_OWN 0x80000000U
#define TXSTAT_URCNT 0x00C00000U
#define TXSTAT_TXERR 0x00008000U
#define TXSTAT_JABBER 0x00004000U
#define TXSTAT_CARRLOST 0x00000800U
#define TXSTAT_NOCARR 0x00000400U
#define TXSTAT_LATECOL 0x00000200U
#define TXSTAT_EXCOLL 0x00000100U
#define TXSTAT_SQE 0x00000080U
#define TXSTAT_COLLCNT 0x00000078U
#define TXSTAT_UFLOW 0x00000002U
#define TXSTAT_DEFER 0x00000001U
#define TXCOLLCNT(x) ((x & TXSTAT_COLLCNT) >> 3)
#define TXUFLOWCNT(x) ((x & TXSTAT_URCNT) >> 22)
#define TXCTL_INTCMPLTE 0x80000000U
#define TXCTL_LAST 0x40000000U
#define TXCTL_FIRST 0x20000000U
#define TXCTL_NOCRC 0x04000000U
#define TXCTL_ENDRING 0x02000000U
#define TXCTL_CHAIN 0x01000000U
#define TXCTL_NOPAD 0x00800000U
#define TXCTL_HASHPERF 0x00400000U
#define TXCTL_BUFLEN2 0x003FF800U
#define TXCTL_BUFLEN1 0x000007FFU
#define AFE_RUNNING 0x1
#define AFE_SUSPENDED 0x2
#define AFE_HASFIBER 0x4
#define AFE_MODEL(afep) ((afep)->afe_cardp->card_model)
#define GETCSR(afep, reg) \
ddi_get32(afep->afe_regshandle, (uint32_t *)(afep->afe_regs + reg))
#define GETCSR16(afep, reg) \
ddi_get16(afep->afe_regshandle, (uint16_t *)(afep->afe_regs + reg))
#define PUTCSR(afep, reg, val) \
ddi_put32(afep->afe_regshandle, (uint32_t *)(afep->afe_regs + reg), val)
#define PUTCSR16(afep, reg, val) \
ddi_put16(afep->afe_regshandle, (uint16_t *)(afep->afe_regs + reg), val)
#define SETBIT(afep, reg, val) PUTCSR(afep, reg, GETCSR(afep, reg) | (val))
#define CLRBIT(afep, reg, val) PUTCSR(afep, reg, GETCSR(afep, reg) & ~(val))
#define SYNCTXDESC(afep, index, who) \
(void) ddi_dma_sync(afep->afe_txdesc_dmah, \
(index * sizeof (afe_desc_t)), sizeof (afe_desc_t), who)
#define SYNCTXBUF(txb, len, who) \
(void) ddi_dma_sync(txb->txb_dmah, 0, len, who)
#define SYNCRXDESC(afep, index, who) \
(void) ddi_dma_sync(afep->afe_rxdesc_dmah, \
(index * sizeof (afe_desc_t)), sizeof (afe_desc_t), who)
#define SYNCRXBUF(rxb, len, who) \
(void) ddi_dma_sync(rxb->rxb_dmah, 0, len, who)
#endif
#endif