U64
U64 v;
#define UARCH U64
LZ4_NbCommonBytes(register U64 val)
return DeBruijnBytePos[((U64) ((val & -val) * 0x0218A392CDABBD3F)) >>
U64 v;
#define UARCH U64
typedef U64 int_ptr_t;
typedef U64 u64_t;
typedef U64 u64;
typedef U64 int_ptr_t;
typedef U64 u64_t;
typedef U64 u64;
U64 Address;
U64 Address64;
U64 Address64;
U64 Address;
U64 Words;
U64 SystemRequestFrameBaseAddress; /* 0x28 */
U64 ReplyDescriptorPostQueueAddress; /* 0x30 */
U64 ReplyFreeQueueAddress; /* 0x38 */
U64 TimeStamp; /* 0x40 */
U64 logStart; /* 0x00 */
U64 logEnd; /* 0x08 */
U64 offsetInSpan; /* 0x10 */
U64 startBlk;
U64 numBlks;
U64 num_rows;
U64 size; /* 0x08, LD size in blocks */
U64 ldStartBlock;
U64 pdBlock;
MR_GetSpanBlock(U32 ld, U64 row, U64 *span_blk, MR_FW_RAID_MAP_ALL *map,
U64 blk;
MR_GetPhyParams(struct mrsas_instance *instance, U32 ld, U64 stripRow,
U16 stripRef, U64 *pdBlock, U16 *pDevHandle,
U64 row;
U64 endLba, endStrip, endRow;
U64 start_row, start_strip;
U64 ldStartBlock;
typedef U64 REGION_KEY;
megasas_get_best_arm(PLD_LOAD_BALANCE_INFO lbInfo, U8 arm, U64 block,
U64 diff0, diff1;
U64 Words;
U64 word;
U64 last_accessed_block[2];
U64 regLockRowLBA; /* 0x08 - 0x0F */
(U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
(U64)mrsas_tbolt_max_cap_maxxfer; /* limit to 256K */
(U64)cmd->sgl_phys_addr);
(U64)cmd->frame_phys_addr);
U64 start_blk, U32 num_blocks)
static void mrsas_tbolt_set_pd_lba(U8 *, size_t, uint8_t *, U64, U32);
#ifndef U64
U64 HashMethod:32,
U64 Unused1;
U64 Unused2;
U64 Key1[124];
U64 data;
U64 host_phys_addr; /* Ring base addr */
U64 host_rsp_dma_addr; /* Response dma'd here */
U64 cmd_cons_dma_addr; /* */
U64 dummy_dma_addr; /* */
U64 host_phys_addr; /* Ring base addr */
U64 host_phys_addr; /* Ring base addr */
U64 buff_size; /* Packet buffer size */
U64 host_rsp_dma_addr; /* Response dma'd here */
U64 host_stat_buffer; /* Where to dma stats */
offsetof(unm_user_info_t, mac_addr), FLASH_NUM_PORTS * sizeof (U64),
FLASH_NUM_PORTS * sizeof (U64), pmac) == -1)
adapter->ctxDesc->CmdRingAddrHi = ((U64)hw->cmdDesc_physAddr >> 32);
((U64)rcv_desc->phys_addr>>32);
#define MDE_ILLEGAL_IDX U64(-1)
U64 Address;
U64 Address;
U64 Words;
U64 Words;
U64 Address;
U64 Address64;
U64 Address;
U64 Address64;
U64 RaidAcceleratorBufferBaseAddress; /* 0x04 */
U64 RaidAcceleratorBufferSize; /* 0x0C */
U64 RaidAcceleratorControlBaseAddress; /* 0x14 */
U64 RaidAcceleratorHostControlBaseAddress; /* 0x08 */
U64 SASAddress; /* 0x00 */
U64 EnclosureLogicalID; /* 0x00 */
U64 DeviceName; /* 0x00 */
U64 WWID; /* 0x00 */
U64 ReassignmentWWID; /* 0x00 */
U64 ReassignmentDeviceName; /* 0x08 */
U64 MaxLBA; /* 0x10 */
U64 WWID; /* 0x30 */
U64 DeviceMaxLBA; /* 0x58 */
U64 HostMaxLBA; /* 0x60 */
U64 CoercedMaxLBA; /* 0x68 */
U64 WWID; /* 0x04 */
U64 OwnerWWID; /* 0x0C */
U64 TimeStamp; /* 0x08 */
U64 SASAddress; /* 0x0C */
U64 ActiveZoneManagerSASAddress;/* 0x2C */
U64 SASAddress; /* 0x0C */
U64 DeviceName; /* 0x24 */
U64 SASAddress; /* 0x0C */
U64 SASAddress; /* 0x10 */
U64 EnclosureLogicalID; /* 0x0C */
U64 TimeStamp; /* 0x00 */
U64 PhysicalIdentifier; /* 0x00 */
U64 WWID; /* 0x0C */
U64 WWID; /* 0x00 */
U64 DeviceName; /* 0x08 */
U64 UniqueValue; /* 0x04 */
U64 SASAddress; /* 0x10 */
U64 SASAddress; /* 0x04 */
U64 EnclosureLogicalID; /* 0x04 */
U64 TimeStamp; /* 0x00 */
U64 WWID; /* 0x0C */
U64 TimeStamp; /* 0x00 */
U64 LookupAddress; /* 0x18 */
U64 SystemRequestFrameBaseAddress; /* 0x28 */
U64 ReplyDescriptorPostQueueAddress;/* 0x30 */
U64 ReplyFreeQueueAddress; /* 0x38 */
U64 TimeStamp; /* 0x40 */
U64 RDPQBaseAddress; /* 0x00 */
U64 TimeStamp; /* 0x00 */
U64 SASAddress; /* 0x0C */
U64 SASAddress; /* 0x04 */
U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
U64 VolumeMaxLBA; /* 0x10 */
U64 TotalBlocks; /* 0x00 */
U64 BlocksRemaining; /* 0x08 */
U64 SASAddress; /* 0x10 */
U64 LookupAddress; /* 0x18 */
U64 BufferAddress; /* 0x0C */
typedef U64 *PU64;