fw_hdr
const struct tegra_xusb_fw_hdr *fw_hdr;
fw_hdr = (const struct tegra_xusb_fw_hdr *)fw->data;
fw_size = fw_hdr->fwimg_len;
fw_hdr = (const struct tegra_xusb_fw_hdr *)fw_vaddr;
fw_base = fw_paddr + sizeof(*fw_hdr);
code_tags = howmany(fw_hdr->boot_codetag, XUSB_CSB_IMEM_BLOCK_SIZE);
code_size = howmany(fw_hdr->boot_codesize, XUSB_CSB_IMEM_BLOCK_SIZE);
CSB_WR4(sc, XUSB_FALCON_BOOTVEC, fw_hdr->boot_codetag);
fw_timespec.tv_sec = fw_hdr->fwimg_created_time;
(fw_hdr->version_id >> 24) & 0xFF,(fw_hdr->version_id >> 15) & 0xFF,
fw_hdr->version_id & 0xFFFF,
int t4_get_fw_hdr(struct adapter *adapter, struct fw_hdr *hdr);
return t4_read_flash(adapter, start + offsetof(struct fw_hdr, fw_ver),
int t4_get_fw_hdr(struct adapter *adapter, struct fw_hdr *hdr)
return t4_read_flash(adapter, start + offsetof(struct fw_hdr, fw_ver),
offsetof(struct fw_hdr, tp_microcode_ver), 1, vers, 0);
const struct fw_hdr *hdr)
const struct fw_hdr *hdr = (const struct fw_hdr *)fw_data;
((struct fw_hdr *)first_page)->fw_ver = cpu_to_be32(0xffffffff);
fw_start + offsetof(struct fw_hdr, fw_ver),
const struct fw_hdr *fw_hdr = (const struct fw_hdr *)fw_data;
be32_to_cpu(fw_hdr->magic) == FW_HDR_MAGIC_BOOTSTRAP;
if (!t4_fw_matches_chip(adap, fw_hdr))
CTASSERT(offsetof(struct fw_h, fw_ver) == offsetof(struct fw_hdr, fw_ver));
CTASSERT(offsetof(struct fw_h, intfver_nic) == offsetof(struct fw_hdr, intfver_nic));
CTASSERT(offsetof(struct fw_h, intfver_fcoe) == offsetof(struct fw_hdr, intfver_fcoe));
k = be32toh(((const struct fw_hdr *)fw->data)->fw_ver);
struct fw_hdr *card_fw; /* fw on the card */
MpiFwHeader_t *fw_hdr;
fw_hdr = (MpiFwHeader_t *)mpt->fw_image;
mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr,
fw_hdr->ImageSize);
ext_offset = fw_hdr->NextImageHeaderOffset;
ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset);
mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr);
mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue);