bus_space_write_2
bus_space_write_2(t, h, offset, temp);
void bus_space_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset, uint16_t data);
bus_space_write_2(_sc->bst, _sc->bsh, _reg, _val)
bus_space_write_2(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val)
__generate_inline_bs_ws(bus_space_write_2, bs_w_2, uint16_t);
bus_space_write_2(sc->sc_bst, sc->sc_bsh,
bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
bus_space_write_2(t, h, reg, htole16(val));
#define AAC_MEM0_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag0, \
#define AAC_MEM1_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag1, \
#define AAC_MEM0_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag0, \
#define AAC_MEM1_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag1, \
#define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v)
bus_space_write_2((ahd)->tags[(port) >> 8], \
bus_space_write_2(sc->bce_btag, sc->bce_bhandle, offset, val);
bus_space_write_2(sc->bce_btag, sc->bce_bhandle, offset, val)
bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
bus_space_write_2(sc->bar[BAR0].tag, \
bus_space_write_2(sc->bar[BAR0].tag,
bus_space_write_2(sc->sc_tag, sc->sc_handle, ofs, val);
bus_space_write_2(sc->sc_tag, sc->sc_handle, ofs, htole16(val));
bus_space_write_2(sc->sc_tag, sc->sc_handle,
bus_space_write_2(sc->sc_tag, sc->sc_handle, off<<1, v);
bus_space_write_2(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
bus_space_write_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
bus_space_write_2(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
bus_space_write_2((ioat)->pci_bus_tag, (ioat)->pci_bus_handle, \
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
bus_space_write_2(sc->lge_btag, sc->lge_bhandle, reg, val)
bus_space_write_2(oct->mem_bus_space[0].tag,
#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \
bus_space_write_2(sc->my_btag, sc->my_bhandle, reg, val)
((IS_BE(sc) || IS_SH(sc)) ? (bus_space_write_2((sc)->space##_btag, \
: (bus_space_write_2((sc)->devcfg_btag, \
return bus_space_write_2(reg->btag, reg->bhandle, off, val);
bus_space_write_2((r)->r_bustag, (r)->r_bushandle, o, v)
bus_space_write_2(sc->rge_btag, sc->rge_bhandle, reg, val)
bus_space_write_2(sc->rl_btag, sc->rl_bhandle, reg, val)
bus_space_write_2(pc->pc_st, pc->pc_sh, addr, val);
bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
bus_space_write_2(sc->st, sc->sh, regno, data);
bus_space_write_2(btag, 0x0, port, control);
bus_space_write_2(sc->st, sc->sh, regno, data);
bus_space_write_2(sc->st, sc->sh, regno, data);
bus_space_write_2(sc->cst, sc->csh, regno, data);
bus_space_write_2(sc->mtt, sc->mth, regno, data);
bus_space_write_2(sc->cst, sc->csh, regno, data);
bus_space_write_2(sc->mtt, sc->mth, regno, data);
bus_space_write_2(es->st, es->sh, regno, data);
bus_space_write_2(fm801->st, fm801->sh, regno, data);
bus_space_write_2((mem)->mem_tag, (mem)->mem_handle, (offset), (value))
bus_space_write_2((sc)->cst, (sc)->csh, (regno), (data))
bus_space_write_2((sc)->cst, (sc)->csh, (regno), (data))
bus_space_write_2(sc->nabmbart, sc->nabmbarh, regno, data);
bus_space_write_2(sc->nambart, sc->nambarh, regno, data);
#define m3_wr_2(sc, regno, data) bus_space_write_2(sc->st, sc->sh, regno, data)
bus_space_write_2(st, sh, regno, data);
bus_space_write_2(st, sh, regno, data);
bus_space_write_2(st, sh, regno, data);
bus_space_write_2(tr->st, tr->sh, regno, data);
bus_space_write_2(via->st, via->sh, regno, data);
bus_space_write_2(via->st, via->sh, regno, data);
bus_space_write_2(bus_tag, bus_handle, offset,
bus_space_write_2(bas->bst, bas->bsh, uart_regofs(bas, reg), value);
bus_space_write_2((bas)->bst, (bas)->bsh, (reg), (value))
bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
bus_space_write_2(bs_parent_space(bs), h, awusbdrd_reg(o), v);
do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
do { UBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); \
bus_space_write_2(sc->sc_io_tag, sc->sc_io_hdl, UHCI_INTR, 0);
bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, \
bus_space_write_2(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val)
bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val)
bus_space_write_2(sc->sc_bst, sc->sc_bsh,
bus_space_write_2((r)->r_bustag, (r)->r_bushandle, (o), (v))
bus_space_write_2((t), (h), (o), (v))
static __inline void bus_space_write_2(bus_space_tag_t tag,