sys/dev/safe/safe.c

1417

w = READ_REG(sc, SAFE_RNG_OUT);

sys/dev/safe/safe.c

1419

v = READ_REG(sc, SAFE_RNG_OUT);

sys/dev/safe/safe.c

1430

v = READ_REG(sc, SAFE_RNG_OUT);

sys/dev/safe/safe.c

1441

READ_REG(sc, SAFE_RNG_CTRL) &~ SAFE_RNG_CTRL_SHORTEN);

sys/dev/safe/safe.c

1448

READ_REG(sc, SAFE_RNG_CTRL) | SAFE_RNG_CTRL_SHORTEN);

sys/dev/safe/safe.c

1457

while (READ_REG(sc, SAFE_RNG_STAT) != 0 && ++i < SAFE_RNG_MAXWAIT)

sys/dev/safe/safe.c

1459

return READ_REG(sc, SAFE_RNG_OUT);

sys/dev/safe/safe.c

1485

if (READ_REG(sc, SAFE_RNG_ALM_CNT) > safe_rngmaxalarm) {

sys/dev/safe/safe.c

1489

READ_REG(sc, SAFE_RNG_ALM_CNT), safe_rngmaxalarm));

sys/dev/safe/safe.c

1494

w = READ_REG(sc, SAFE_RNG_CNFG);

sys/dev/safe/safe.c

1504

if (READ_REG(sc, SAFE_RNG_ALM_CNT) == 0) {

sys/dev/safe/safe.c

1607

v = READ_REG(sc, SAFE_PE_DMACFG) &~

sys/dev/safe/safe.c

1625

v = READ_REG(sc, SAFE_PE_DMACFG);

sys/dev/safe/safe.c

1650

(READ_REG(sc, SAFE_DMA_CFG)>>2) & 0xff,

sys/dev/safe/safe.c

1809

, READ_REG(sc, SAFE_DMA_ENDIAN)

sys/dev/safe/safe.c

1810

, READ_REG(sc, SAFE_DMA_SRCADDR)

sys/dev/safe/safe.c

1811

, READ_REG(sc, SAFE_DMA_DSTADDR)

sys/dev/safe/safe.c

1812

, READ_REG(sc, SAFE_DMA_STAT)

sys/dev/safe/safe.c

1821

, READ_REG(sc, SAFE_HI_CFG)

sys/dev/safe/safe.c

1822

, READ_REG(sc, SAFE_HI_MASK)

sys/dev/safe/safe.c

1823

, READ_REG(sc, SAFE_HI_DESC_CNT)

sys/dev/safe/safe.c

1824

, READ_REG(sc, SAFE_HU_STAT)

sys/dev/safe/safe.c

1825

, READ_REG(sc, SAFE_HM_STAT)

sys/dev/safe/safe.c

1832

u_int32_t estat = READ_REG(sc, SAFE_PE_ERNGSTAT);

sys/dev/safe/safe.c

274

sc->sc_chiprev = READ_REG(sc, SAFE_DEVINFO) &

sys/dev/safe/safe.c

377

sc->sc_devinfo = READ_REG(sc, SAFE_DEVINFO);

sys/dev/safe/safe.c

529

stat = READ_REG(sc, SAFE_HM_STAT);

sys/dev/safe/safe.c

575

READ_REG(sc, SAFE_PE_DMASTAT)));