#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/proc.h>
#include <sys/sysctl.h>
#include <sys/sysmsg.h>
#include <sys/bio.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/stat.h>
#include <machine/cpu.h>
#include <sys/rman.h>
#include <bus/pci/pcireg.h>
#include <bus/pci/pcivar.h>
#include <dev/raid/amr/amrio.h>
#include <dev/raid/amr/amrreg.h>
#include <dev/raid/amr/amrvar.h>
#define AMR_DEFINE_TABLES
#include <dev/raid/amr/amr_tables.h>
SYSCTL_NODE(_hw, OID_AUTO, amr, CTLFLAG_RD, 0, "AMR driver parameters");
static d_open_t amr_open;
static d_close_t amr_close;
static d_ioctl_t amr_ioctl;
static struct dev_ops amr_ops = {
{ "amr", 0, 0 },
.d_open = amr_open,
.d_close = amr_close,
.d_ioctl = amr_ioctl,
};
int linux_no_adapter = 0;
static void amr_startup(void *arg);
static int amr_query_controller(struct amr_softc *sc);
static void *amr_enquiry(struct amr_softc *sc, size_t bufsize,
u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status);
static void amr_completeio(struct amr_command *ac);
static int amr_support_ext_cdb(struct amr_softc *sc);
static void amr_alloccmd_cluster(struct amr_softc *sc);
static void amr_freecmd_cluster(struct amr_command_cluster *acc);
static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp);
static int amr_wait_command(struct amr_command *ac);
static int amr_mapcmd(struct amr_command *ac);
static void amr_unmapcmd(struct amr_command *ac);
static int amr_start(struct amr_command *ac);
static void amr_complete(void *context, ac_qhead_t *head);
static void amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
static void amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
static void amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegments, int error);
static void amr_abort_load(struct amr_command *ac);
static int amr_quartz_submit_command(struct amr_command *ac);
static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
static int amr_quartz_poll_command(struct amr_command *ac);
static int amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac);
static int amr_std_submit_command(struct amr_command *ac);
static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
static int amr_std_poll_command(struct amr_command *ac);
static void amr_std_attach_mailbox(struct amr_softc *sc);
#ifdef AMR_BOARD_INIT
static int amr_quartz_init(struct amr_softc *sc);
static int amr_std_init(struct amr_softc *sc);
#endif
static void amr_describe_controller(struct amr_softc *sc);
#ifdef AMR_DEBUG
#if 0
static void amr_printcommand(struct amr_command *ac);
#endif
#endif
static void amr_init_sysctl(struct amr_softc *sc);
static int amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr,
int32_t flag, struct sysmsg *sm);
static MALLOC_DEFINE(M_AMR, "amr", "AMR memory");
int
amr_attach(struct amr_softc *sc)
{
device_t child;
debug_called(1);
amr_init_qhead(&sc->amr_freecmds);
amr_init_qhead(&sc->amr_ready);
TAILQ_INIT(&sc->amr_cmd_clusters);
bioq_init(&sc->amr_bioq);
debug(2, "queue init done");
if (AMR_IS_QUARTZ(sc)) {
sc->amr_submit_command = amr_quartz_submit_command;
sc->amr_get_work = amr_quartz_get_work;
sc->amr_poll_command = amr_quartz_poll_command;
sc->amr_poll_command1 = amr_quartz_poll_command1;
} else {
sc->amr_submit_command = amr_std_submit_command;
sc->amr_get_work = amr_std_get_work;
sc->amr_poll_command = amr_std_poll_command;
amr_std_attach_mailbox(sc);
}
#ifdef AMR_BOARD_INIT
if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc)))
return(ENXIO);
#endif
amr_alloccmd_cluster(sc);
if (amr_query_controller(sc))
return(ENXIO);
debug(2, "controller query complete");
while (sc->amr_nextslot < sc->amr_maxio)
amr_alloccmd_cluster(sc);
amr_init_sysctl(sc);
child = device_add_child(sc->amr_dev, "amrp", -1);
sc->amr_pass = child;
if (child != NULL) {
device_set_softc(child, sc);
device_set_desc(child, "SCSI Passthrough Bus");
bus_generic_attach(sc->amr_dev);
}
sc->amr_dev_t = make_dev(&amr_ops, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR,
S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev));
sc->amr_dev_t->si_drv1 = sc;
linux_no_adapter++;
if (device_get_unit(sc->amr_dev) == 0)
make_dev_alias(sc->amr_dev_t, "megadev0");
bzero(&sc->amr_ich, sizeof(struct intr_config_hook));
sc->amr_ich.ich_func = amr_startup;
sc->amr_ich.ich_arg = sc;
sc->amr_ich.ich_desc = "amr";
if (config_intrhook_establish(&sc->amr_ich) != 0) {
device_printf(sc->amr_dev, "can't establish configuration hook\n");
return(ENOMEM);
}
amr_describe_controller(sc);
debug(2, "attach complete");
return(0);
}
static void
amr_startup(void *arg)
{
struct amr_softc *sc = (struct amr_softc *)arg;
struct amr_logdrive *dr;
int i, error;
debug_called(1);
if (sc->amr_ich.ich_func)
config_intrhook_disestablish(&sc->amr_ich);
sc->amr_ich.ich_func = NULL;
if (amr_query_controller(sc)) {
device_printf(sc->amr_dev, "can't scan controller for drives\n");
return;
}
for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) {
if (dr->al_disk == 0) {
if (dr->al_size > 0x200000) {
dr->al_heads = 255;
dr->al_sectors = 63;
} else {
dr->al_heads = 64;
dr->al_sectors = 32;
}
dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors);
dr->al_disk = device_add_child(sc->amr_dev, NULL, -1);
if (dr->al_disk == 0)
device_printf(sc->amr_dev, "device_add_child failed\n");
device_set_ivars(dr->al_disk, dr);
}
}
if ((error = bus_generic_attach(sc->amr_dev)) != 0)
device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error);
sc->amr_state &= ~AMR_STATE_SHUTDOWN;
sc->amr_state |= AMR_STATE_INTEN;
return;
}
static void
amr_init_sysctl(struct amr_softc *sc)
{
struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->amr_dev);
struct sysctl_oid *tree = device_get_sysctl_tree(sc->amr_dev);
SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
OID_AUTO, "allow_volume_configure", CTLFLAG_RW, &sc->amr_allow_vol_config, 0,
"");
SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
OID_AUTO, "nextslot", CTLFLAG_RD, &sc->amr_nextslot, 0,
"");
SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
OID_AUTO, "busyslots", CTLFLAG_RD, &sc->amr_busyslots, 0,
"");
SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
OID_AUTO, "maxio", CTLFLAG_RD, &sc->amr_maxio, 0,
"");
}
void
amr_free(struct amr_softc *sc)
{
struct amr_command_cluster *acc;
if (sc->amr_pass != NULL)
device_delete_child(sc->amr_dev, sc->amr_pass);
while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) {
TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link);
amr_freecmd_cluster(acc);
}
if(sc->amr_dev_t != NULL)
destroy_dev(sc->amr_dev_t);
dev_ops_remove_minor(&amr_ops, device_get_unit(sc->amr_dev));
#if 0
if (mtx_initialized(&sc->amr_hw_lock))
mtx_destroy(&sc->amr_hw_lock);
if (mtx_initialized(&sc->amr_list_lock))
mtx_destroy(&sc->amr_list_lock);
#endif
lockuninit(&sc->amr_hw_lock);
lockuninit(&sc->amr_list_lock);
}
int
amr_submit_bio(struct amr_softc *sc, struct bio *bio)
{
debug_called(2);
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
amr_enqueue_bio(sc, bio);
amr_startio(sc);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
return(0);
}
static int
amr_open(struct dev_open_args *ap)
{
cdev_t dev = ap->a_head.a_dev;
int unit = minor(dev);
struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
debug_called(1);
sc->amr_state |= AMR_STATE_OPEN;
return(0);
}
static int
amr_close(struct dev_close_args *ap)
{
cdev_t dev = ap->a_head.a_dev;
int unit = minor(dev);
struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
debug_called(1);
sc->amr_state &= ~AMR_STATE_OPEN;
return (0);
}
static void
amr_rescan_drives(struct cdev *dev)
{
struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
int i, error = 0;
sc->amr_state |= AMR_STATE_REMAP_LD;
while (sc->amr_busyslots) {
device_printf(sc->amr_dev, "idle controller\n");
amr_done(sc);
}
sc->amr_state |= AMR_STATE_SHUTDOWN;
device_printf(sc->amr_dev, "flushing cache...");
kprintf("%s\n", amr_flush(sc) ? "failed" : "done");
for(i = 0 ; i < AMR_MAXLD; i++) {
if(sc->amr_drive[i].al_disk != 0) {
if((error = device_delete_child(sc->amr_dev,
sc->amr_drive[i].al_disk)) != 0)
goto shutdown_out;
sc->amr_drive[i].al_disk = 0;
}
}
shutdown_out:
amr_startup(sc);
}
static unsigned long
amr_ioctl_buffer_length(unsigned long len)
{
if (len <= 32 * 1024)
return (32 * 1024);
if (len <= 64 * 1024)
return (64 * 1024);
return (len);
}
static int
amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag,
struct sysmsg *sm)
{
struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
struct amr_command *ac;
struct amr_mailbox *mb;
struct amr_linux_ioctl ali;
void *dp, *temp;
int error;
int len, ac_flags = 0;
int logical_drives_changed = 0;
u_int32_t linux_version = 0x02100000;
u_int8_t status;
struct amr_passthrough *ap;
error = 0;
dp = NULL;
ac = NULL;
ap = NULL;
if ((error = copyin(addr, &ali, sizeof(ali))) != 0)
return (error);
switch (ali.ui.fcs.opcode) {
case 0x82:
switch(ali.ui.fcs.subopcode) {
case 'e':
copyout(&linux_version, (void *)(uintptr_t)ali.data,
sizeof(linux_version));
error = 0;
break;
case 'm':
copyout(&linux_no_adapter, (void *)(uintptr_t)ali.data,
sizeof(linux_no_adapter));
sm->sysmsg_result = linux_no_adapter;
error = 0;
break;
default:
kprintf("Unknown subopcode\n");
error = ENOIOCTL;
break;
}
break;
case 0x80:
case 0x81:
if (ali.ui.fcs.opcode == 0x80)
len = max(ali.outlen, ali.inlen);
else
len = ali.ui.fcs.length;
mb = (void *)&ali.mbox[0];
if ((ali.mbox[0] == FC_DEL_LOGDRV && ali.mbox[2] == OP_DEL_LOGDRV) ||
(ali.mbox[0] == AMR_CMD_CONFIG && ali.mbox[2] == 0x0d)) {
if (sc->amr_allow_vol_config == 0) {
error = EPERM;
break;
}
logical_drives_changed = 1;
}
if (ali.mbox[0] == AMR_CMD_PASS) {
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
while ((ac = amr_alloccmd(sc)) == NULL)
lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
ap = &ac->ac_ccb->ccb_pthru;
error = copyin((void *)(uintptr_t)mb->mb_physaddr, ap,
sizeof(struct amr_passthrough));
if (error)
break;
if (ap->ap_data_transfer_length)
dp = kmalloc(ap->ap_data_transfer_length, M_AMR,
M_WAITOK | M_ZERO);
if (ali.inlen) {
error = copyin((void *)(uintptr_t)ap->ap_data_transfer_address,
dp, ap->ap_data_transfer_length);
if (error)
break;
}
ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT|AMR_CMD_CCB;
bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox));
ac->ac_mailbox.mb_command = AMR_CMD_PASS;
ac->ac_flags = ac_flags;
ac->ac_data = dp;
ac->ac_length = ap->ap_data_transfer_length;
temp = (void *)(uintptr_t)ap->ap_data_transfer_address;
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
error = amr_wait_command(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (error)
break;
status = ac->ac_status;
error = copyout(&status, &((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_scsi_status, sizeof(status));
if (error)
break;
if (ali.outlen) {
error = copyout(dp, temp, ap->ap_data_transfer_length);
if (error)
break;
}
error = copyout(ap->ap_request_sense_area, ((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_request_sense_area, ap->ap_request_sense_length);
if (error)
break;
error = 0;
break;
} else if (ali.mbox[0] == AMR_CMD_PASS_64) {
kprintf("No AMR_CMD_PASS_64\n");
error = ENOIOCTL;
break;
} else if (ali.mbox[0] == AMR_CMD_EXTPASS) {
kprintf("No AMR_CMD_EXTPASS\n");
error = ENOIOCTL;
break;
} else {
len = amr_ioctl_buffer_length(imax(ali.inlen, ali.outlen));
dp = kmalloc(len, M_AMR, M_WAITOK | M_ZERO);
if (ali.inlen) {
error = copyin((void *)(uintptr_t)mb->mb_physaddr, dp, len);
if (error)
break;
}
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
while ((ac = amr_alloccmd(sc)) == NULL)
lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz);
ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT;
bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox));
bcopy(&ali.mbox[0], &ac->ac_mailbox, sizeof(ali.mbox));
ac->ac_length = len;
ac->ac_data = dp;
ac->ac_flags = ac_flags;
error = amr_wait_command(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (error)
break;
status = ac->ac_status;
error = copyout(&status, &((struct amr_mailbox *)&((struct amr_linux_ioctl *)addr)->mbox[0])->mb_status, sizeof(status));
if (ali.outlen) {
error = copyout(dp, (void *)(uintptr_t)mb->mb_physaddr, ali.outlen);
if (error)
break;
}
error = 0;
if (logical_drives_changed)
amr_rescan_drives(dev);
break;
}
break;
default:
debug(1, "unknown linux ioctl 0x%lx", cmd);
kprintf("unknown linux ioctl 0x%lx\n", cmd);
error = ENOIOCTL;
break;
}
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
if (ac != NULL)
amr_releasecmd(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (dp != NULL)
kfree(dp, M_AMR);
return(error);
}
static int
amr_ioctl(struct dev_ioctl_args *ap)
{
cdev_t dev = ap->a_head.a_dev;
caddr_t addr = ap->a_data;
u_long cmd = ap->a_cmd;
struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
union {
void *_p;
struct amr_user_ioctl *au;
#ifdef AMR_IO_COMMAND32
struct amr_user_ioctl32 *au32;
#endif
int *result;
} arg;
struct amr_command *ac;
struct amr_mailbox_ioctl *mbi;
void *dp, *au_buffer;
unsigned long au_length, real_length;
unsigned char *au_cmd;
int *au_statusp;
int error;
struct amr_passthrough *_ap;
int logical_drives_changed = 0;
debug_called(1);
arg._p = (void *)addr;
error = 0;
dp = NULL;
ac = NULL;
_ap = NULL;
switch(cmd) {
case AMR_IO_VERSION:
debug(1, "AMR_IO_VERSION");
*arg.result = AMR_IO_VERSION_NUMBER;
return(0);
#ifdef AMR_IO_COMMAND32
case AMR_IO_COMMAND32:
debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]);
au_cmd = arg.au32->au_cmd;
au_buffer = (void *)(u_int64_t)arg.au32->au_buffer;
au_length = arg.au32->au_length;
au_statusp = &arg.au32->au_status;
break;
#endif
case AMR_IO_COMMAND:
debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]);
au_cmd = arg.au->au_cmd;
au_buffer = (void *)arg.au->au_buffer;
au_length = arg.au->au_length;
au_statusp = &arg.au->au_status;
break;
case 0xc0046d00:
case 0xc06e6d00:
{
devclass_t devclass;
struct amr_linux_ioctl ali;
int adapter, error;
devclass = devclass_find("amr");
if (devclass == NULL)
return (ENOENT);
error = copyin(addr, &ali, sizeof(ali));
if (error)
return (error);
if (ali.ui.fcs.opcode == 0x82)
adapter = 0;
else
adapter = (ali.ui.fcs.adapno) ^ 'm' << 8;
sc = devclass_get_softc(devclass, adapter);
if (sc == NULL)
return (ENOENT);
return (amr_linux_ioctl_int(sc->amr_dev_t, cmd, addr, 0, ap->a_sysmsg));
}
default:
debug(1, "unknown ioctl 0x%lx", cmd);
return(ENOIOCTL);
}
if ((au_cmd[0] == FC_DEL_LOGDRV && au_cmd[1] == OP_DEL_LOGDRV) ||
(au_cmd[0] == AMR_CMD_CONFIG && au_cmd[1] == 0x0d)) {
if (sc->amr_allow_vol_config == 0) {
error = EPERM;
goto out;
}
logical_drives_changed = 1;
}
real_length = amr_ioctl_buffer_length(au_length);
if (au_length != 0 && au_cmd[0] != 0x06) {
if ((dp = kmalloc(real_length, M_AMR, M_WAITOK|M_ZERO)) == NULL) {
error = ENOMEM;
goto out;
}
if ((error = copyin(au_buffer, dp, au_length)) != 0) {
kfree(dp, M_AMR);
return (error);
}
debug(2, "copyin %ld bytes from %p -> %p", au_length, au_buffer, dp);
}
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
while ((ac = amr_alloccmd(sc)) == NULL)
lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz);
if (au_cmd[0] == AMR_CMD_PASS) {
int len;
_ap = &ac->ac_ccb->ccb_pthru;
bzero(_ap, sizeof(struct amr_passthrough));
len = au_cmd[2];
_ap->ap_cdb_length = len;
bcopy(au_cmd + 3, _ap->ap_cdb, len);
_ap->ap_timeout = au_cmd[len + 3] & 0x07;
_ap->ap_ars = (au_cmd[len + 3] & 0x08) ? 1 : 0;
_ap->ap_islogical = (au_cmd[len + 3] & 0x80) ? 1 : 0;
_ap->ap_logical_drive_no = au_cmd[len + 4];
_ap->ap_channel = au_cmd[len + 5];
_ap->ap_scsi_id = au_cmd[len + 6];
_ap->ap_request_sense_length = 14;
_ap->ap_data_transfer_length = au_length;
ac->ac_mailbox.mb_command = AMR_CMD_PASS;
ac->ac_flags = AMR_CMD_CCB;
} else {
mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox;
mbi->mb_command = au_cmd[0];
mbi->mb_channel = au_cmd[1];
mbi->mb_param = au_cmd[2];
mbi->mb_pad[0] = au_cmd[3];
mbi->mb_drive = au_cmd[4];
ac->ac_flags = 0;
}
ac->ac_data = dp;
ac->ac_length = real_length;
ac->ac_flags |= AMR_CMD_DATAIN|AMR_CMD_DATAOUT;
error = amr_wait_command(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (error)
goto out;
if (au_length != 0) {
error = copyout(dp, au_buffer, au_length);
}
debug(2, "copyout %ld bytes from %p -> %p", au_length, dp, au_buffer);
if (dp != NULL)
debug(2, "%p status 0x%x", dp, ac->ac_status);
*au_statusp = ac->ac_status;
out:
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
if (ac != NULL)
amr_releasecmd(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (dp != NULL)
kfree(dp, M_AMR);
if (logical_drives_changed)
amr_rescan_drives(dev);
return(error);
}
static int
amr_query_controller(struct amr_softc *sc)
{
struct amr_enquiry3 *aex;
struct amr_prodinfo *ap;
struct amr_enquiry *ae;
int ldrv;
int status;
sc->support_ext_cdb = amr_support_ext_cdb(sc);
if(sc->support_ext_cdb) {
debug(2,"supports extended CDBs.");
}
if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3,
AMR_CONFIG_ENQ3_SOLICITED_FULL, &status)) != NULL) {
for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) {
sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv];
sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv];
sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv];
debug(2, " drive %d: %d state %x properties %x", ldrv, sc->amr_drive[ldrv].al_size,
sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
}
kfree(aex, M_AMR);
if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) == NULL) {
device_printf(sc->amr_dev, "can't obtain product data from controller\n");
return(1);
}
sc->amr_maxdrives = 40;
sc->amr_maxchan = ap->ap_nschan;
sc->amr_maxio = ap->ap_maxio;
sc->amr_type |= AMR_TYPE_40LD;
kfree(ap, M_AMR);
ap = amr_enquiry(sc, 0, FC_DEL_LOGDRV, OP_SUP_DEL_LOGDRV, 0, &status);
if (ap != NULL)
kfree(ap, M_AMR);
if (!status) {
sc->amr_ld_del_supported = 1;
device_printf(sc->amr_dev, "delete logical drives supported by controller\n");
}
} else {
if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) == NULL) {
if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) == NULL) {
device_printf(sc->amr_dev, "can't obtain configuration data from controller\n");
return(1);
}
ae->ae_signature = 0;
}
for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) {
sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv];
sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv];
sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv];
debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
}
sc->amr_maxdrives = 8;
sc->amr_maxchan = ae->ae_adapter.aa_channels;
sc->amr_maxio = ae->ae_adapter.aa_maxio;
kfree(ae, M_AMR);
}
for (; ldrv < AMR_MAXLD; ldrv++)
sc->amr_drive[ldrv].al_size = 0xffffffff;
sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD);
return(0);
}
static void *
amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status)
{
struct amr_command *ac;
void *result;
u_int8_t *mbox;
int error;
debug_called(1);
*status = 0;
error = 1;
result = NULL;
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
ac = amr_alloccmd(sc);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (ac == NULL)
goto out;
if ((result = kmalloc(bufsize, M_AMR, M_ZERO|M_NOWAIT)) == NULL)
goto out;
ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAIN;
ac->ac_data = result;
ac->ac_length = bufsize;
mbox = (u_int8_t *)&ac->ac_mailbox;
mbox[0] = cmd;
mbox[2] = cmdsub;
mbox[3] = cmdqual;
*status = 0;
if (sc->amr_poll_command(ac))
goto out;
error = ac->ac_status;
*status = ac->ac_status;
out:
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
if (ac != NULL)
amr_releasecmd(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if ((error != 0) && (result != NULL)) {
kfree(result, M_AMR);
result = NULL;
}
return(result);
}
int
amr_flush(struct amr_softc *sc)
{
struct amr_command *ac;
int error;
error = 1;
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
ac = amr_alloccmd(sc);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (ac == NULL)
goto out;
ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
ac->ac_mailbox.mb_command = AMR_CMD_FLUSH;
if (sc->amr_poll_command(ac))
goto out;
error = ac->ac_status;
out:
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
if (ac != NULL)
amr_releasecmd(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
return(error);
}
static int
amr_support_ext_cdb(struct amr_softc *sc)
{
struct amr_command *ac;
u_int8_t *mbox;
int error;
error = 0;
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
ac = amr_alloccmd(sc);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
if (ac == NULL)
goto out;
ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
mbox = (u_int8_t *)&ac->ac_mailbox;
mbox[0] = 0xA4;
mbox[2] = 0x16;
if (sc->amr_poll_command(ac))
goto out;
if( ac->ac_status == AMR_STATUS_SUCCESS ) {
error = 1;
}
out:
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
if (ac != NULL)
amr_releasecmd(ac);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
return(error);
}
void
amr_startio(struct amr_softc *sc)
{
struct amr_command *ac;
for (;;) {
if (sc->amr_state & AMR_STATE_QUEUE_FRZN)
break;
ac = amr_dequeue_ready(sc);
if (ac == NULL)
(void)amr_bio_command(sc, &ac);
if ((ac == NULL) && (sc->amr_cam_command != NULL))
sc->amr_cam_command(sc, &ac);
if (ac == NULL)
break;
if (amr_start(ac)) {
debug(2, "controller busy, command deferred");
amr_requeue_ready(ac);
break;
}
}
}
static void
amr_completeio(struct amr_command *ac)
{
struct amr_softc *sc = ac->ac_sc;
static struct timeval lastfail;
static int curfail;
struct buf *bp = ac->ac_bio->bio_buf;
if (ac->ac_status != AMR_STATUS_SUCCESS) {
bp->b_error = EIO;
bp->b_flags |= B_ERROR;
if (ppsratecheck(&lastfail, &curfail, 1))
device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status);
}
amrd_intr(ac->ac_bio);
lockmgr(&ac->ac_sc->amr_list_lock, LK_EXCLUSIVE);
amr_releasecmd(ac);
lockmgr(&ac->ac_sc->amr_list_lock, LK_RELEASE);
}
static int
amr_bio_command(struct amr_softc *sc, struct amr_command **acp)
{
struct amr_command *ac;
struct amrd_softc *amrd;
struct bio *bio;
struct buf *bp;
int error;
int blkcount;
int driveno;
int cmd;
ac = NULL;
error = 0;
if ((ac = amr_alloccmd(sc)) == NULL)
return (ENOMEM);
if ((bio = amr_dequeue_bio(sc)) == NULL) {
amr_releasecmd(ac);
return (0);
}
bp = bio->bio_buf;
ac->ac_complete = amr_completeio;
ac->ac_bio = bio;
ac->ac_data = bp->b_data;
ac->ac_length = bp->b_bcount;
cmd = 0;
switch (bp->b_cmd) {
case BUF_CMD_READ:
ac->ac_flags |= AMR_CMD_DATAIN;
if (AMR_IS_SG64(sc)) {
cmd = AMR_CMD_LREAD64;
ac->ac_flags |= AMR_CMD_SG64;
} else
cmd = AMR_CMD_LREAD;
break;
case BUF_CMD_WRITE:
ac->ac_flags |= AMR_CMD_DATAOUT;
if (AMR_IS_SG64(sc)) {
cmd = AMR_CMD_LWRITE64;
ac->ac_flags |= AMR_CMD_SG64;
} else
cmd = AMR_CMD_LWRITE;
break;
case BUF_CMD_FLUSH:
ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
cmd = AMR_CMD_FLUSH;
break;
default:
panic("Invalid bio command");
}
amrd = (struct amrd_softc *)bio->bio_driver_info;
driveno = amrd->amrd_drive - sc->amr_drive;
blkcount = (bp->b_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE;
ac->ac_mailbox.mb_command = cmd;
if (bp->b_cmd & (BUF_CMD_READ|BUF_CMD_WRITE)) {
ac->ac_mailbox.mb_blkcount = blkcount;
ac->ac_mailbox.mb_lba = bio->bio_offset / AMR_BLKSIZE;
if (((bio->bio_offset / AMR_BLKSIZE) + blkcount) > sc->amr_drive[driveno].al_size) {
device_printf(sc->amr_dev,
"I/O beyond end of unit (%lld,%d > %lu)\n",
(long long)(bio->bio_offset / AMR_BLKSIZE), blkcount,
(u_long)sc->amr_drive[driveno].al_size);
}
}
ac->ac_mailbox.mb_drive = driveno;
if (sc->amr_state & AMR_STATE_REMAP_LD)
ac->ac_mailbox.mb_drive |= 0x80;
*acp = ac;
return(error);
}
static int
amr_wait_command(struct amr_command *ac)
{
int error = 0;
struct amr_softc *sc = ac->ac_sc;
debug_called(1);
ac->ac_complete = NULL;
ac->ac_flags |= AMR_CMD_SLEEP;
if ((error = amr_start(ac)) != 0) {
return(error);
}
while ((ac->ac_flags & AMR_CMD_BUSY) && (error != EWOULDBLOCK)) {
error = lksleep(ac,&sc->amr_list_lock, 0, "amrwcmd", 0);
}
return(error);
}
static int
amr_std_poll_command(struct amr_command *ac)
{
struct amr_softc *sc = ac->ac_sc;
int error, count;
debug_called(2);
ac->ac_complete = NULL;
if ((error = amr_start(ac)) != 0)
return(error);
count = 0;
do {
amr_done(sc);
DELAY(1000);
} while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000));
if (!(ac->ac_flags & AMR_CMD_BUSY)) {
error = 0;
} else {
error = EIO;
device_printf(sc->amr_dev, "polled command timeout\n");
}
return(error);
}
static void
amr_setup_polled_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
{
struct amr_command *ac = arg;
struct amr_softc *sc = ac->ac_sc;
int mb_channel;
if (err) {
device_printf(sc->amr_dev, "error %d in %s", err, __func__);
ac->ac_status = AMR_STATUS_ABORTED;
return;
}
amr_setup_sg(arg, segs, nsegs, err);
mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel;
if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG &&
((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) ||
(mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG)))
((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments;
ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments;
ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr;
if (AC_IS_SG64(ac)) {
ac->ac_sg64_hi = 0;
ac->ac_sg64_lo = ac->ac_sgbusaddr;
}
sc->amr_poll_command1(sc, ac);
}
static int
amr_quartz_poll_command(struct amr_command *ac)
{
struct amr_softc *sc = ac->ac_sc;
int error;
debug_called(2);
error = 0;
if (AC_IS_SG64(ac)) {
ac->ac_tag = sc->amr_buffer64_dmat;
ac->ac_datamap = ac->ac_dma64map;
} else {
ac->ac_tag = sc->amr_buffer_dmat;
ac->ac_datamap = ac->ac_dmamap;
}
if (ac->ac_data != NULL && ac->ac_length != 0) {
if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data,
ac->ac_length, amr_setup_polled_dmamap, ac, BUS_DMA_NOWAIT) != 0) {
error = 1;
}
} else {
error = amr_quartz_poll_command1(sc, ac);
}
return (error);
}
static int
amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac)
{
int count, error;
lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE);
if ((sc->amr_state & AMR_STATE_INTEN) == 0) {
count=0;
while (sc->amr_busyslots) {
lksleep(sc, &sc->amr_hw_lock, PCATCH, "amrpoll", hz);
if(count++>10) {
break;
}
}
if(sc->amr_busyslots) {
device_printf(sc->amr_dev, "adapter is busy\n");
lockmgr(&sc->amr_hw_lock, LK_RELEASE);
if (ac->ac_data != NULL) {
bus_dmamap_unload(ac->ac_tag, ac->ac_datamap);
}
ac->ac_status=0;
return(1);
}
}
bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
sc->amr_mailbox->mb_ident = 0xFE;
sc->amr_mailbox->mb_nstatus = 0xFF;
sc->amr_mailbox->mb_status = 0xFF;
sc->amr_mailbox->mb_poll = 0;
sc->amr_mailbox->mb_ack = 0;
sc->amr_mailbox->mb_busy = 1;
AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
while(sc->amr_mailbox->mb_nstatus == 0xFF)
DELAY(1);
while(sc->amr_mailbox->mb_status == 0xFF)
DELAY(1);
ac->ac_status=sc->amr_mailbox->mb_status;
error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0;
while(sc->amr_mailbox->mb_poll != 0x77)
DELAY(1);
sc->amr_mailbox->mb_poll = 0;
sc->amr_mailbox->mb_ack = 0x77;
AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
DELAY(1);
lockmgr(&sc->amr_hw_lock, LK_RELEASE);
if (ac->ac_flags & AMR_CMD_DATAIN) {
bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTREAD);
}
if (ac->ac_flags & AMR_CMD_DATAOUT) {
bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTWRITE);
}
bus_dmamap_unload(ac->ac_tag, ac->ac_datamap);
return(error);
}
static __inline int
amr_freeslot(struct amr_command *ac)
{
struct amr_softc *sc = ac->ac_sc;
int slot;
debug_called(3);
slot = ac->ac_slot;
if (sc->amr_busycmd[slot] == NULL)
panic("amr: slot %d not busy?", slot);
sc->amr_busycmd[slot] = NULL;
atomic_subtract_int(&sc->amr_busyslots, 1);
return (0);
}
static void
amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
{
struct amr_command *ac = (struct amr_command *)arg;
struct amr_sgentry *sg;
struct amr_sg64entry *sg64;
int flags, i;
debug_called(3);
sg = ac->ac_sg.sg32;
sg64 = ac->ac_sg.sg64;
if (AC_IS_SG64(ac)) {
ac->ac_nsegments = nsegments;
ac->ac_mb_physaddr = 0xffffffff;
for (i = 0; i < nsegments; i++, sg64++) {
sg64->sg_addr = segs[i].ds_addr;
sg64->sg_count = segs[i].ds_len;
}
} else {
if (nsegments < 2) {
ac->ac_nsegments = 0;
ac->ac_mb_physaddr = segs[0].ds_addr;
} else {
ac->ac_nsegments = nsegments;
ac->ac_mb_physaddr = ac->ac_sgbusaddr;
for (i = 0; i < nsegments; i++, sg++) {
sg->sg_addr = segs[i].ds_addr;
sg->sg_count = segs[i].ds_len;
}
}
}
flags = 0;
if (ac->ac_flags & AMR_CMD_DATAIN)
flags |= BUS_DMASYNC_PREREAD;
if (ac->ac_flags & AMR_CMD_DATAOUT)
flags |= BUS_DMASYNC_PREWRITE;
bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flags);
ac->ac_flags |= AMR_CMD_MAPPED;
}
static void
amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
{
struct amr_command *ac = arg;
struct amr_softc *sc = ac->ac_sc;
int mb_channel;
if (err) {
device_printf(sc->amr_dev, "error %d in %s", err, __func__);
amr_abort_load(ac);
return;
}
amr_setup_sg(arg, segs, nsegs, err);
mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel;
if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG &&
((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) ||
(mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG)))
((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments;
ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments;
ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr;
if (AC_IS_SG64(ac)) {
ac->ac_sg64_hi = 0;
ac->ac_sg64_lo = ac->ac_sgbusaddr;
}
if (sc->amr_submit_command(ac) == EBUSY) {
amr_freeslot(ac);
amr_requeue_ready(ac);
}
}
static void
amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegs, int err)
{
struct amr_command *ac = arg;
struct amr_softc *sc = ac->ac_sc;
struct amr_passthrough *ap = &ac->ac_ccb->ccb_pthru;
struct amr_ext_passthrough *aep = &ac->ac_ccb->ccb_epthru;
if (err) {
device_printf(sc->amr_dev, "error %d in %s", err, __func__);
amr_abort_load(ac);
return;
}
ac->ac_mailbox.mb_nsgelem = 0;
ac->ac_mailbox.mb_physaddr = ac->ac_ccb_busaddr;
amr_setup_sg(arg, segs, nsegs, err);
switch (ac->ac_mailbox.mb_command) {
case AMR_CMD_EXTPASS:
aep->ap_no_sg_elements = ac->ac_nsegments;
aep->ap_data_transfer_address = ac->ac_mb_physaddr;
break;
case AMR_CMD_PASS:
ap->ap_no_sg_elements = ac->ac_nsegments;
ap->ap_data_transfer_address = ac->ac_mb_physaddr;
break;
default:
panic("Unknown ccb command");
}
if (sc->amr_submit_command(ac) == EBUSY) {
amr_freeslot(ac);
amr_requeue_ready(ac);
}
}
static int
amr_mapcmd(struct amr_command *ac)
{
bus_dmamap_callback_t *cb;
struct amr_softc *sc = ac->ac_sc;
debug_called(3);
if (AC_IS_SG64(ac)) {
ac->ac_tag = sc->amr_buffer64_dmat;
ac->ac_datamap = ac->ac_dma64map;
} else {
ac->ac_tag = sc->amr_buffer_dmat;
ac->ac_datamap = ac->ac_dmamap;
}
if (ac->ac_flags & AMR_CMD_CCB)
cb = amr_setup_ccb;
else
cb = amr_setup_data;
if ((ac->ac_flags & AMR_CMD_MAPPED) == 0 && (ac->ac_data != NULL)) {
if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data,
ac->ac_length, cb, ac, 0) == EINPROGRESS) {
sc->amr_state |= AMR_STATE_QUEUE_FRZN;
}
} else {
if (sc->amr_submit_command(ac) == EBUSY) {
amr_freeslot(ac);
amr_requeue_ready(ac);
}
}
return (0);
}
static void
amr_unmapcmd(struct amr_command *ac)
{
int flag;
debug_called(3);
if (ac->ac_flags & AMR_CMD_MAPPED) {
if (ac->ac_data != NULL) {
flag = 0;
if (ac->ac_flags & AMR_CMD_DATAIN)
flag |= BUS_DMASYNC_POSTREAD;
if (ac->ac_flags & AMR_CMD_DATAOUT)
flag |= BUS_DMASYNC_POSTWRITE;
bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flag);
bus_dmamap_unload(ac->ac_tag, ac->ac_datamap);
}
ac->ac_flags &= ~AMR_CMD_MAPPED;
}
}
static void
amr_abort_load(struct amr_command *ac)
{
ac_qhead_t head;
struct amr_softc *sc = ac->ac_sc;
KKASSERT(lockowned(&sc->amr_list_lock));
ac->ac_status = AMR_STATUS_ABORTED;
amr_init_qhead(&head);
amr_enqueue_completed(ac, &head);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
amr_complete(sc, &head);
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
}
static int
amr_start(struct amr_command *ac)
{
struct amr_softc *sc;
int error = 0;
int slot;
debug_called(3);
sc = ac->ac_sc;
ac->ac_flags |= AMR_CMD_BUSY;
slot = ac->ac_slot;
if (sc->amr_busycmd[slot] != NULL)
panic("amr: slot %d busy?", slot);
sc->amr_busycmd[slot] = ac;
atomic_add_int(&sc->amr_busyslots, 1);
if ((error = amr_mapcmd(ac)) == ENOMEM) {
amr_freeslot(ac);
}
return (error);
}
int
amr_done(struct amr_softc *sc)
{
ac_qhead_t head;
struct amr_command *ac;
struct amr_mailbox mbox;
int i, idx, result;
debug_called(3);
result = 0;
amr_init_qhead(&head);
for (;;) {
if (sc->amr_get_work(sc, &mbox)) {
result = 1;
for (i = 0; i < mbox.mb_nstatus; i++) {
idx = mbox.mb_completed[i] - 1;
ac = sc->amr_busycmd[idx];
if (ac != NULL) {
amr_freeslot(ac);
ac->ac_status = mbox.mb_status;
amr_enqueue_completed(ac, &head);
debug(3, "completed command with status %x", mbox.mb_status);
} else {
device_printf(sc->amr_dev, "bad slot %d completed\n", idx);
}
}
} else
break;
}
amr_complete(sc, &head);
return(result);
}
static void
amr_complete(void *context, ac_qhead_t *head)
{
struct amr_softc *sc = (struct amr_softc *)context;
struct amr_command *ac;
debug_called(3);
for (;;) {
ac = amr_dequeue_completed(sc, head);
if (ac == NULL)
break;
amr_unmapcmd(ac);
if (ac->ac_complete != NULL) {
ac->ac_flags &= ~AMR_CMD_BUSY;
ac->ac_complete(ac);
} else {
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
ac->ac_flags &= ~AMR_CMD_BUSY;
if (ac->ac_flags & AMR_CMD_SLEEP) {
wakeup(ac);
}
lockmgr(&sc->amr_list_lock, LK_RELEASE);
}
if(!sc->amr_busyslots) {
wakeup(sc);
}
}
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
sc->amr_state &= ~AMR_STATE_QUEUE_FRZN;
amr_startio(sc);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
}
struct amr_command *
amr_alloccmd(struct amr_softc *sc)
{
struct amr_command *ac;
debug_called(3);
ac = amr_dequeue_free(sc);
if (ac == NULL) {
sc->amr_state |= AMR_STATE_QUEUE_FRZN;
return(NULL);
}
ac->ac_status = 0;
bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox));
ac->ac_flags = 0;
ac->ac_bio = NULL;
ac->ac_data = NULL;
ac->ac_complete = NULL;
ac->ac_retries = 0;
ac->ac_tag = NULL;
ac->ac_datamap = NULL;
return(ac);
}
void
amr_releasecmd(struct amr_command *ac)
{
debug_called(3);
amr_enqueue_free(ac);
}
static void
amr_alloccmd_cluster(struct amr_softc *sc)
{
struct amr_command_cluster *acc;
struct amr_command *ac;
int i, nextslot;
if (sc->amr_maxio == 0)
sc->amr_maxio = 2;
if (sc->amr_nextslot > sc->amr_maxio)
return;
acc = kmalloc(AMR_CMD_CLUSTERSIZE, M_AMR, M_NOWAIT | M_ZERO);
if (acc != NULL) {
nextslot = sc->amr_nextslot;
lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE);
TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link);
lockmgr(&sc->amr_list_lock, LK_RELEASE);
for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
ac = &acc->acc_command[i];
ac->ac_sc = sc;
ac->ac_slot = nextslot;
if (AMR_IS_SG64(sc)) {
ac->ac_sgbusaddr = sc->amr_sgbusaddr +
(ac->ac_slot * AMR_NSEG * sizeof(struct amr_sg64entry));
ac->ac_sg.sg64 = sc->amr_sg64table + (ac->ac_slot * AMR_NSEG);
} else {
ac->ac_sgbusaddr = sc->amr_sgbusaddr +
(ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
ac->ac_sg.sg32 = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
}
ac->ac_ccb = sc->amr_ccb + ac->ac_slot;
ac->ac_ccb_busaddr = sc->amr_ccb_busaddr +
(ac->ac_slot * sizeof(union amr_ccb));
if (bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap))
break;
if (AMR_IS_SG64(sc) &&
(bus_dmamap_create(sc->amr_buffer64_dmat, 0,&ac->ac_dma64map)))
break;
amr_releasecmd(ac);
if (++nextslot > sc->amr_maxio)
break;
}
sc->amr_nextslot = nextslot;
}
}
static void
amr_freecmd_cluster(struct amr_command_cluster *acc)
{
struct amr_softc *sc = acc->acc_command[0].ac_sc;
int i;
for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
if (acc->acc_command[i].ac_sc == NULL)
break;
bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap);
if (AMR_IS_SG64(sc))
bus_dmamap_destroy(sc->amr_buffer64_dmat, acc->acc_command[i].ac_dma64map);
}
kfree(acc, M_AMR);
}
static int
amr_quartz_submit_command(struct amr_command *ac)
{
struct amr_softc *sc = ac->ac_sc;
static struct timeval lastfail;
static int curfail;
int i = 0;
lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE);
while (sc->amr_mailbox->mb_busy && (i++ < 10)) {
DELAY(1);
AMR_QGET_ODB(sc);
}
if (sc->amr_mailbox->mb_busy) {
lockmgr(&sc->amr_hw_lock, LK_RELEASE);
if (ac->ac_retries++ > 1000) {
if (ppsratecheck(&lastfail, &curfail, 1))
device_printf(sc->amr_dev, "Too many retries on command %p. "
"Controller is likely dead\n", ac);
ac->ac_retries = 0;
}
return (EBUSY);
}
ac->ac_mailbox.mb_ident = ac->ac_slot + 1;
bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14);
sc->amr_mailbox->mb_busy = 1;
sc->amr_mailbox->mb_poll = 0;
sc->amr_mailbox->mb_ack = 0;
sc->amr_mailbox64->sg64_hi = ac->ac_sg64_hi;
sc->amr_mailbox64->sg64_lo = ac->ac_sg64_lo;
AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
lockmgr(&sc->amr_hw_lock, LK_RELEASE);
return(0);
}
static int
amr_std_submit_command(struct amr_command *ac)
{
struct amr_softc *sc = ac->ac_sc;
static struct timeval lastfail;
static int curfail;
lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE);
if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG) {
lockmgr(&sc->amr_hw_lock, LK_RELEASE);
if (ac->ac_retries++ > 1000) {
if (ppsratecheck(&lastfail, &curfail, 1))
device_printf(sc->amr_dev, "Too many retries on command %p. "
"Controller is likely dead\n", ac);
ac->ac_retries = 0;
}
return (EBUSY);
}
ac->ac_mailbox.mb_ident = ac->ac_slot + 1;
bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14);
sc->amr_mailbox->mb_busy = 1;
sc->amr_mailbox->mb_poll = 0;
sc->amr_mailbox->mb_ack = 0;
AMR_SPOST_COMMAND(sc);
lockmgr(&sc->amr_hw_lock, LK_RELEASE);
return(0);
}
static int
amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
{
int worked, i;
u_int32_t outd;
u_int8_t nstatus;
u_int8_t completed[46];
debug_called(3);
worked = 0;
if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) {
AMR_QPUT_ODB(sc, AMR_QODB_READY);
while ((nstatus = sc->amr_mailbox->mb_nstatus) == 0xff)
DELAY(1);
sc->amr_mailbox->mb_nstatus = 0xff;
for (i = 0; i < nstatus; i++) {
while ((completed[i] = sc->amr_mailbox->mb_completed[i]) == 0xff)
DELAY(1);
sc->amr_mailbox->mb_completed[i] = 0xff;
}
mbsave->mb_nstatus = nstatus;
mbsave->mb_status = sc->amr_mailbox->mb_status;
sc->amr_mailbox->mb_status = 0xff;
for (i = 0; i < nstatus; i++)
mbsave->mb_completed[i] = completed[i];
AMR_QPUT_IDB(sc, AMR_QIDB_ACK);
#if 0
#ifndef AMR_QUARTZ_GOFASTER
while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
;
#endif
#endif
worked = 1;
}
return(worked);
}
static int
amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
{
int worked;
u_int8_t istat;
debug_called(3);
worked = 0;
istat = AMR_SGET_ISTAT(sc);
if ((istat & AMR_SINTR_VALID) != 0) {
AMR_SPUT_ISTAT(sc, istat);
bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
AMR_SACK_INTERRUPT(sc);
worked = 1;
}
return(worked);
}
static void
amr_std_attach_mailbox(struct amr_softc *sc)
{
AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff);
AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff);
AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff);
AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff);
AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR);
AMR_SACK_INTERRUPT(sc);
AMR_SENABLE_INTR(sc);
}
#ifdef AMR_BOARD_INIT
static int
amr_quartz_init(struct amr_softc *sc)
{
int status, ostatus;
device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc));
AMR_QRESET(sc);
ostatus = 0xff;
while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) {
if (status != ostatus) {
device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status));
ostatus = status;
}
switch (status) {
case AMR_QINIT_NOMEM:
return(ENOMEM);
case AMR_QINIT_SCAN:
break;
}
}
return(0);
}
static int
amr_std_init(struct amr_softc *sc)
{
int status, ostatus;
device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc));
AMR_SRESET(sc);
ostatus = 0xff;
while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) {
if (status != ostatus) {
device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status));
ostatus = status;
}
switch (status) {
case AMR_SINIT_NOMEM:
return(ENOMEM);
case AMR_SINIT_INPROG:
break;
}
}
return(0);
}
#endif
static void
amr_describe_controller(struct amr_softc *sc)
{
struct amr_prodinfo *ap;
struct amr_enquiry *ae;
char *prod;
int status;
if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) != NULL) {
device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n",
ap->ap_product, ap->ap_firmware, ap->ap_bios,
ap->ap_memsize);
kfree(ap, M_AMR);
return;
}
if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) != NULL) {
prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature);
} else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) != NULL) {
switch (pci_get_device(sc->amr_dev)) {
case 0x9010:
prod = "Series 428";
break;
case 0x9060:
prod = "Series 434";
break;
default:
prod = "unknown controller";
break;
}
} else {
device_printf(sc->amr_dev, "<unsupported controller>\n");
return;
}
if(ae->ae_adapter.aa_firmware[2] >= 'A' &&
ae->ae_adapter.aa_firmware[2] <= 'Z' &&
ae->ae_adapter.aa_firmware[1] < ' ' &&
ae->ae_adapter.aa_firmware[0] < ' ' &&
ae->ae_adapter.aa_bios[2] >= 'A' &&
ae->ae_adapter.aa_bios[2] <= 'Z' &&
ae->ae_adapter.aa_bios[1] < ' ' &&
ae->ae_adapter.aa_bios[0] < ' ') {
if(ae->ae_signature == AMR_SIG_438) {
prod = "HP NetRaid 3si";
}
device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n",
prod, ae->ae_adapter.aa_firmware[2],
ae->ae_adapter.aa_firmware[1],
ae->ae_adapter.aa_firmware[0],
ae->ae_adapter.aa_bios[2],
ae->ae_adapter.aa_bios[1],
ae->ae_adapter.aa_bios[0],
ae->ae_adapter.aa_memorysize);
} else {
device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n",
prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios,
ae->ae_adapter.aa_memorysize);
}
kfree(ae, M_AMR);
}
int
amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks)
{
struct amr_command *ac;
int error = EIO;
debug_called(1);
sc->amr_state |= AMR_STATE_INTEN;
if ((ac = amr_alloccmd(sc)) == NULL)
goto out;
ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
ac->ac_data = data;
ac->ac_length = blks * AMR_BLKSIZE;
ac->ac_mailbox.mb_command = AMR_CMD_LWRITE;
ac->ac_mailbox.mb_blkcount = blks;
ac->ac_mailbox.mb_lba = lba;
ac->ac_mailbox.mb_drive = unit;
if (sc->amr_poll_command(ac))
goto out;
error = ac->ac_status;
out:
if (ac != NULL)
amr_releasecmd(ac);
sc->amr_state &= ~AMR_STATE_INTEN;
return (error);
}
#ifdef AMR_DEBUG
#if 0
static void
amr_printcommand(struct amr_command *ac)
{
struct amr_softc *sc = ac->ac_sc;
struct amr_sgentry *sg;
int i;
device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n",
ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive);
device_printf(sc->amr_dev, "blkcount %d lba %d\n",
ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba);
device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length);
device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n",
ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem);
device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio);
sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++)
device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count);
}
#endif
#endif