Symbol: dc_status
sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3310
enum dc_status dc_result = DC_OK;
sys/dev/drm/amd/display/dc/core/dc.c
1039
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/core/dc.c
928
static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *context)
sys/dev/drm/amd/display/dc/core/dc.c
931
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/core/dc_link.c
1364
static enum dc_status enable_link_dp(
sys/dev/drm/amd/display/dc/core/dc_link.c
1369
enum dc_status status;
sys/dev/drm/amd/display/dc/core/dc_link.c
1433
static enum dc_status enable_link_edp(
sys/dev/drm/amd/display/dc/core/dc_link.c
1437
enum dc_status status;
sys/dev/drm/amd/display/dc/core/dc_link.c
1450
static enum dc_status enable_link_dp_mst(
sys/dev/drm/amd/display/dc/core/dc_link.c
1996
static enum dc_status enable_link(
sys/dev/drm/amd/display/dc/core/dc_link.c
2000
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/core/dc_link.c
2131
enum dc_status dc_link_validate_mode_timing(
sys/dev/drm/amd/display/dc/core/dc_link.c
2374
static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
sys/dev/drm/amd/display/dc/core/dc_link.c
2454
static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
sys/dev/drm/amd/display/dc/core/dc_link.c
2538
enum dc_status status;
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
1581
enum dc_status dpcd_result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
1645
static enum dc_status read_hpd_rx_irq_data(
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
1649
static enum dc_status retval;
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
2016
enum dc_status result;
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
2123
enum dc_status st = DC_OK;
sys/dev/drm/amd/display/dc/core/dc_link_dp.c
2342
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/core/dc_link_hwss.c
108
enum dc_status result = DC_OK;
sys/dev/drm/amd/display/dc/core/dc_link_hwss.c
129
enum dc_status result = DC_OK;
sys/dev/drm/amd/display/dc/core/dc_link_hwss.c
16
enum dc_status core_link_read_dpcd(
sys/dev/drm/amd/display/dc/core/dc_link_hwss.c
30
enum dc_status core_link_write_dpcd(
sys/dev/drm/amd/display/dc/core/dc_resource.c
1195
enum dc_status resource_build_scaling_params_for_context(
sys/dev/drm/amd/display/dc/core/dc_resource.c
1820
enum dc_status dc_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/core/dc_resource.c
1826
enum dc_status res;
sys/dev/drm/amd/display/dc/core/dc_resource.c
1844
enum dc_status dc_remove_stream_from_ctx(
sys/dev/drm/amd/display/dc/core/dc_resource.c
1983
enum dc_status resource_map_pool_resources(
sys/dev/drm/amd/display/dc/core/dc_resource.c
2079
enum dc_status dc_validate_global_state(
sys/dev/drm/amd/display/dc/core/dc_resource.c
2083
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/core/dc_resource.c
2654
enum dc_status resource_map_clock_resources(
sys/dev/drm/amd/display/dc/core/dc_resource.c
2864
enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream)
sys/dev/drm/amd/display/dc/core/dc_resource.c
2869
enum dc_status res = DC_OK;
sys/dev/drm/amd/display/dc/core/dc_resource.c
2891
enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
sys/dev/drm/amd/display/dc/core/dc_resource.c
2893
enum dc_status res = DC_OK;
sys/dev/drm/amd/display/dc/dc.h
603
enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
sys/dev/drm/amd/display/dc/dc.h
607
enum dc_status dc_validate_global_state(
sys/dev/drm/amd/display/dc/dc_stream.h
190
enum dc_status dc_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/dc_stream.h
195
enum dc_status dc_remove_stream_from_ctx(
sys/dev/drm/amd/display/dc/dc_stream.h
225
enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
747
static enum dc_status build_mapped_resource(
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
810
enum dc_status dce100_validate_global(
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
820
enum dc_status dce100_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
825
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/dce100/dce100_resource.c
847
enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
sys/dev/drm/amd/display/dc/dce100/dce100_resource.h
42
enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps);
sys/dev/drm/amd/display/dc/dce100/dce100_resource.h
44
enum dc_status dce100_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1297
static enum dc_status dce110_enable_stream_timing(
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1363
static enum dc_status apply_single_controller_ctx_to_hw(
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
2010
enum dc_status dce110_apply_ctx_to_hw(
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
2015
enum dc_status status;
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
620
static enum dc_status bios_parser_crtc_source_select(
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
38
enum dc_status dce110_apply_ctx_to_hw(
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
1002
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
834
static enum dc_status build_mapped_resource(
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
931
enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state,
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
987
enum dc_status dce110_validate_global(
sys/dev/drm/amd/display/dc/dce110/dce110_resource.c
997
static enum dc_status dce110_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
794
static enum dc_status build_mapped_resource(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
882
enum dc_status resource_map_phy_clock_resources(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
935
enum dc_status dce112_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
940
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/dce112/dce112_resource.c
955
enum dc_status dce112_validate_global(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.h
38
enum dc_status dce112_validate_with_context(
sys/dev/drm/amd/display/dc/dce112/dce112_resource.h
49
enum dc_status dce112_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/dce80/dce80_resource.c
831
enum dc_status dce80_validate_global(
sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
633
static enum dc_status dcn10_enable_stream_timing(
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1030
static enum dc_status build_mapped_resource(
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1063
enum dc_status dcn10_add_stream_to_ctx(
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1068
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1131
static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1141
static enum dc_status dcn10_get_default_swizzle_mode(struct dc_plane_state *plane_state)
sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c
1143
enum dc_status result = DC_OK;
sys/dev/drm/amd/display/dc/inc/core_types.h
103
enum dc_status (*validate_global)(
sys/dev/drm/amd/display/dc/inc/core_types.h
112
enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps);
sys/dev/drm/amd/display/dc/inc/core_types.h
114
enum dc_status (*add_stream_to_ctx)(
sys/dev/drm/amd/display/dc/inc/core_types.h
119
enum dc_status (*remove_stream_from_ctx)(
sys/dev/drm/amd/display/dc/inc/core_types.h
123
enum dc_status (*get_default_swizzle_mode)(
sys/dev/drm/amd/display/dc/inc/core_types.h
70
enum dc_status dc_link_validate_mode_timing(
sys/dev/drm/amd/display/dc/inc/hw_sequencer.h
194
enum dc_status (*enable_stream_timing)(
sys/dev/drm/amd/display/dc/inc/hw_sequencer.h
75
enum dc_status (*apply_ctx_to_hw)(
sys/dev/drm/amd/display/dc/inc/link_hwss.h
31
enum dc_status core_link_read_dpcd(
sys/dev/drm/amd/display/dc/inc/link_hwss.h
37
enum dc_status core_link_write_dpcd(
sys/dev/drm/amd/display/dc/inc/resource.h
153
enum dc_status resource_map_clock_resources(
sys/dev/drm/amd/display/dc/inc/resource.h
158
enum dc_status resource_map_phy_clock_resources(
sys/dev/drm/amd/display/dc/inc/resource.h
84
enum dc_status resource_map_pool_resources(
sys/dev/drm/amd/display/dc/inc/resource.h
91
enum dc_status resource_build_scaling_params_for_context(
sys/dev/netif/dc/if_dc.c
1100
sframe->dc_status = DC_TXSTAT_OWN;
sys/dev/netif/dc/if_dc.c
1315
sframe->dc_status = DC_TXSTAT_OWN;
sys/dev/netif/dc/if_dc.c
2344
c->dc_status = DC_RXSTAT_OWN;
sys/dev/netif/dc/if_dc.c
2420
rxstat = c->dc_status;
sys/dev/netif/dc/if_dc.c
2454
cur_rx->dc_status = rxstat | DC_RXSTAT_FIRSTFRAG;
sys/dev/netif/dc/if_dc.c
2480
if (!(cur_rx->dc_status & DC_RXSTAT_OWN))
sys/dev/netif/dc/if_dc.c
2511
while(!(sc->dc_ldata->dc_rx_list[i].dc_status & DC_RXSTAT_OWN)) {
sys/dev/netif/dc/if_dc.c
2521
rxstat = cur_rx->dc_status;
sys/dev/netif/dc/if_dc.c
2534
rxstat = cur_rx->dc_status;
sys/dev/netif/dc/if_dc.c
2632
txstat = cur_tx->dc_status;
sys/dev/netif/dc/if_dc.c
3048
f->dc_status = 0;
sys/dev/netif/dc/if_dc.c
3051
f->dc_status = DC_TXSTAT_OWN;
sys/dev/netif/dc/if_dc.c
3071
sc->dc_ldata->dc_tx_list[*txidx].dc_status = DC_TXSTAT_OWN;
sys/dev/netif/dc/if_dcreg.h
391
u_int32_t dc_status;