sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

2835

static void dm_enable_per_frame_crtc_master_sync(struct dc_state *context)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3455

if (old_dm_plane_state->dc_state) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3456

dm_plane_state->dc_state = old_dm_plane_state->dc_state;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3457

dc_plane_state_retain(dm_plane_state->dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3469

if (dm_plane_state->dc_state)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3470

dc_plane_state_release(dm_plane_state->dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3539

if (dm_plane_state_new->dc_state &&

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3540

dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3541

struct dc_plane_state *plane_state = dm_plane_state_new->dc_state;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3592

if (!dm_plane_state->dc_state)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3595

if (!fill_rects_from_plane_state(state, dm_plane_state->dc_state))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3598

if (dc_validate_plane(dc, dm_plane_state->dc_state) == DC_OK)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4361

struct dc_state *state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4382

struct dc_state *state)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4493

struct dc_state *state)

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4577

struct dc_state *dc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4630

WARN_ON(!dm_new_plane_state->dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4632

plane_states_constructed[planes_count] = dm_new_plane_state->dc_state;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4654

dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4679

dc_state))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4739

struct dc_state *dc_state = NULL, *dc_state_temp = NULL;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4754

dc_state = dm_state->context;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4759

dc_state = dc_state_temp;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4760

dc_resource_state_copy_construct_current(dm->dc, dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4835

if (dc_state) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4836

dm_enable_per_frame_crtc_master_sync(dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4837

WARN_ON(!dc_commit_state(dm->dc, dc_state));

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4850

status = dc_state_get_stream_status(dc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4902

dc_state))

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

4935

amdgpu_dm_commit_planes(state, dc_state, dev,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5429

dm_old_plane_state->dc_state,

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5437

dc_plane_state_release(dm_old_plane_state->dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5438

dm_new_plane_state->dc_state = NULL;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5461

WARN_ON(dm_new_plane_state->dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5503

dm_new_plane_state->dc_state = dc_new_plane_state;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5508

dm_new_plane_state->dc_state->update_flags.bits.full_update = 1;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5571

new_dm_plane_state->dc_state->src_rect;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5573

new_dm_plane_state->dc_state->dst_rect;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5575

new_dm_plane_state->dc_state->rotation;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5577

new_dm_plane_state->dc_state->in_transfer_func;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5584

new_dm_plane_state->dc_state->gamma_correction;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

5586

new_dm_plane_state->dc_state->in_transfer_func;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

901

if (dm_new_plane_state->dc_state) {

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

902

WARN_ON(kref_read(&dm_new_plane_state->dc_state->refcount) > 1);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

903

dc_plane_state_release(dm_new_plane_state->dc_state);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

904

dm_new_plane_state->dc_state = NULL;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h

187

struct dc_plane_state *dc_state;

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.h

207

struct dc_state *context;

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

536

struct dc_state *context,

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

687

struct dc_state *context)

sys/dev/drm/amd/display/dc/calcs/dcn_calcs.c

703

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

1037

bool dc_commit_state(struct dc *dc, struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

1062

struct dc_state *context = dc->current_state;

sys/dev/drm/amd/display/dc/core/dc.c

1079

struct dc_state *dc_create_state(void)

sys/dev/drm/amd/display/dc/core/dc.c

1081

struct dc_state *context = kzalloc(sizeof(struct dc_state),

sys/dev/drm/amd/display/dc/core/dc.c

1091

void dc_retain_state(struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

1098

struct dc_state *context = container_of(kref, struct dc_state, refcount);

sys/dev/drm/amd/display/dc/core/dc.c

1103

void dc_release_state(struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

1109

const struct dc_state *context,

sys/dev/drm/amd/display/dc/core/dc.c

1243

const struct dc_state *context = dc->current_state;

sys/dev/drm/amd/display/dc/core/dc.c

1365

struct dc_state *ctx,

sys/dev/drm/amd/display/dc/core/dc.c

1383

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

1414

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

1493

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

1581

struct dc_state *state)

sys/dev/drm/amd/display/dc/core/dc.c

1585

struct dc_state *context;

sys/dev/drm/amd/display/dc/core/dc.c

1647

struct dc_state *old = dc->current_state;

sys/dev/drm/amd/display/dc/core/dc.c

1849

void get_clock_requirements_for_state(struct dc_state *state, struct AsicStateEx *info)

sys/dev/drm/amd/display/dc/core/dc.c

692

static void disable_dangling_plane(struct dc *dc, struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

695

struct dc_state *dangling_context = dc_create_state();

sys/dev/drm/amd/display/dc/core/dc.c

696

struct dc_state *current_ctx;

sys/dev/drm/amd/display/dc/core/dc.c

786

struct dc_state *ctx)

sys/dev/drm/amd/display/dc/core/dc.c

810

struct dc_state *ctx)

sys/dev/drm/amd/display/dc/core/dc.c

884

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc.c

901

struct dc_state *context,

sys/dev/drm/amd/display/dc/core/dc.c

928

static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_debug.c

349

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_link.c

1365

struct dc_state *state,

sys/dev/drm/amd/display/dc/core/dc_link.c

1434

struct dc_state *state,

sys/dev/drm/amd/display/dc/core/dc_link.c

1451

struct dc_state *state,

sys/dev/drm/amd/display/dc/core/dc_link.c

1997

struct dc_state *state,

sys/dev/drm/amd/display/dc/core/dc_link.c

2533

struct dc_state *state,

sys/dev/drm/amd/display/dc/core/dc_resource.c

1197

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1275

struct dc_state *context,

sys/dev/drm/amd/display/dc/core/dc_resource.c

1354

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1428

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1503

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1537

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1562

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1806

struct dc_state *old_context, struct dc_stream_state *stream)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1822

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/core/dc_resource.c

1846

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/core/dc_resource.c

1920

struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

1985

struct dc_state *context,

sys/dev/drm/amd/display/dc/core/dc_resource.c

2066

struct dc_state *dst_ctx)

sys/dev/drm/amd/display/dc/core/dc_resource.c

2074

struct dc_state *dst_ctx)

sys/dev/drm/amd/display/dc/core/dc_resource.c

2081

struct dc_state *new_ctx)

sys/dev/drm/amd/display/dc/core/dc_resource.c

2553

void dc_resource_state_destruct(struct dc_state *context)

sys/dev/drm/amd/display/dc/core/dc_resource.c

2573

const struct dc_state *src_ctx,

sys/dev/drm/amd/display/dc/core/dc_resource.c

2574

struct dc_state *dst_ctx)

sys/dev/drm/amd/display/dc/core/dc_resource.c

2656

struct dc_state *context,

sys/dev/drm/amd/display/dc/dc.h

156

struct dc_state;

sys/dev/drm/amd/display/dc/dc.h

275

struct dc_state;

sys/dev/drm/amd/display/dc/dc.h

289

struct dc_state *current_state;

sys/dev/drm/amd/display/dc/dc.h

605

void get_clock_requirements_for_state(struct dc_state *state, struct AsicStateEx *info);

sys/dev/drm/amd/display/dc/dc.h

609

struct dc_state *new_ctx);

sys/dev/drm/amd/display/dc/dc.h

614

struct dc_state *dst_ctx);

sys/dev/drm/amd/display/dc/dc.h

617

const struct dc_state *src_ctx,

sys/dev/drm/amd/display/dc/dc.h

618

struct dc_state *dst_ctx);

sys/dev/drm/amd/display/dc/dc.h

622

struct dc_state *dst_ctx);

sys/dev/drm/amd/display/dc/dc.h

624

void dc_resource_state_destruct(struct dc_state *context);

sys/dev/drm/amd/display/dc/dc.h

635

bool dc_commit_state(struct dc *dc, struct dc_state *context);

sys/dev/drm/amd/display/dc/dc.h

638

struct dc_state *dc_create_state(void);

sys/dev/drm/amd/display/dc/dc.h

639

void dc_retain_state(struct dc_state *context);

sys/dev/drm/amd/display/dc/dc.h

640

void dc_release_state(struct dc_state *context);

sys/dev/drm/amd/display/dc/dc_stream.h

166

struct dc_state *state);

sys/dev/drm/amd/display/dc/dc_stream.h

192

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dc_stream.h

197

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dc_stream.h

205

struct dc_state *context);

sys/dev/drm/amd/display/dc/dc_stream.h

211

struct dc_state *context);

sys/dev/drm/amd/display/dc/dc_stream.h

216

struct dc_state *context);

sys/dev/drm/amd/display/dc/dc_stream.h

223

struct dc_state *context);

sys/dev/drm/amd/display/dc/dc_stream.h

241

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce/dce_clocks.c

690

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c

110

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c

133

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c

157

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.h

32

struct dc_state;

sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.h

38

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

749

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

767

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

790

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

812

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

822

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dce100/dce100_resource.h

46

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1141

struct dc_state *state,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1299

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1365

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1533

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1563

void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1631

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1774

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1801

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1853

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1878

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

1931

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2012

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2410

const struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2462

uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2514

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2570

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2725

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

2872

static void ready_shared_resources(struct dc *dc, struct dc_state *context) {}

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.h

33

struct dc_state;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.h

40

struct dc_state *context);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.h

59

void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.h

68

const struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.h

71

uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

1017

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

836

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

859

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

942

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

989

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

999

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

796

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

813

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

884

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

916

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

937

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

957

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce112/dce112_resource.h

42

struct dc_state *context,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.h

43

struct dc_state *old_context);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.h

47

struct dc_state *context);

sys/dev/drm/amd/display/dc/dce112/dce112_resource.h

51

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

801

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

811

struct dc_state *context)

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

833

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1137

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

1626

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2046

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2220

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2247

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2276

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2306

static void ready_shared_resources(struct dc *dc, struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2316

struct dc_state *context,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2342

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

2417

struct dc_state *context,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

635

struct dc_state *context,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

737

struct dc_state *context)

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

983

struct dc_state *context = dc->current_state;

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h

35

const struct dc_state *context,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h

47

struct dc_state *context);

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1032

struct dc_state *context,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1065

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/dcn10/dcn10_resource.c

1083

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/core_types.h

101

struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/core_types.h

105

struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/core_types.h

108

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/core_types.h

116

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/inc/core_types.h

121

struct dc_state *new_ctx,

sys/dev/drm/amd/display/dc/inc/core_types.h

78

struct dc_state *state,

sys/dev/drm/amd/display/dc/inc/core_types.h

90

struct dc_state;

sys/dev/drm/amd/display/dc/inc/dce_calcs.h

37

struct dc_state;

sys/dev/drm/amd/display/dc/inc/dcn_calcs.h

38

struct dc_state;

sys/dev/drm/amd/display/dc/inc/dcn_calcs.h

624

struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/hw/display_clock.h

59

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

130

void (*enable_accelerated_mode)(struct dc *dc, struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

182

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

196

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

213

void (*ready_shared_resources)(struct dc *dc, struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

217

struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

64

struct dc_state;

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

76

struct dc *dc, struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

79

struct dc *dc, struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/hw_sequencer.h

85

struct dc_state *context);

sys/dev/drm/amd/display/dc/inc/resource.h

132

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/resource.h

140

struct dc_state *old_context, struct dc_stream_state *stream);

sys/dev/drm/amd/display/dc/inc/resource.h

145

const struct dc_state *old_context,

sys/dev/drm/amd/display/dc/inc/resource.h

146

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/resource.h

150

const struct dc_state *src_ctx,

sys/dev/drm/amd/display/dc/inc/resource.h

151

struct dc_state *dst_ctx);

sys/dev/drm/amd/display/dc/inc/resource.h

155

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/resource.h

160

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/resource.h

86

struct dc_state *context,

sys/dev/drm/amd/display/dc/inc/resource.h

93

struct dc_state *context);

sys/dev/drm/amd/display/include/logger_interface.h

35

struct dc_state;

sys/dev/drm/amd/display/include/logger_interface.h

63

struct dc_state *context);

sys/dev/drm/i915/i915_drv.h

474

uint32_t dc_state;

sys/dev/drm/i915/intel_csr.c

274

dev_priv->csr.dc_state = 0;

sys/dev/drm/i915/intel_runtime_pm.c

569

dev_priv->csr.dc_state, val);

sys/dev/drm/i915/intel_runtime_pm.c

570

dev_priv->csr.dc_state = val;

sys/dev/drm/i915/intel_runtime_pm.c

610

if ((val & mask) != dev_priv->csr.dc_state)

sys/dev/drm/i915/intel_runtime_pm.c

612

dev_priv->csr.dc_state, val & mask);

sys/dev/drm/i915/intel_runtime_pm.c

619

dev_priv->csr.dc_state = val & mask;