root/sys/arch/riscv64/riscv64/support.S
/*      $OpenBSD: support.S,v 1.3 2022/03/22 06:51:12 miod Exp $        */

/*-
 * Copyright (c) 2015-2020 Ruslan Bukin <br@bsdpad.com>
 * All rights reserved.
 *
 * Portions of this software were developed by SRI International and the
 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
 *
 * Portions of this software were developed by the University of Cambridge
 * Computer Laboratory as part of the CTSRD Project, with support from the
 * UK Higher Education Innovation Fund (HEIF).
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#include "assym.h"
#include <machine/asm.h>
#include <machine/setjmp.h>

ENTRY(setjmp)
        /* Store the stack pointer */
        sd      sp, 0(a0)
        addi    a0, a0, 8

        /* Store the general purpose registers and ra */
        sd      s0, (0 * 8)(a0)
        sd      s1, (1 * 8)(a0)
        sd      s2, (2 * 8)(a0)
        sd      s3, (3 * 8)(a0)
        sd      s4, (4 * 8)(a0)
        sd      s5, (5 * 8)(a0)
        sd      s6, (6 * 8)(a0)
        sd      s7, (7 * 8)(a0)
        sd      s8, (8 * 8)(a0)
        sd      s9, (9 * 8)(a0)
        sd      s10, (10 * 8)(a0)
        sd      s11, (11 * 8)(a0)
        sd      ra, (12 * 8)(a0)

        /* Return zero */
        li      a0, 0
        ret
END(setjmp)

ENTRY(longjmp)
        /* Restore the stack pointer */
        ld      sp, 0(a0)
        addi    a0, a0, 8

        /* Restore the general purpose registers and ra */
        ld      s0, (0 * 8)(a0)
        ld      s1, (1 * 8)(a0)
        ld      s2, (2 * 8)(a0)
        ld      s3, (3 * 8)(a0)
        ld      s4, (4 * 8)(a0)
        ld      s5, (5 * 8)(a0)
        ld      s6, (6 * 8)(a0)
        ld      s7, (7 * 8)(a0)
        ld      s8, (8 * 8)(a0)
        ld      s9, (9 * 8)(a0)
        ld      s10, (10 * 8)(a0)
        ld      s11, (11 * 8)(a0)
        ld      ra, (12 * 8)(a0)

        /* Return nonzero */
        li      a0, 1
        ret
END(longjmp)