#ifndef _MACHINE_CPU_H_
#define _MACHINE_CPU_H_
#ifndef NO_IEEE
typedef union alpha_s_float {
u_int32_t i;
u_int32_t frac: 23,
exp: 8,
sign: 1;
} s_float;
typedef union alpha_t_float {
u_int64_t i;
u_int64_t frac: 52,
exp: 11,
sign: 1;
} t_float;
#endif
#ifdef _KERNEL
#include <machine/alpha_cpu.h>
#include <machine/frame.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <sys/cdefs.h>
#include <sys/clockintr.h>
#include <sys/device.h>
#include <sys/sched.h>
#include <sys/srp.h>
#include <uvm/uvm_percpu.h>
struct pcb;
struct proc;
struct reg;
struct rpb;
struct trapframe;
extern u_long cpu_implver;
extern u_long cpu_amask;
extern int bootdev_debug;
extern int alpha_fp_sync_complete;
void XentArith(u_int64_t, u_int64_t, u_int64_t);
void XentIF(u_int64_t, u_int64_t, u_int64_t);
void XentInt(u_int64_t, u_int64_t, u_int64_t);
void XentMM(u_int64_t, u_int64_t, u_int64_t);
void XentRestart(void);
void XentSys(u_int64_t, u_int64_t, u_int64_t);
void XentUna(u_int64_t, u_int64_t, u_int64_t);
void alpha_init(u_long, u_long, u_long, u_long, u_long);
int alpha_pa_access(u_long);
void ast(struct trapframe *);
int badaddr(void *, size_t);
int badaddr_read(void *, size_t, void *);
u_int64_t console_restart(struct trapframe *);
void do_sir(void);
void dumpconf(void);
void exception_return(void);
void frametoreg(struct trapframe *, struct reg *);
long fswintrberr(void);
void init_bootstrap_console(void);
void init_prom_interface(struct rpb *);
void interrupt(unsigned long, unsigned long, unsigned long,
struct trapframe *);
void machine_check(unsigned long, struct trapframe *, unsigned long,
unsigned long);
u_int64_t hwrpb_checksum(void);
void hwrpb_restart_setup(void);
void proc_trampoline(void);
void regdump(struct trapframe *);
void regtoframe(struct reg *, struct trapframe *);
void savectx(struct pcb *);
void syscall(u_int64_t, struct trapframe *);
void trap(unsigned long, unsigned long, unsigned long, unsigned long,
struct trapframe *);
void trap_init(void);
void enable_nsio_ide(bus_space_tag_t);
struct cpu_info;
int cpu_iccb_send(cpuid_t, const char *);
void cpu_iccb_receive(void);
void cpu_hatch(struct cpu_info *);
__dead
void cpu_halt(void);
void cpu_halt_secondary(unsigned long);
void cpu_spinup_trampoline(void);
void cpu_pause(unsigned long);
void cpu_resume(unsigned long);
struct mchkinfo {
volatile int mc_expected;
volatile int mc_received;
};
struct cpu_info {
struct proc *ci_curproc;
paddr_t ci_curpcb;
struct schedstate_percpu ci_schedstate;
#ifdef DIAGNOSTIC
int ci_mutex_level;
#endif
cpuid_t ci_cpuid;
struct cpu_info *ci_next;
u_int32_t ci_randseed;
#if defined(MULTIPROCESSOR)
struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM];
#define __HAVE_UVM_PERCPU
struct uvm_pmr_cache ci_uvm;
#endif
struct mchkinfo ci_mcinfo;
struct proc *ci_fpcurproc;
struct pcb *ci_idle_pcb;
paddr_t ci_idle_pcb_paddr;
struct device *ci_dev;
u_long ci_want_resched;
u_long ci_idepth;
struct trapframe *ci_db_regs;
volatile u_long ci_flags;
#if defined(MULTIPROCESSOR)
volatile u_long ci_ipis;
#endif
#ifdef GPROF
struct gmonparam *ci_gmon;
struct clockintr ci_gmonclock;
#endif
struct clockqueue ci_queue;
char ci_panicbuf[512];
};
#define CPUF_PRIMARY 0x01
#define CPUF_RUNNING 0x02
#define CPUF_PAUSED 0x04
#define CPUF_FPUSAVE 0x08
void fpusave_cpu(struct cpu_info *, int);
void fpusave_proc(struct proc *, int);
extern struct cpu_info cpu_info_primary;
extern struct cpu_info *cpu_info_list;
#define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
#define CPU_INFO_ITERATOR int
#define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \
ci != NULL; ci = ci->ci_next)
#define MAXCPUS ALPHA_MAXPROCS
#if defined(MULTIPROCESSOR)
extern volatile u_long cpus_running;
extern volatile u_long cpus_paused;
extern struct cpu_info *cpu_info[];
#define curcpu() ((struct cpu_info *)alpha_pal_rdval())
#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
#define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING)
void cpu_boot_secondary_processors(void);
void cpu_pause_resume(unsigned long, int);
void cpu_pause_resume_all(int);
void cpu_unidle(struct cpu_info *);
#define CPU_BUSY_CYCLE() \
do { \
struct cpu_info *__ci = curcpu(); \
int __s; \
\
__asm volatile ("" ::: "memory"); \
\
if (__ci->ci_ipis != 0) { \
__s = splipi(); \
\
if (__s != ALPHA_PSL_IPL_MASK) \
alpha_ipi_process_with_frame(__ci); \
splx(__s); \
} \
} while (0)
#else
#define curcpu() (&cpu_info_primary)
#define CPU_IS_PRIMARY(ci) 1
#define CPU_IS_RUNNING(ci) 1
#define cpu_unidle(ci) do { } while (0)
#define CPU_BUSY_CYCLE() __asm volatile ("" ::: "memory")
#endif
#define curproc curcpu()->ci_curproc
#define fpcurproc curcpu()->ci_fpcurproc
#define curpcb curcpu()->ci_curpcb
#define cpu_number() alpha_pal_whami()
static inline unsigned int
cpu_rnd_messybits(void)
{
return alpha_rpcc();
}
struct clockframe {
struct trapframe cf_tf;
};
#define CLKF_USERMODE(framep) \
(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
#define CLKF_PC(framep) ((framep)->cf_tf.tf_regs[FRAME_PC])
#define CLKF_INTR(framep) (curcpu()->ci_idepth)
#define PROC_PC(p) ((p)->p_md.md_tf->tf_regs[FRAME_PC])
#define PROC_STACK(p) ((p)->p_md.md_tf->tf_regs[FRAME_SP])
#define need_resched(ci) \
do { \
(ci)->ci_want_resched = 1; \
if ((ci)->ci_curproc != NULL) \
aston((ci)->ci_curproc); \
} while (0)
#define clear_resched(ci) (ci)->ci_want_resched = 0
#define need_proftick(p) aston(p)
#ifdef MULTIPROCESSOR
#define signotify(p) do { aston(p); cpu_unidle((p)->p_cpu); } while (0)
#else
#define signotify(p) aston(p)
#endif
#define aston(p) ((p)->p_md.md_astpending = 1)
#endif
#define CPU_CONSDEV 1
#define CPU_BOOTED_KERNEL 6
#define CPU_FP_SYNC_COMPLETE 7
#define CPU_CHIPSET 8
#define CPU_ALLOWAPERTURE 9
#define CPU_LED_BLINK 10
#define CPU_MAXID 11
#define CPU_CHIPSET_MEM 1
#define CPU_CHIPSET_BWX 2
#define CPU_CHIPSET_TYPE 3
#define CPU_CHIPSET_DENSE 4
#define CPU_CHIPSET_PORTS 5
#define CPU_CHIPSET_HAE_MASK 6
#define CPU_CHIPSET_MAXID 7
#define CTL_MACHDEP_NAMES { \
{ 0, 0 }, \
{ "console_device", CTLTYPE_STRUCT }, \
{ 0, 0 }, \
{ 0, 0 }, \
{ 0, 0 }, \
{ 0, 0 }, \
{ "booted_kernel", CTLTYPE_STRING }, \
{ "fp_sync_complete", CTLTYPE_INT }, \
{ "chipset", CTLTYPE_NODE }, \
{ "allowaperture", CTLTYPE_INT }, \
{ "led_blink", CTLTYPE_INT } \
}
#define CTL_CHIPSET_NAMES { \
{ 0, 0 }, \
{ "memory", CTLTYPE_QUAD }, \
{ "bwx", CTLTYPE_INT }, \
{ "type", CTLTYPE_STRING }, \
{ "dense_base", CTLTYPE_QUAD }, \
{ "ports_base", CTLTYPE_QUAD }, \
{ "hae_mask", CTLTYPE_QUAD }, \
}
#ifdef _KERNEL
struct pcb;
struct proc;
struct reg;
struct rpb;
struct trapframe;
#ifndef NO_IEEE
void alpha_sts(int, s_float *);
void alpha_stt(int, t_float *);
void alpha_lds(int, s_float *);
void alpha_ldt(int, t_float *);
uint64_t alpha_read_fpcr(void);
void alpha_write_fpcr(u_int64_t);
u_int64_t alpha_read_fp_c(struct proc *);
void alpha_write_fp_c(struct proc *, u_int64_t);
int alpha_fp_complete(u_long, u_long, struct proc *, u_int64_t *);
int alpha_fp_complete_at(u_long, struct proc *, u_int64_t *);
#endif
void alpha_enable_fp(struct proc *, int);
#ifdef MULTIPROCESSOR
#include <sys/mplock.h>
#endif
static inline u_long
intr_disable(void)
{
return (u_long)alpha_pal_swpipl(ALPHA_PSL_IPL_MASK);
}
static inline void
intr_restore(u_long s)
{
(void)alpha_pal_swpipl(s);
}
#define copyinsn(p, v, ip) copyin32((v), (ip))
#endif
#endif