#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/autoconf.h>
#include <machine/rpb.h>
#include <machine/pte.h>
#include <alpha/mcbus/mcbusreg.h>
#include <alpha/mcbus/mcbusvar.h>
#include <alpha/pci/mcpciareg.h>
#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
#define MCPCIA_EXISTS(mid, gid) \
(!badaddr((void *)KV(MCPCIA_BRIDGE_ADDR(gid, mid)), sizeof (u_int32_t)))
struct mcbus_cpu_busdep mcbus_primary;
int mcbusmatch (struct device *, void *, void *);
void mcbusattach (struct device *, struct device *, void *);
int mcbusprint (void *, const char *);
int mcbussbm (struct device *, void *, void *);
const char *mcbus_node_type_str (u_int8_t);
typedef struct {
struct device mcbus_dev;
u_int8_t mcbus_types[MCBUS_MID_MAX];
} mcbus_softc_t;
const struct cfattach mcbus_ca = {
sizeof(mcbus_softc_t), mcbusmatch, mcbusattach
};
struct cfdriver mcbus_cd = {
NULL, "mcbus", DV_DULL,
};
const int mcbus_mcpcia_probe_order[] = { 5, 4, 7, 6 };
extern void mcpcia_config_cleanup (void);
int
mcbusprint(void *aux, const char *cp)
{
struct mcbus_dev_attach_args *tap = aux;
printf(" mid %d: %s", tap->ma_mid,
mcbus_node_type_str(tap->ma_type));
return (UNCONF);
}
int
mcbussbm(struct device *parent, void *cf, void *aux)
{
struct mcbus_dev_attach_args *tap = aux;
struct cfdata *mcf = (struct cfdata *)cf;
if (mcf->cf_loc[MCBUSCF_MID] != MCBUSCF_MID_DEFAULT &&
mcf->cf_loc[MCBUSCF_MID] != tap->ma_mid)
return (0);
return ((*mcf->cf_attach->ca_match)(parent, mcf, aux));
}
int
mcbusmatch(struct device *parent, void *cf, void *aux)
{
struct mainbus_attach_args *ma = aux;
if (strcmp(ma->ma_name, mcbus_cd.cd_name) != 0)
return (0);
if (cputype != ST_DEC_4100)
return (0);
return (1);
}
void
mcbusattach(struct device *parent, struct device *self, void *aux)
{
static const char *bcs[CPU_BCacheMask + 1] = {
"No", "1MB", "2MB", "4MB",
};
struct mcbus_dev_attach_args ta;
mcbus_softc_t *mbp = (mcbus_softc_t *)self;
int i, mid;
printf(": %s BCache\n", mcbus_primary.mcbus_valid ?
bcs[mcbus_primary.mcbus_bcache] : "Unknown");
mbp->mcbus_types[0] = MCBUS_TYPE_RES;
for (mid = 1; mid < MCBUS_MID_MAX; ++mid)
mbp->mcbus_types[mid] = MCBUS_TYPE_UNK;
ta.ma_name = mcbus_cd.cd_name;
ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0);
ta.ma_mid = 1;
ta.ma_type = MCBUS_TYPE_MEM;
mbp->mcbus_types[1] = MCBUS_TYPE_MEM;
(void) config_found_sm(self, &ta, mcbusprint, mcbussbm);
for (i = 0; i < MCPCIA_PER_MCBUS; i++) {
mid = mcbus_mcpcia_probe_order[i];
ta.ma_name = mcbus_cd.cd_name;
ta.ma_gid = MCBUS_GID_FROM_INSTANCE(0);
ta.ma_mid = mid;
ta.ma_type = MCBUS_TYPE_PCI;
if (MCPCIA_EXISTS(ta.ma_mid, ta.ma_gid))
(void) config_found_sm(self, &ta, mcbusprint,
mcbussbm);
}
mcpcia_config_cleanup();
}
const char *
mcbus_node_type_str(u_int8_t type)
{
switch (type) {
case MCBUS_TYPE_RES:
panic ("RESERVED TYPE IN MCBUS_NODE_TYPE_STR");
break;
case MCBUS_TYPE_UNK:
panic ("UNKNOWN TYPE IN MCBUS_NODE_TYPE_STR");
break;
case MCBUS_TYPE_MEM:
return ("Memory");
case MCBUS_TYPE_CPU:
return ("CPU");
case MCBUS_TYPE_PCI:
return ("PCI Bridge");
default:
panic("REALLY UNKNOWN (%x) TYPE IN MCBUS_NODE_TYPE_STR", type);
break;
}
}