Symbol: MII_BMCR
sys/arch/macppc/dev/if_bm.c
346
bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
sys/arch/macppc/dev/if_bm.c
348
bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
sys/dev/fdt/mvsw.c
338
val = mvsw_phy_read(sc, phy, MII_BMCR);
sys/dev/fdt/mvsw.c
340
mvsw_phy_write(sc, phy, MII_BMCR, val);
sys/dev/fdt/mvsw.c
68
#define MVSW_SERDES_BMCR (0x2000 + MII_BMCR)
sys/dev/ic/dc.c
697
case MII_BMCR:
sys/dev/ic/dc.c
773
case MII_BMCR:
sys/dev/ic/gem.c
1423
case MII_BMCR:
sys/dev/ic/gem.c
1465
case MII_BMCR:
sys/dev/ic/re.c
443
case MII_BMCR:
sys/dev/ic/re.c
507
case MII_BMCR:
sys/dev/ic/rtl81x9.c
1255
case MII_BMCR:
sys/dev/ic/rtl81x9.c
1301
case MII_BMCR:
sys/dev/mii/acphy.c
161
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/acphy.c
162
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/acphy.c
215
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/amphy.c
151
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/amphy.c
152
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/amphy.c
203
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/atphy.c
167
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/atphy.c
168
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
sys/dev/mii/atphy.c
191
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/atphy.c
200
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
sys/dev/mii/atphy.c
222
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
sys/dev/mii/atphy.c
294
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/atphy.c
371
if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
sys/dev/mii/atphy.c
400
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
sys/dev/mii/bmtphy.c
148
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/bmtphy.c
149
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/bmtphy.c
200
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/brgphy.c
331
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/brgphy.c
332
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/brgphy.c
370
PHY_WRITE(sc, MII_BMCR, speed);
sys/dev/mii/brgphy.c
378
PHY_WRITE(sc, MII_BMCR,
sys/dev/mii/brgphy.c
487
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/brgphy.c
562
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/brgphy.c
604
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/brgphy.c
666
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/brgphy.c
741
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
sys/dev/mii/brgphy.c
754
PHY_WRITE(sc, MII_BMCR, BMCR_LOOP);
sys/dev/mii/brswphy.c
254
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/brswphy.c
255
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/ciphy.c
161
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ciphy.c
162
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/ciphy.c
196
PHY_WRITE(sc, MII_BMCR, speed);
sys/dev/mii/ciphy.c
203
PHY_WRITE(sc, MII_BMCR,
sys/dev/mii/ciphy.c
211
PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
sys/dev/mii/ciphy.c
260
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/etphy.c
204
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/etphy.c
205
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
sys/dev/mii/etphy.c
216
bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;
sys/dev/mii/etphy.c
217
PHY_WRITE(sc, MII_BMCR, bmcr);
sys/dev/mii/etphy.c
218
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
sys/dev/mii/etphy.c
224
bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
sys/dev/mii/etphy.c
225
PHY_WRITE(sc, MII_BMCR, bmcr);
sys/dev/mii/etphy.c
228
PHY_WRITE(sc, MII_BMCR,
sys/dev/mii/etphy.c
273
PHY_READ(sc, MII_BMCR);
sys/dev/mii/etphy.c
275
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
sys/dev/mii/etphy.c
293
PHY_READ(sc, MII_BMCR);
sys/dev/mii/etphy.c
295
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
sys/dev/mii/etphy.c
311
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/exphy.c
205
PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
sys/dev/mii/gentbi.c
185
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/gentbi.c
186
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/gentbi.c
238
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/icsphy.c
171
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/icsphy.c
172
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/icsphy.c
230
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/icsphy.c
271
PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
sys/dev/mii/inphy.c
171
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/inphy.c
172
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/inphy.c
224
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/iophy.c
166
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/iophy.c
167
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/iophy.c
219
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ipgphy.c
151
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ipgphy.c
152
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/ipgphy.c
197
PHY_WRITE(sc, MII_BMCR, speed);
sys/dev/mii/ipgphy.c
203
PHY_WRITE(sc, MII_BMCR, speed);
sys/dev/mii/ipgphy.c
280
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ipgphy.c
372
PHY_WRITE(sc, MII_BMCR, (BMCR_FDX | BMCR_AUTOEN | BMCR_STARTNEG));
sys/dev/mii/ipgphy.c
401
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ipgphy.c
403
PHY_WRITE(sc, MII_BMCR, reg);
sys/dev/mii/jmphy.c
145
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/jmphy.c
146
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
sys/dev/mii/jmphy.c
217
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/jmphy.c
275
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
sys/dev/mii/jmphy.c
279
if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
sys/dev/mii/jmphy.c
315
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/jmphy.c
327
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
sys/dev/mii/jmphy.c
351
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
sys/dev/mii/lxtphy.c
180
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/lxtphy.c
181
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/lxtphy.c
237
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/mii_physubr.c
120
PHY_WRITE(sc, MII_BMCR, bmcr);
sys/dev/mii/mii_physubr.c
176
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
sys/dev/mii/mii_physubr.c
290
PHY_WRITE(sc, MII_BMCR, reg);
sys/dev/mii/mii_physubr.c
304
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/mii_physubr.c
311
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/mii_physubr.c
87
if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
sys/dev/mii/mlphy.c
236
PHY_WRITE(other, MII_BMCR, BMCR_ISO);
sys/dev/mii/mlphy.c
252
PHY_WRITE(other, MII_BMCR, ife->ifm_data);
sys/dev/mii/mlphy.c
267
PHY_WRITE(other, MII_BMCR, BMCR_ISO);
sys/dev/mii/mlphy.c
325
PHY_WRITE(other, MII_BMCR, BMCR_ISO);
sys/dev/mii/mlphy.c
358
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/mlphy.c
360
PHY_WRITE(sc, MII_BMCR, reg);
sys/dev/mii/mlphy.c
385
PHY_WRITE(other, MII_BMCR, BMCR_ISO);
sys/dev/mii/mlphy.c
392
PHY_WRITE(&msc->ml_mii, MII_BMCR, BMCR_ISO);
sys/dev/mii/mtdphy.c
132
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/mtdphy.c
133
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/nsgphy.c
177
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/nsgphy.c
178
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/nsgphy.c
231
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/nsphy.c
167
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/nsphy.c
168
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/nsphy.c
250
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/nsphyter.c
170
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/nsphyter.c
171
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/nsphyter.c
224
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/qsphy.c
165
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/qsphy.c
166
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/qsphy.c
218
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/rdcphy.c
185
reg = PHY_READ(&sc->sc_mii, MII_BMCR);
sys/dev/mii/rdcphy.c
186
PHY_WRITE(&sc->sc_mii, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/rdcphy.c
279
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/rgephy.c
173
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/rgephy.c
174
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/rgephy.c
222
PHY_WRITE(sc, MII_BMCR, speed | BMCR_AUTOEN |
sys/dev/mii/rgephy.c
228
PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
sys/dev/mii/rgephy.c
341
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/rgephy.c
423
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
sys/dev/mii/rgephy.c
437
PHY_WRITE(sc, MII_BMCR, BMCR_PDOWN);
sys/dev/mii/rlphy.c
174
if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
sys/dev/mii/rlphy.c
189
PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
sys/dev/mii/rlphy.c
236
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/sqphy.c
168
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/sqphy.c
169
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/sqphy.c
221
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/tlphy.c
207
reg = PHY_READ(&sc->sc_mii, MII_BMCR);
sys/dev/mii/tlphy.c
208
PHY_WRITE(&sc->sc_mii, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/tlphy.c
229
PHY_WRITE(&sc->sc_mii, MII_BMCR, 0);
sys/dev/mii/tlphy.c
278
bmcr = PHY_READ(&sc->sc_mii, MII_BMCR);
sys/dev/mii/tlphy.c
324
PHY_WRITE(&sc->sc_mii, MII_BMCR, 0);
sys/dev/mii/tlphy.c
357
PHY_WRITE(&sc->sc_mii, MII_BMCR, BMCR_FDX);
sys/dev/mii/tlphy.c
361
PHY_WRITE(&sc->sc_mii, MII_BMCR, 0);
sys/dev/mii/tqphy.c
167
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/tqphy.c
168
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/tqphy.c
220
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ukphy.c
164
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ukphy.c
165
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/ukphy_subr.c
68
bmcr = PHY_READ(phy, MII_BMCR);
sys/dev/mii/urlphy.c
244
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/xmphy.c
158
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/xmphy.c
159
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/mii/xmphy.c
177
PHY_WRITE(sc, MII_BMCR, BMCR_FDX);
sys/dev/mii/xmphy.c
180
PHY_WRITE(sc, MII_BMCR, 0);
sys/dev/mii/xmphy.c
255
bmcr = PHY_READ(sc, MII_BMCR);
sys/dev/mii/xmphy.c
300
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
sys/dev/mii/ytphy.c
198
reg = PHY_READ(sc, MII_BMCR);
sys/dev/mii/ytphy.c
199
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sys/dev/pci/if_age.c
578
age_miibus_writereg(&sc->sc_dev, sc->age_phyaddr, MII_BMCR, BMCR_RESET);
sys/dev/pci/if_age.c
597
age_miibus_writereg(&sc->sc_dev, sc->age_phyaddr, MII_BMCR,
sys/dev/pci/if_alc.c
955
MII_BMCR, BMCR_ISO | BMCR_PDOWN);
sys/dev/pci/if_bnx.c
1102
if (reg >= MII_BMCR && reg <= MII_ANLPRNP)
sys/dev/pci/if_bnx.c
1184
if (reg >= MII_BMCR && reg <= MII_ANLPRNP)
sys/dev/pci/if_cas.c
1557
case MII_BMCR:
sys/dev/pci/if_cas.c
1599
case MII_BMCR:
sys/dev/pci/if_jme.c
1025
jme_miibus_writereg(&sc->sc_dev, sc->jme_phyaddr, MII_BMCR,
sys/dev/pci/if_jme.c
1070
MII_BMCR, BMCR_PDOWN);
sys/dev/pci/if_jme.c
1098
MII_BMCR, BMCR_PDOWN);
sys/dev/pci/if_rge.c
1050
rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |
sys/dev/pci/if_rge.c
1646
rge_write_phy(sc, 0, MII_BMCR, BMCR_AUTOEN);
sys/dev/pci/if_rge.c
1654
rge_write_phy(sc, 0, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN);
sys/dev/pci/if_rge.c
1989
rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |
sys/dev/pci/if_rge.c
1992
if (!(rge_read_phy(sc, 0, MII_BMCR) & BMCR_RESET))
sys/dev/pci/if_sk.c
1977
SK_PHYADDR_BCOM, MII_BMCR, BMCR_RESET);
sys/dev/pci/if_tl.c
845
tl_miibus_writereg(dev, i, MII_BMCR, flags);
sys/dev/pci/if_tl.c
847
tl_miibus_writereg(dev, 31, MII_BMCR, BMCR_ISO);
sys/dev/pci/if_tl.c
849
while(tl_miibus_readreg(dev, 31, MII_BMCR) & BMCR_RESET);
sys/dev/pci/if_txp.c
1676
if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
sys/dev/sbus/be.c
1286
be_mii_writereg((struct device *)sc, phy, MII_BMCR,
sys/dev/sbus/be.c
1288
be_mii_writereg((struct device *)sc, phy, MII_BMCR, BMCR_RESET);
sys/dev/sbus/be.c
1291
int bmcr = be_mii_readreg((struct device *)sc, phy, MII_BMCR);
sys/dev/sbus/be.c
1403
BE_PHY_INTERNAL, MII_BMCR);
sys/dev/sbus/be.c
1405
BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO);
sys/dev/sbus/be.c
1415
bmcr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMCR);
sys/dev/sbus/be.c
1440
be_mii_writereg((void *)sc, BE_PHY_INTERNAL, MII_BMCR, bmcr);
sys/dev/sbus/be.c
1471
BE_PHY_INTERNAL, MII_BMCR);
sys/dev/sbus/be.c
1475
BE_PHY_INTERNAL, MII_BMCR);
sys/dev/sbus/be.c
1483
BE_PHY_INTERNAL, MII_BMCR, bmcr);
sys/dev/sbus/be.c
1505
bmcr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMCR);
sys/dev/sbus/be.c
1508
be_mii_writereg((void *)sc, BE_PHY_INTERNAL, MII_BMCR, bmcr);
sys/dev/sbus/be.c
1514
bmcr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMCR);
sys/dev/sbus/be.c
1516
BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO);
sys/dev/sbus/be.c
1547
bmcr = be_mii_readreg((struct device *)sc, BE_PHY_INTERNAL, MII_BMCR);
sys/dev/sbus/be.c
423
BE_PHY_INTERNAL, MII_BMCR, BMCR_ISO);
sys/dev/usb/if_ure.c
746
ure_phy_write(sc, URE_OCP_BASE_MII + MII_BMCR,
sys/dev/usb/if_url.c
1299
case MII_BMCR: /* Control Register */
sys/dev/usb/if_url.c
1371
case MII_BMCR: /* Control Register */