MAX_SCHEDULE_TIMEOUT
adev->gfx_timeout != MAX_SCHEDULE_TIMEOUT &&
adev->compute_timeout != MAX_SCHEDULE_TIMEOUT &&
adev->sdma_timeout != MAX_SCHEDULE_TIMEOUT &&
adev->video_timeout != MAX_SCHEDULE_TIMEOUT;
timeout = MAX_SCHEDULE_TIMEOUT;
return MAX_SCHEDULE_TIMEOUT;
if (timeout_jiffies > MAX_SCHEDULE_TIMEOUT)
return MAX_SCHEDULE_TIMEOUT - 1;
MAX_SCHEDULE_TIMEOUT);
false, MAX_SCHEDULE_TIMEOUT);
false, MAX_SCHEDULE_TIMEOUT);
true, MAX_SCHEDULE_TIMEOUT);
adev->sdma_timeout == MAX_SCHEDULE_TIMEOUT)) {
adev->sdma_timeout == MAX_SCHEDULE_TIMEOUT ||
adev->gfx_timeout == MAX_SCHEDULE_TIMEOUT ||
adev->compute_timeout == MAX_SCHEDULE_TIMEOUT ||
adev->video_timeout == MAX_SCHEDULE_TIMEOUT)) {
return MAX_SCHEDULE_TIMEOUT;
schedule_timeout(MAX_SCHEDULE_TIMEOUT);
if (timeout != MAX_SCHEDULE_TIMEOUT) {
if (timeout != MAX_SCHEDULE_TIMEOUT)
ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT,
if (timeout_jiffies64 >= MAX_SCHEDULE_TIMEOUT - 1)
return MAX_SCHEDULE_TIMEOUT - 1;
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
long timeout = nonblock ? 0 : MAX_SCHEDULE_TIMEOUT;
err = intel_gt_retire_requests_timeout(to_gt(i915), MAX_SCHEDULE_TIMEOUT,
intr, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);
return MAX_SCHEDULE_TIMEOUT;
err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
ret = i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);
err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT) < 0)
err = i915_gem_object_wait(import_obj, 0, MAX_SCHEDULE_TIMEOUT);
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);
dma_fence_default_wait(fence, false, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
if (i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT) < 0)
if (i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT) < 0)
MAX_SCHEDULE_TIMEOUT);
i915_request_wait(workload->req, 0, MAX_SCHEDULE_TIMEOUT);
ret = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
ret = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
i915_request_wait(request, 0, MAX_SCHEDULE_TIMEOUT);
i915_request_wait(request, 0, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
i915_request_wait(request, 0, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT;
err = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
} while (intel_gt_retire_requests_timeout(gt, MAX_SCHEDULE_TIMEOUT,
long r = radeon_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT);
r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT);
false, MAX_SCHEDULE_TIMEOUT);
false, MAX_SCHEDULE_TIMEOUT);
if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
if (mod_delayed_work(sched->timeout_wq, &sched->work_tdr, MAX_SCHEDULE_TIMEOUT)
dma_resv_wait_timeout(bo->base.resv, usage, false, MAX_SCHEDULE_TIMEOUT);
dma_fence_wait_timeout(man->move, false, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
false, MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);
MAX_SCHEDULE_TIMEOUT);