sys/dev/pci/drm/i915/display/intel_cdclk.c

549

u32 lcpll = intel_de_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_cdclk.c

839

u32 lcpll = intel_de_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_cdclk.c

888

(intel_de_read(display, LCPLL_CTL) &

sys/dev/pci/drm/i915/display/intel_cdclk.c

903

intel_de_rmw(display, LCPLL_CTL,

sys/dev/pci/drm/i915/display/intel_cdclk.c

910

ret = intel_de_wait_custom(display, LCPLL_CTL,

sys/dev/pci/drm/i915/display/intel_cdclk.c

916

intel_de_rmw(display, LCPLL_CTL,

sys/dev/pci/drm/i915/display/intel_cdclk.c

919

intel_de_rmw(display, LCPLL_CTL,

sys/dev/pci/drm/i915/display/intel_cdclk.c

922

ret = intel_de_wait_custom(display, LCPLL_CTL,

sys/dev/pci/drm/i915/display/intel_display_power.c

1185

u32 val = intel_de_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1289

val = intel_de_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1293

intel_de_write(display, LCPLL_CTL, val);

sys/dev/pci/drm/i915/display/intel_display_power.c

1295

ret = intel_de_wait_custom(display, LCPLL_CTL,

sys/dev/pci/drm/i915/display/intel_display_power.c

1301

val = intel_de_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1305

intel_de_write(display, LCPLL_CTL, val);

sys/dev/pci/drm/i915/display/intel_display_power.c

1306

intel_de_posting_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1308

if (intel_de_wait_for_clear(display, LCPLL_CTL, LCPLL_PLL_LOCK, 1))

sys/dev/pci/drm/i915/display/intel_display_power.c

1323

intel_de_rmw(display, LCPLL_CTL, 0, LCPLL_POWER_DOWN_ALLOW);

sys/dev/pci/drm/i915/display/intel_display_power.c

1324

intel_de_posting_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1338

val = intel_de_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1352

intel_de_write(display, LCPLL_CTL, val);

sys/dev/pci/drm/i915/display/intel_display_power.c

1353

intel_de_posting_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1361

val = intel_de_read(display, LCPLL_CTL);

sys/dev/pci/drm/i915/display/intel_display_power.c

1363

intel_de_write(display, LCPLL_CTL, val);

sys/dev/pci/drm/i915/display/intel_display_power.c

1365

if (intel_de_wait_for_set(display, LCPLL_CTL, LCPLL_PLL_LOCK, 5))

sys/dev/pci/drm/i915/display/intel_display_power.c

1369

intel_de_rmw(display, LCPLL_CTL, LCPLL_CD_SOURCE_FCLK, 0);

sys/dev/pci/drm/i915/display/intel_display_power.c

1371

ret = intel_de_wait_custom(display, LCPLL_CTL,

sys/dev/pci/drm/i915/gvt/handlers.c

2361

MMIO_DH(LCPLL_CTL, D_ALL, NULL, lcpll_ctl_mmio_write);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

416

MMIO_D(LCPLL_CTL);