IPL_HIGH
struct mutex prom_lock = MUTEX_INITIALIZER(IPL_HIGH);
mtx_init(&sgmap->aps_mtx, IPL_HIGH);
#define splhigh() splraise(IPL_HIGH)
tc_3000_300_intr[i].tci_level = IPL_HIGH;
tc_3000_300_intr[dev].tci_level = IPL_HIGH;
tc_3000_500_intr[i].tci_level = IPL_HIGH;
tc_3000_500_intr[dev].tci_level = IPL_HIGH;
ci->ci_ilevel = IPL_HIGH;
int minlevel = IPL_HIGH;
struct mutex setperf_mp_mutex = MUTEX_INITIALIZER(IPL_HIGH);
mtx_init(&setperf_mp_mutex, IPL_HIGH);
struct mutex pctr_conf_lock = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex cpu_ucode_mtx = MUTEX_INITIALIZER(IPL_HIGH);
#define splhigh() splraise(IPL_HIGH)
struct mutex timer_mutex = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex pci_conf_lock = MUTEX_INITIALIZER(IPL_HIGH);
ampintc_setipl(IPL_HIGH); /* XXX ??? */
prival = (IPL_HIGH - pri) << ICMIPMR_SH;
(IPL_HIGH - new) << ICMIPMR_SH);
int min = IPL_HIGH;
arm_intr_func.setipl(IPL_HIGH);
for (i = IPL_NONE; i <= IPL_HIGH; i++) {
struct mutex pmap_asid_mtx = MUTEX_INITIALIZER(IPL_HIGH);
agintc_setipl(IPL_HIGH);
int min = IPL_HIGH;
ampintc_setipl(IPL_HIGH); /* XXX ??? */
prival = (IPL_HIGH - pri) << ICMIPMR_SH;
(IPL_HIGH - new) << ICMIPMR_SH);
int min = IPL_HIGH;
mtx_init(&as->as_dvamap_mtx, IPL_HIGH);
bcm_intc_setipl(IPL_HIGH); /* XXX ??? */
int min = IPL_HIGH;
for (; i <= IPL_HIGH; i++)
#define splhigh() splraise(IPL_HIGH)
for (i = IPL_NONE; i <= IPL_HIGH; i++) {
bcm_intc_setipl(IPL_HIGH); /* XXX ??? */
int min = IPL_HIGH;
for (; i <= IPL_HIGH; i++)
#define splhigh() splraise(IPL_HIGH)
int min = IPL_HIGH;
intc_setipl(IPL_HIGH); /* XXX ??? */
int min = IPL_HIGH;
for (; i <= IPL_HIGH; i++)
int min = IPL_HIGH;
sxiintc_setipl(IPL_HIGH); /* XXX ??? */
int min = IPL_HIGH;
struct mutex zynq_slcr_lock = MUTEX_INITIALIZER(IPL_HIGH);
mtx_init(&sc->sc_dvmamtx, IPL_HIGH);
sc->sc_ih = cpu_intr_establish(IPL_HIGH, ca->ca_irq,
ga->ga_irq, IPL_HIGH, mg_intr, sc, sc->sc_dev.dv_xname);
#define splhigh() splraise(IPL_HIGH)
struct mutex gdt_lock_store = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex setperf_mp_mutex = MUTEX_INITIALIZER(IPL_HIGH);
mtx_init(&setperf_mp_mutex, IPL_HIGH);
struct mutex cpu_ucode_mtx = MUTEX_INITIALIZER(IPL_HIGH);
#define splhigh() splraise(IPL_HIGH)
#define MCOUNT_ENTER _SPLRAISE(s, IPL_HIGH); __splbarrier()
struct mutex timer_mutex = MUTEX_INITIALIZER(IPL_HIGH);
maxlevel = IPL_HIGH;
irqs = IMASK(IPL_HIGH);
struct mutex pci_conf_lock = MUTEX_INITIALIZER(IPL_HIGH);
for (level = IPL_NONE; level < IPL_HIGH; level++) {
bonito_imask[IPL_HIGH] = -1UL;
for (lvl = IPL_HIGH - 1; lvl != IPL_NONE; lvl--) {
#define splhigh() splraise(IPL_HIGH)
imask[IPL_HIGH] |= imask[IPL_CLOCK];
imask[IPL_IPI] |= imask[IPL_HIGH];
for (lvl = IPL_HIGH - 1; lvl != IPL_NONE; lvl--) {
ci->ci_curspl = IPL_HIGH;
#define splhigh() setipl(IPL_HIGH)
mac_intr_establish(parent, 0x14, IST_LEVEL, IPL_HIGH,
int minipl = IPL_HIGH;
for (; i <= IPL_HIGH; i++)
for (; i <= IPL_HIGH; i++)
for (ipl = IPL_HIGH; ipl >= ci->ci_cpl; ipl --) {
int minipl = IPL_HIGH;
IPL_HIGH, pgs_intr, sc, sc->sc_dev.dv_xname);
mtx_init(&smp_rv_mtx, IPL_HIGH);
sc->sc_minipl[ci->ci_cpuid] = IPL_HIGH;
sc->sc_minipl[ci->ci_cpuid] = IPL_HIGH;
ADD_MASK(scpu->scpu_imask[IPL_HIGH], scpu->scpu_imask[IPL_CLOCK]);
ADD_MASK(scpu->scpu_imask[IPL_IPI], scpu->scpu_imask[IPL_HIGH]);
#define splhigh() splraise(IPL_HIGH)
#define splhigh() splraise(IPL_HIGH)
for (i = IPL_NONE; i <= IPL_HIGH; i++) {
#define splhigh() splraise(IPL_HIGH)
for (i = IPL_NONE; i <= IPL_HIGH; i++) {
struct mutex pmap_hash_lock = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex mpfclock_mtx = MUTEX_INITIALIZER(IPL_HIGH);
plic_setipl(IPL_HIGH); /* XXX ??? */
int min = IPL_HIGH;
prival = IPL_HIGH - 4; // XXX Device-specific high threshold
plic_set_threshold(cpu, IPL_HIGH);
#define splhigh() splraise(IPL_HIGH)
for (i = IPL_NONE; i <= IPL_HIGH; i++) {
mtx_init(&is->is_mtx, IPL_HIGH);
mtx_init(&sb->sb_mtx, IPL_HIGH);
ihandle, IPL_HIGH, BUS_INTR_ESTABLISH_MPSAFE, ci,
mtx_init(&is->is_mtx, IPL_HIGH);
sysino, IPL_HIGH, BUS_INTR_ESTABLISH_MPSAFE, ci,
#define splhigh() _splraise(IPL_HIGH)
struct mutex ctxmtx = MUTEX_INITIALIZER(IPL_HIGH);
mtx_init(&iommu->reg_lock, IPL_HIGH);
iommu->intr = acpidmar_intr_establish(iommu, IPL_HIGH,
mtx_init(&dom->ptlck, IPL_HIGH);
mtx_init(&dom->exlck, IPL_HIGH);
mtx_init(&iommu->reg_lock, IPL_HIGH);
int min = IPL_HIGH;
int min = IPL_HIGH;
int min = IPL_HIGH;
int min = IPL_HIGH;
int min = IPL_HIGH;
static struct mutex iosf_mbi_mtx = MUTEX_INITIALIZER(IPL_HIGH);
rtk->tq = taskq_create("drmrtk", 1, IPL_HIGH, 0);
struct mutex atomic64_mtx = MUTEX_INITIALIZER(IPL_HIGH);
taskq_create("drmwq", 4, IPL_HIGH, 0);
taskq_create("drmhpwq", 4, IPL_HIGH, 0);
taskq_create("drmubwq", 4, IPL_HIGH, 0);
taskq_create("drmlwq", 4, IPL_HIGH, 0);
taskletq = taskq_create("drmtskl", 1, IPL_HIGH, 0);
w->tq = taskq_create(name, 1, IPL_HIGH, 0);
struct mutex rndlock = MUTEX_INITIALIZER(IPL_HIGH);
mtx_init(&kq->kq_lock, IPL_HIGH);
mtx_init(&pr->ps_mtx, IPL_HIGH);
(sensors_taskq = taskq_create("sensors", 1, IPL_HIGH, 0)) == NULL)
struct mutex sigio_lock = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex smr_lock = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex softintr_lock = MUTEX_INITIALIZER(IPL_HIGH);
.tq_mtx = MUTEX_INITIALIZER_FLAGS(IPL_HIGH,
.tq_mtx = MUTEX_INITIALIZER_FLAGS(IPL_HIGH,
struct mutex ratecheck_mtx = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex ppsratecheck_mtx = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex timeout_mutex = MUTEX_INITIALIZER(IPL_HIGH);
struct mutex autoconf_attdet_mtx = MUTEX_INITIALIZER(IPL_HIGH);
MUTEX_INITIALIZER_FLAGS(IPL_HIGH, "logmtx", MTX_NOWITNESS);
MUTEX_INITIALIZER_FLAGS(IPL_HIGH, "logkqmtx", MTX_NOWITNESS);
IPL_HIGH, 0, "phpool", NULL);
MUTEX_INITIALIZER_FLAGS(IPL_HIGH, "kprintf", MTX_NOWITNESS);
splassert(IPL_HIGH);
splassert(IPL_HIGH);
splassert(IPL_HIGH);
splassert(IPL_HIGH);
mtx_init_flags(&w_mtx, IPL_HIGH, "witness lock", MTX_NOWITNESS);