IFM_ETH_TXPAUSE
if (sc->sc_port_flowflags & IFM_ETH_TXPAUSE) {
IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_ETH_TXPAUSE) != 0)
mii->mii_media_active |= IFM_FLOW | IFM_ETH_TXPAUSE;
return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
return (IFM_FLOW|IFM_ETH_TXPAUSE);
return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
return (IFM_FLOW|IFM_ETH_RXPAUSE|IFM_ETH_TXPAUSE);
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
flow |= IFM_ETH_TXPAUSE;
if (sc->bge_flowflags & IFM_ETH_TXPAUSE)
IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
if (sc->bnx_flowflags & IFM_ETH_TXPAUSE) {
IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
ifmr->ifm_active |= IFM_ETH_TXPAUSE;
return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
return (IFM_FLOW|IFM_ETH_TXPAUSE);
ifmr->ifm_active |= IFM_ETH_TXPAUSE;
ifmr->ifm_active |= IFM_FLOW | IFM_ETH_TXPAUSE;
IFM_ETH_TXPAUSE;
IFM_ETH_TXPAUSE);
ifmr->ifm_active |= IFM_FLOW | IFM_ETH_TXPAUSE;
IFM_ETH_TXPAUSE;
IFM_ETH_TXPAUSE);
ifm_active |= IFM_ETH_TXPAUSE;
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE;
ifmr->ifm_active |= IFM_FLOW | IFM_ETH_TXPAUSE;
IFM_ETH_TXPAUSE;
IFM_ETH_TXPAUSE);
if (sc->sc_fc & IFM_ETH_TXPAUSE)
ifmr->ifm_active |= IFM_FLOW | IFM_ETH_TXPAUSE;
if (oce_set_flow_control(sc, IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE))
cmd.tx_flow_control = flags & IFM_ETH_TXPAUSE ? 1 : 0;
sc->sc_fc |= cmd.tx_flow_control ? IFM_ETH_TXPAUSE : 0;
if (((mii->mii_media_active & IFM_GMASK) & IFM_ETH_TXPAUSE) != 0)
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) {
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
#define IFM_ETH_FMASK (IFM_FLOW|IFM_ETH_RXPAUSE|IFM_ETH_TXPAUSE)
{ IFM_ETHER|IFM_ETH_TXPAUSE, "txpause" }, \