sys/dev/pci/drm/i915/gt/intel_gt_irq.c

413

iir = raw_reg_read(regs, GEN8_GT_IIR(0));

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

419

raw_reg_write(regs, GEN8_GT_IIR(0), iir);

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

424

iir = raw_reg_read(regs, GEN8_GT_IIR(1));

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

430

raw_reg_write(regs, GEN8_GT_IIR(1), iir);

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

435

iir = raw_reg_read(regs, GEN8_GT_IIR(3));

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

439

raw_reg_write(regs, GEN8_GT_IIR(3), iir);

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

444

iir = raw_reg_read(regs, GEN8_GT_IIR(2));

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

448

raw_reg_write(regs, GEN8_GT_IIR(2), iir);

sys/dev/pci/drm/i915/gt/intel_gt_pm_irq.c

65

i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;

sys/dev/pci/drm/i915/gt/intel_rps.c

2344

pm_iir = intel_uncore_read(uncore, GEN8_GT_IIR(2));

sys/dev/pci/drm/i915/gt/uc/intel_guc.c

101

guc_WARN_ON_ONCE(guc, intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &

sys/dev/pci/drm/i915/gvt/handlers.c

2476

MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

sys/dev/pci/drm/i915/gvt/handlers.c

2480

MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

sys/dev/pci/drm/i915/gvt/handlers.c

2484

MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

sys/dev/pci/drm/i915/gvt/handlers.c

2488

MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

sys/dev/pci/drm/i915/i915_reg.h

886

GEN8_GT_IIR(which))

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

747

MMIO_D(GEN8_GT_IIR(0));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

751

MMIO_D(GEN8_GT_IIR(1));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

755

MMIO_D(GEN8_GT_IIR(2));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

759

MMIO_D(GEN8_GT_IIR(3));