sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c

155

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_H) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c

159

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_L) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

328

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CONFIG));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

331

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CONFIG), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

358

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

384

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

228

unsigned int phy_inst = GET_INST(GC, xcc_inst);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

299

hqd_base = SOC15_REG_OFFSET(GC, GET_INST(GC, inst), regCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

300

hqd_end = SOC15_REG_OFFSET(GC, GET_INST(GC, inst), regCP_HQD_AQL_DISPATCH_ID_HI);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

309

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

338

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

340

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

342

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

344

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

346

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_PQ_WPTR_POLL_CNTL1,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

351

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_EOP_RPTR,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

355

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_ACTIVE, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

493

WREG32_XCC((SOC15_REG_OFFSET(GC, GET_INST(GC, inst),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

498

WREG32_XCC((SOC15_REG_OFFSET(GC, GET_INST(GC, inst),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1021

*wait_times = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1044

*reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1056

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_LO),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1058

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_HI),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1065

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_LO),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1067

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_HI),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

151

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

189

uint32_t retval = SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) -

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

224

hqd_base = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

227

reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

228

WREG32_SOC15_IP(GC, reg, mqd_hqd[reg - hqd_base]);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

234

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

263

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

265

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

267

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

269

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

273

WREG32_SOC15(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

278

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_RPTR,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

283

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

352

(*dump)[i++][1] = RREG32_SOC15_IP(GC, addr); \

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

361

for (reg = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

362

reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

482

act = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

487

if (low == RREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

488

high == RREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI))

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

534

WREG32_FIELD15(GC, 0, RLC_CP_SCHEDULERS, scheduler1, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

607

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

611

temp = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

685

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, gfx_index_val);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

686

WREG32_SOC15(GC, 0, mmSQ_CMD, sq_cmd);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

695

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

738

uint32_t data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

744

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

750

RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

770

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_CONFIG), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

771

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA0), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

772

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA1), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

781

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

798

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

837

wave_cntl_prev = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

841

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

849

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

852

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), wave_cntl_prev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

874

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL2), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

88

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, sh_mem_config);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

89

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

937

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

945

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

950

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

953

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_L) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

957

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_ADDR_H) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

960

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_ADDR_L) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

969

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

977

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

991

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

995

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

120

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

202

value = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

205

WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, value);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

210

hqd_base = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

213

reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

214

WREG32_SOC15_IP(GC, reg, mqd_hqd[reg - hqd_base]);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

220

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

249

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

251

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

253

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

255

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

259

WREG32_SOC15(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

264

WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_EOP_RPTR),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

269

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

338

(*dump)[i++][1] = RREG32_SOC15_IP(GC, addr); \

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

347

for (reg = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

348

reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

468

act = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

473

if (low == RREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

474

high == RREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI))

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

513

WREG32_FIELD15(GC, 0, RLC_CP_SCHEDULERS, scheduler1, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

530

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

534

temp = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

597

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, gfx_index_val);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

598

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CMD), sq_cmd);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

607

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

641

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_LO),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

643

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_HI),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

650

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_LO),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

652

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_HI),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

88

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, sh_mem_config);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

89

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

116

WREG32_SOC15(GC, 0, regCPC_INT_CNTL,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

187

value = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_CP_SCHEDULERS));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

190

WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_CP_SCHEDULERS), value);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

195

hqd_base = SOC15_REG_OFFSET(GC, 0, regCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

198

reg <= SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

205

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

234

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_LO),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

236

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

238

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

240

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

244

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_PQ_WPTR_POLL_CNTL1),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

249

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_EOP_RPTR),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

254

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_ACTIVE), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

332

for (reg = SOC15_REG_OFFSET(GC, 0, regCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

333

reg <= SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

457

act = RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_ACTIVE));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

462

if (low == RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_BASE)) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

463

high == RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_BASE_HI)))

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

501

WREG32_FIELD15_PREREG(GC, 0, RLC_CP_SCHEDULERS, scheduler1, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

515

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_DEQUEUE_REQUEST), type);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

519

temp = RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_ACTIVE));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

582

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), gfx_index_val);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

583

WREG32(SOC15_REG_OFFSET(GC, 0, regSQ_CMD), sq_cmd);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

592

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

772

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_H) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

776

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_L) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

86

WREG32(SOC15_REG_OFFSET(GC, 0, regSH_MEM_CONFIG), sh_mem_config);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

87

WREG32(SOC15_REG_OFFSET(GC, 0, regSH_MEM_BASES), sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

124

for (reg = SOC15_REG_OFFSET(GC, 0, regCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

125

reg <= SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

171

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), gfx_index_val);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

172

WREG32(SOC15_REG_OFFSET(GC, 0, regSQ_CMD), sq_cmd);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

181

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

347

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_H) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

351

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_L) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

67

WREG32_SOC15(GC, 0, regCPC_INT_CNTL,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1034

soc15_grbm_select(adev, 1, 0, 0, 0, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1047

queue_map = RREG32_SOC15(GC, GET_INST(GC, inst), mmSPI_CSQ_WF_ACTIVE_STATUS);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1072

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1100

*reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1111

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_LO,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1113

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1119

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TMA_LO,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1121

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TMA_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1137

if (!RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE))

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1140

low = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1141

high = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE_HI);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1163

uint32_t temp = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1185

if (!RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE))

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1188

low = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1189

high = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE_HI);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1201

WREG32_SOC15(GC, GET_INST(GC, inst), mmSPI_COMPUTE_QUEUE_RESET, 0x1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1211

WREG32_SOC15(GC, GET_INST(GC, inst), mmCP_MEC_CNTL, pipe_reset_data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1212

WREG32_SOC15(GC, GET_INST(GC, inst), mmCP_MEC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

171

WREG32_SOC15(GC, GET_INST(GC, inst), mmCPC_INT_CNTL,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

238

hqd_base = SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

241

reg <= SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

248

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

277

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

279

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

281

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

283

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

285

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_PQ_WPTR_POLL_CNTL1,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

290

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_EOP_RPTR,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

294

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

372

for (reg = SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_MQD_BASE_ADDR);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

373

reg <= SOC15_REG_OFFSET(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_HI); reg++)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

493

act = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

498

if (low == RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

499

high == RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_BASE_HI))

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

54

soc15_grbm_select(adev, mec, pipe, queue, vmid, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

540

WREG32_FIELD15_RLC(GC, GET_INST(GC, inst), RLC_CP_SCHEDULERS, scheduler1, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

557

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_DEQUEUE_REQUEST, type);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

561

temp = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

59

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

635

WREG32_SOC15_RLC_SHADOW(GC, GET_INST(GC, inst), mmGRBM_GFX_INDEX, gfx_index_val);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

636

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_CMD, sq_cmd);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

645

WREG32_SOC15_RLC_SHADOW(GC, GET_INST(GC, inst), mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

676

uint32_t data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

685

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

691

RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

709

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

732

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

771

wave_cntl_prev = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

775

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

783

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

786

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), wave_cntl_prev);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

808

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL2), data);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

854

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

858

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

862

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_L) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

872

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

886

WREG32_RLC((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

909

*wait_times = RREG32_SOC15_RLC(GC, GET_INST(GC, inst),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

94

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmSH_MEM_CONFIG, sh_mem_config);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

95

WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

964

soc15_grbm_select(adev, 1, pipe_idx, queue_slot, 0, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

965

reg_val = RREG32_SOC15_IP(GC, SOC15_REG_OFFSET(GC, GET_INST(GC, inst),

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

971

(RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_PQ_DOORBELL_CONTROL) &

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

803

ret = amdgpu_virt_rlcg_reg_rw(adev, reg, 0, rlcg_flag, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

934

amdgpu_virt_rlcg_reg_rw(adev, reg, v, rlcg_flag, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

1605

offset = le16_to_cpu(bhdr->table_list[GC].offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

523

info = &bhdr->table_list[GC];

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

966

RREG32_SOC15_IP(GC, reg) :

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

975

WREG32_SOC15_IP(GC, reg, tmp) :

sys/dev/pci/drm/amd/amdgpu/amdgpu_psp.c

2019

dev_mask = GET_MASK(GC, instance_mask);

sys/dev/pci/drm/amd/amdgpu/amdgpu_xcp.c

134

i = GET_INST(GC, (ffs(inst_mask) - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1000

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1001

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1002

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1003

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1004

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1005

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x90),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1006

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1007

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10075

WREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1008

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10085

efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10089

vbios_setting = RREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1009

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x90),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1010

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1011

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1012

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1013

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x94),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1014

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1015

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1016

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1017

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x94),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1018

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10180

efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10184

vbios_setting = RREG32_SOC15(GC, 0, mmGC_USER_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1019

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1020

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1021

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10211

WREG32_FIELD15(GC, 0, PA_SC_ENHANCE_3, FORCE_PBB_WORKLOAD_MODE_TO_ZERO, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10219

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1022

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10224

WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10225

WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1023

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10231

WREG32_SOC15(GC, 0, mmGC_THROTTLE_CTRL_Sienna_Cichlid,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10236

WREG32_SOC15(GC, 0, mmDIDT_IND_INDEX, ixDIDT_SQ_THROTTLE_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

10238

WREG32_SOC15(GC, 0, mmDIDT_IND_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1024

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1025

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1026

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1027

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1028

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1029

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1030

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1031

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1032

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1033

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1034

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1035

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1036

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1037

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x98),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1038

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1039

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1040

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1041

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x98),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1042

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1043

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1044

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1045

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x9c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1046

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1047

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1048

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1049

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x9c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1050

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1051

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1052

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1053

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1054

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1055

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1056

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1057

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1058

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1059

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1060

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1061

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1062

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1063

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1064

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1065

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1066

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1067

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1068

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1069

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1070

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1071

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1072

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1073

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1074

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1075

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1076

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1077

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xbc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1078

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1079

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1080

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1081

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xbc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1082

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1083

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1084

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1085

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1086

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1087

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1088

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1089

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1090

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1091

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1092

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1093

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1094

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1095

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1096

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1097

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1098

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1099

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1100

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1101

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1102

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1103

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1104

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1105

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1106

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1107

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1108

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1109

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1110

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1111

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1112

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1113

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1114

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1115

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1116

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1117

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1118

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1119

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1120

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1121

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1122

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1123

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1124

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1125

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1126

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1127

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1128

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1129

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1130

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1131

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1132

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1133

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1134

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1135

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1136

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1137

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1138

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1139

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1140

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1141

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xcc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1142

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1143

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1144

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1145

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xcc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1146

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1147

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1148

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1149

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1150

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1151

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1152

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1153

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1154

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1155

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1156

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1157

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xec),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1158

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1159

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1160

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1161

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xec),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1162

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1163

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1164

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1165

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1166

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1167

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1168

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1169

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1170

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1171

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1172

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1173

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1174

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1175

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1176

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1177

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1178

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1179

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1180

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1181

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1182

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1183

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1184

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1185

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1186

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1187

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1188

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1189

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xfc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1190

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1191

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1192

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1193

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xfc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1194

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1195

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1196

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1197

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1198

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1199

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1200

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1201

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1202

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1203

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1204

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1205

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1206

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1207

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1208

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1209

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1210

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1211

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1212

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1213

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1214

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1215

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1216

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1217

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1218

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1219

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1220

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1221

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x118),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1222

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1223

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1224

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1225

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x118),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1226

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1227

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1228

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1229

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x11c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1230

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1231

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1232

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1233

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x11c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1234

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1235

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1236

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1237

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x120),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1238

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1239

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1240

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1241

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x120),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1242

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1243

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1244

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1245

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x124),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1246

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1247

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1248

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1249

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x124),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1250

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1251

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1252

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1253

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xdc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1254

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1255

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1256

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1257

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xdc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1258

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1259

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1260

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1261

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x110),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1262

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1263

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1264

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1265

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x110),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1266

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1267

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1268

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1269

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x114),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1270

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1271

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1272

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1273

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x114),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1274

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1275

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1276

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1277

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x108),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1278

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1279

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1280

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1281

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x108),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1282

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1283

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1284

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1285

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1286

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1287

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1288

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1289

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1290

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1291

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1292

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1293

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1294

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1295

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x17),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1296

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1297

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1298

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1299

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x17),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1300

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1301

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x128),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1302

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1303

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1304

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1305

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x128),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1306

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1307

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1308

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1309

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x12c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1310

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1311

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1312

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1313

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x12c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1314

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1315

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1316

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1317

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x138),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1318

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1319

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1320

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1321

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x138),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1322

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1323

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1324

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1325

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x13c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1326

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1327

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1328

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1329

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x13c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1330

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1331

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1332

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1333

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1334

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1335

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1336

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1337

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1338

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1339

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1340

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1341

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x134),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1342

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1343

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1344

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1345

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x134),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1346

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1347

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1348

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1349

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x140),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1350

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1351

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1352

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1353

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x140),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1354

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1355

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1356

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1357

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x144),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1358

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1359

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1360

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1361

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x144),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1362

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1363

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1364

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1365

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x150),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1366

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1367

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1368

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1369

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x150),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1370

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1371

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1372

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1373

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x154),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1374

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1375

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1376

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1377

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x154),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1378

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1379

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1380

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1381

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x148),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1382

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1383

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1384

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1385

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x148),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1386

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1387

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1388

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1389

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1390

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1391

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1392

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1393

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1394

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1395

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1396

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1397

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x158),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1398

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1399

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1400

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1401

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x158),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1402

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1403

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1404

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1405

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x15c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1406

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1407

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1408

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1409

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x15c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1410

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1411

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1412

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1413

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x168),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1414

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1415

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1416

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1417

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x168),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1418

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1419

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1420

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1421

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x16c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1422

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1423

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1424

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1425

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x16c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1426

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1427

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1428

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1429

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x160),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1430

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1431

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1432

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1433

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x160),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1434

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1435

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1436

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1437

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x164),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1438

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1439

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1440

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1441

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x164),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1442

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1443

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1444

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1445

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x170),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1446

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1447

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1448

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1449

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x170),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1450

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1451

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1452

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1453

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x174),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1454

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1455

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1456

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1457

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x174),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1458

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1459

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1460

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1461

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x180),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1462

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1463

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1464

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1465

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x180),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1466

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1467

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1468

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1469

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x184),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1470

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1471

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1472

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1473

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x184),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1474

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1475

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1476

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1477

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x178),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1478

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1479

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1480

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1481

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x178),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1482

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1483

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1484

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1485

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x17c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1486

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1487

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1488

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1489

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x17c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1490

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1491

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1492

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1493

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1494

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1495

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1496

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1497

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1498

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1499

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1500

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1501

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1502

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1503

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1504

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1505

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1506

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1507

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1508

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1509

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x198),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1510

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1511

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1512

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1513

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x198),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1514

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1515

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1516

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1517

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x19c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1518

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1519

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1520

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1521

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x19c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1522

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1523

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1524

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1525

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x190),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1526

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1527

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1528

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1529

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x190),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1530

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1531

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1532

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1533

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x194),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1534

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1535

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1536

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1537

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x194),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1538

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1539

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1540

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1541

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1542

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1543

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1544

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1545

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1546

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1547

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1548

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1549

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1550

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1551

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1552

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1553

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1554

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1555

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1556

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1557

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1558

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1559

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1560

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1561

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1562

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1563

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1564

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1565

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1566

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1567

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1568

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1569

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLOBALS_SAMPLE_SKEW, 0x000000FF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1570

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1571

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLOBALS_MUXSEL_SKEW, 0x000000FF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1572

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1573

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLE_SKEW, 0x000000FF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1574

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1575

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLE_SKEW, 0x000000FF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1576

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1577

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_MUXSEL_SKEW, 0x000000FF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1578

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1579

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_MUXSEL_SKEW, 0x000000FF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1580

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1581

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_DESER_START_SKEW, 0x000000FF, 0x33),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1582

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xFFFFFFFF, 0xe0000000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1586

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0xffffffff, 0x003c0014),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1587

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_GS_NGG_CLK_CTRL, 0xffff8fff, 0xffff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1588

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_IA_CLK_CTRL, 0xffff0fff, 0xffff0100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1589

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CLK_CTRL, 0xcd000000, 0x0d000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1590

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQ_CLK_CTRL, 0xf8ff0fff, 0x60000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1591

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQG_CLK_CTRL, 0x40000ff0, 0x40000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1592

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xffff8fff, 0xffff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1593

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_WD_CLK_CTRL, 0xffff8fff, 0xffff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1594

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1595

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000002, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1596

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0x800007ff, 0x000005ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1597

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG, 0xffffffff, 0x20000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1598

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xffffffff, 0x00000420),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1599

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x00000200, 0x00000200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1600

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x04900000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1601

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DFSM_TILES_IN_FLIGHT, 0x0000ffff, 0x0000003f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1602

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_LAST_OF_BURST_CONFIG, 0xffffffff, 0x03860204),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1603

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff0ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1604

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PRIV_CONTROL, 0x000007ff, 0x000001fe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1605

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1606

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffe7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1607

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffe7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1608

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CGTT_SCLK_CTRL, 0xffff0fff, 0x10000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1609

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL2, 0xffffffff, 0x1402002f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1610

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xffffbfff, 0x00000188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1611

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1612

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1613

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0x00400000, 0x04440000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1614

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0x00000800, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1615

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1616

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_SPARE, 0xffffffff, 0xffff3101),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1617

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070105),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1618

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ALU_CLK_CTRL, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1619

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ARB_CONFIG, 0x00000133, 0x00000130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1620

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_LDS_CLK_CTRL, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1621

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1622

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CNTL, 0x60000010, 0x479c0010),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1623

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00c00000, 0x00c00000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1627

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0x003e001f, 0x003c0014),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1628

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_GS_NGG_CLK_CTRL, 0xffff8fff, 0xffff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1629

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_IA_CLK_CTRL, 0xffff0fff, 0xffff0100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1630

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CLK_CTRL, 0xff7f0fff, 0x0d000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1631

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQ_CLK_CTRL, 0xffffcfff, 0x60000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1632

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQG_CLK_CTRL, 0xffff0fff, 0x40000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1633

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xffff8fff, 0xffff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1634

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_WD_CLK_CTRL, 0xffff8fff, 0xffff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1635

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1636

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000003, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1637

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0x800007ff, 0x000005ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1638

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG, 0xffffffff, 0x20000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1639

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xffffffff, 0x00000420),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1640

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1641

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x04900000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1642

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DFSM_TILES_IN_FLIGHT, 0x0000ffff, 0x0000003f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1643

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_LAST_OF_BURST_CONFIG, 0xffffffff, 0x03860204),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1644

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1800ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1645

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff0ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1646

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PRIV_CONTROL, 0x00007fff, 0x000001fe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1647

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1648

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x77777777, 0x10321032),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1649

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x77777777, 0x02310231),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1650

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1651

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1652

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CGTT_SCLK_CTRL, 0xffff0fff, 0x10000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1653

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL2, 0xffffffff, 0x1402002f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1654

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xffffbfff, 0x00000188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1655

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_0, 0xffffffff, 0x842a4c02),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1656

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1657

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1658

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0xffffffff, 0x04440000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1659

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0x00000820, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1660

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1661

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_SPARE, 0xffffffff, 0xffff3101),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1662

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1663

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ALU_CLK_CTRL, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1664

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ARB_CONFIG, 0x00000133, 0x00000130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1665

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_LDS_CLK_CTRL, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1666

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1667

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CNTL, 0xffdf80ff, 0x479c0010),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1668

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffffffff, 0x00c00000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1676

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000L, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1677

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1678

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1679

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1680

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1681

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1682

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1683

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1684

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1685

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1686

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1687

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1688

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1689

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1690

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1691

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1692

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1693

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1694

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1695

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1696

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1697

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1698

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1699

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1700

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1701

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1702

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1703

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1704

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1705

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1706

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1707

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1708

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1709

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1710

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1711

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1712

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1713

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1714

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1715

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1716

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1717

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1718

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1719

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1720

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1721

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1722

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1723

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1724

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1725

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1726

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1727

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1728

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1729

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1730

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1731

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1732

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1733

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1734

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1735

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1736

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1737

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1738

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1739

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1740

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1741

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1742

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1743

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1744

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1745

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1746

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1747

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1748

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1749

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1750

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1751

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1752

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1753

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1754

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1755

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1756

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1757

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1758

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1759

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1760

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1761

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1762

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1763

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1764

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1765

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1766

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1767

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1768

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1769

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1770

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1771

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1772

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1773

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1774

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1775

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1776

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1777

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1778

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1779

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1780

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1781

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1782

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1783

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1784

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1785

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1786

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1787

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1788

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1789

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1790

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1791

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1792

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1793

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1794

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1795

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1796

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1797

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1798

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1799

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1800

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1801

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1802

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1803

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1804

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1805

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1806

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1807

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1808

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1809

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1810

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1811

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1812

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1813

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1814

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1815

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1816

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1817

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1818

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1819

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1820

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1821

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1822

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1823

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1824

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1825

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1826

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1827

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1828

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1829

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1830

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1831

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1832

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1833

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1834

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1835

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1836

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1837

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1838

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1839

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1840

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1841

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1842

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1843

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1844

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1845

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1846

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1847

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1848

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1849

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1850

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1851

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1852

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1853

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1854

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1855

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1856

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1857

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1858

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1859

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1860

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1e),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1861

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1862

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1863

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1864

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1e),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1865

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1866

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1867

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1868

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1e),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1869

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1870

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1871

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1872

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1e),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1873

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1874

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1875

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1876

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1877

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1878

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1879

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1880

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1881

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1882

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1883

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1884

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1885

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1886

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1887

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1888

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1e),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1889

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1890

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1891

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1892

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1e),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1893

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1894

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1895

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1896

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1897

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1898

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1899

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1900

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1901

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1902

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1903

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1904

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1905

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1906

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1907

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1908

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1909

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1910

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1911

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1912

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1913

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1914

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1915

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1916

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1917

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1918

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1919

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1920

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1921

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1922

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1923

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1924

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1925

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1926

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1927

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1928

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1929

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1930

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1931

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1932

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1933

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1934

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1935

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1936

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1937

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1938

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1939

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1940

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1941

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1942

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1943

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1944

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1945

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1946

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x90),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1947

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1948

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1949

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1950

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x94),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1951

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1952

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1953

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1954

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1955

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1956

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1957

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1958

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1959

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1960

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1961

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1962

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x98),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1963

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1964

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1965

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1966

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x9c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1967

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1968

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1969

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1970

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1971

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1972

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1973

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1974

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1975

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1976

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1977

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1978

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1979

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1980

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1981

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1982

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xbc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1983

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1984

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1985

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1986

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1987

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1988

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1989

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1990

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1991

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1992

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1993

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1994

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1995

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1996

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1997

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1998

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

1999

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2000

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2001

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2002

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2003

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2004

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2005

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2006

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2007

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2008

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2009

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2010

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2011

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2012

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2013

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2014

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xcc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2015

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2016

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2017

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2018

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2019

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2020

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2021

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2022

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xdc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2023

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2024

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2025

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2026

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2027

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2028

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2029

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2030

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xec),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2031

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2032

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2033

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2034

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2035

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2036

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2037

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2038

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2039

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2040

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2041

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2042

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2043

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2044

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2045

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2046

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2047

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2048

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2049

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2050

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x108),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2051

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2052

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2053

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2054

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2055

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2056

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2057

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2058

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x110),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2059

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2060

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2061

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2062

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x114),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2063

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2064

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2065

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2066

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x118),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2067

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2068

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2069

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2070

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x11c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2071

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2072

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2073

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2074

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2075

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2076

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x17),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2077

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2078

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2079

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2080

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2081

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2082

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x134),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2083

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2084

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2085

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2086

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x138),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2087

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2088

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2089

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2090

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x13c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2091

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2092

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2093

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2094

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2095

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2096

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2097

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2098

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x128),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2099

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2100

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2101

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2102

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x12c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2103

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2104

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2105

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2106

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x120),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2107

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2108

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2109

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2110

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x124),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2111

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2112

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2113

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2114

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2115

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2116

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2117

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2118

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x140),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2119

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2120

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2121

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2122

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x144),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2123

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2124

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2125

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2126

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x150),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2127

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2128

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2129

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2130

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x154),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2131

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2132

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2133

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2134

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x148),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2135

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2136

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2137

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2138

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2139

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2140

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2141

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2142

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x158),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2143

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2144

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2145

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2146

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x15c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2147

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2148

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2149

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2150

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x168),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2151

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2152

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2153

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2154

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x16c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2155

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2156

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2157

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2158

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x160),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2159

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2160

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2161

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2162

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x164),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2163

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2164

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2165

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2166

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x170),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2167

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2168

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2169

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2170

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x174),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2171

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2172

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2173

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2174

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x180),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2175

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2176

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2177

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2178

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x184),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2179

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2180

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2181

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2182

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x178),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2183

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2184

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2185

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2186

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x17c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2187

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2188

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2189

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2190

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2191

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2192

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2193

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2194

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2195

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2196

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2197

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2198

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x198),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2199

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2200

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2201

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2202

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x19c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2203

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2204

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2205

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2206

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x190),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2207

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2208

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2209

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2210

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x194),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2211

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2212

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2213

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2214

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1a0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2215

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2216

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2217

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2218

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1a4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2219

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2220

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2221

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2222

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1b0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2223

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2224

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2225

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2226

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1b4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2227

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2228

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2229

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2230

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1a8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2231

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2232

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2233

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2234

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1ac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2235

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2236

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2237

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2238

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1b8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2239

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2240

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2241

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2242

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1bc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2243

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2244

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2245

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2246

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1c8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2247

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2248

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2249

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2250

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1cc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2251

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2252

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2253

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2254

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1c0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2255

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2256

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2257

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2258

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1c4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2259

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2260

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2261

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2262

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2263

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2264

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2265

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2266

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2267

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2268

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2269

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2270

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2271

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2272

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2273

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2274

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2275

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2276

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2277

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2278

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2279

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2280

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2281

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2282

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLOBALS_SAMPLE_SKEW, 0x000000FF, 0x26),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2283

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2284

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLOBALS_MUXSEL_SKEW, 0x000000FF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2285

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2286

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLE_SKEW, 0x000000FF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2287

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2288

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLE_SKEW, 0x000000FF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2289

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2290

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_MUXSEL_SKEW, 0x000000FF, 0x1f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2291

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2292

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_MUXSEL_SKEW, 0x000000FF, 0x25),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2293

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2294

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_DESER_START_SKEW, 0x000000FF, 0x3b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2295

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xFFFFFFFF, 0xe0000000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2303

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000L, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2304

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2305

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2306

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2307

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2308

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2309

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2310

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2311

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2312

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2313

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2314

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2315

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2316

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2317

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2318

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2319

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2320

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2321

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2322

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2323

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2324

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2325

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xcc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2326

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2327

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2328

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2329

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2330

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2331

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2332

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2333

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2334

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2335

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2336

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2337

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2338

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2339

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2340

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2341

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2342

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2343

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2344

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2345

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2346

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2347

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2348

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2349

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2350

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2351

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2352

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2353

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2354

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2355

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2356

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2357

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2358

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2359

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2360

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2361

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2362

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2363

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2364

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2365

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2366

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2367

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2368

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2369

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2370

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2371

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2372

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2373

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2374

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2375

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2376

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2377

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2378

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2379

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2380

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2381

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2382

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2383

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2384

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2385

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xbc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2386

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2387

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2388

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2389

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2390

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2391

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2392

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2393

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2394

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2395

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2396

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2397

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x90),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2398

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2399

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2400

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2401

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x94),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2402

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2403

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2404

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2405

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x98),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2406

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2407

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2408

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2409

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x9c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2410

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2411

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2412

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2413

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2414

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2415

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2416

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2417

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2418

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2419

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2420

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2421

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2422

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2423

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2424

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2425

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2426

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2427

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2428

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2429

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2430

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2431

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2432

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2433

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2434

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2435

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2436

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2437

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2438

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2439

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2440

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2441

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2442

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2443

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2444

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2445

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2446

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2447

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2448

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2449

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2450

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2451

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2452

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2453

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2454

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2455

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2456

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2457

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2458

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2459

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2460

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2461

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2462

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2463

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2464

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2465

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2466

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2467

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2468

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2469

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2470

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2471

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2472

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2473

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2474

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2475

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2476

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2477

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2478

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2479

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2480

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2481

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2482

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2483

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2484

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2485

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2486

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2487

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2488

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2489

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2490

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2491

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2492

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2493

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2494

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2495

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2496

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2497

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2498

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2499

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2500

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2501

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2502

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2503

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2504

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2505

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2506

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2507

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2508

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2509

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2510

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2511

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2512

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2513

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2514

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2515

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2516

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2517

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2518

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2519

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2520

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2521

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2522

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2523

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2524

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2525

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2526

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2527

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2528

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2529

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2530

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2531

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2532

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2533

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2534

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2535

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2536

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2537

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2538

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2539

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2540

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2541

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2542

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2543

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2544

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2545

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2546

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2547

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2548

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2549

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2550

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2551

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2552

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2553

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2554

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2555

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2556

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2557

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2558

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2559

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2560

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2561

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2562

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2563

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2564

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2565

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2566

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2567

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2568

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2569

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2570

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2571

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2572

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2573

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2574

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2575

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2576

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2577

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2578

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2579

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2580

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2581

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2582

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2583

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2584

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2585

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2586

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2587

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2588

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2589

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2590

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2591

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2592

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2593

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2594

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2595

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2596

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2597

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2598

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2599

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2600

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2601

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2602

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2603

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2604

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2605

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2606

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2607

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2608

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2609

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2610

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2611

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2612

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2613

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2614

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2615

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2616

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2617

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2618

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2619

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2620

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2621

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2622

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2623

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2624

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2625

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2626

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2627

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2628

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2629

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2630

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2631

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2632

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2633

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2634

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2635

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2636

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2637

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2638

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2639

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2640

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2641

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2642

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2643

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2644

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2645

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2646

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2647

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2648

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2649

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2650

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2651

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2652

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2653

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2654

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2655

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2656

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2657

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2658

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2659

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2660

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2661

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2662

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2663

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2664

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2665

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2666

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2667

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2668

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2669

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2670

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2671

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2672

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2673

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2674

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2675

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2676

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2677

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2678

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2679

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2680

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2681

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2682

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2683

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2684

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2685

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2686

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2687

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2688

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2689

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2690

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2691

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2692

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2693

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2694

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2695

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2696

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2697

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2698

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2699

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2700

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2701

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2702

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2703

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2704

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2705

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2706

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2707

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2708

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2709

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2710

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2711

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2712

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2713

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2714

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2715

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2716

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2717

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2718

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2719

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2720

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2721

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2722

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2723

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2724

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2725

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2726

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2727

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2728

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2729

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2730

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2731

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2732

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2733

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2734

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2735

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2736

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2737

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2738

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2739

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2740

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2741

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2742

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2743

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2744

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2745

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2746

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2747

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2748

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2749

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2750

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2751

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2752

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2753

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2754

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2755

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2756

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2757

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2758

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2759

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2760

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2761

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2762

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2763

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2764

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2765

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2766

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2767

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2768

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2769

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2770

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2771

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2772

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2773

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2774

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2775

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2776

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2777

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x90),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2778

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2779

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2780

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2781

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x90),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2782

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2783

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2784

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2785

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x94),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2786

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2787

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2788

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2789

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x94),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2790

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2791

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2792

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2793

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2794

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2795

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2796

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2797

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2798

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2799

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

280

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2800

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2801

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2802

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2803

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2804

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2805

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2806

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2807

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2808

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2809

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x98),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

281

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2810

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2811

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2812

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2813

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x98),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2814

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2815

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2816

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2817

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x9c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2818

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2819

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

282

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2820

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2821

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x9c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2822

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2823

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2824

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2825

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2826

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2827

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2828

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2829

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

283

SOC15_REG_ENTRY_STR(GC, 0, mmCP_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2830

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2831

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2832

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2833

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2834

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2835

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2836

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2837

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2838

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2839

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

284

SOC15_REG_ENTRY_STR(GC, 0, mmCP_STALLED_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2840

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2841

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2842

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2843

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2844

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2845

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2846

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2847

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2848

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2849

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xbc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

285

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2850

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2851

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2852

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2853

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xbc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2854

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2855

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2856

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2857

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2858

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2859

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

286

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2860

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2861

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2862

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2863

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2864

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2865

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2866

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2867

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2868

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2869

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

287

SOC15_REG_ENTRY_STR(GC, 0, mmCP_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2870

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2871

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2872

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2873

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2874

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2875

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2876

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2877

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2878

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2879

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

288

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2880

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2881

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2882

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2883

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2884

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2885

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2886

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2887

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2888

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2889

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

289

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2890

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2891

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2892

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2893

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2894

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2895

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2896

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2897

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2898

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2899

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

290

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_BUSY_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2900

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2901

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2902

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2903

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2904

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2905

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2906

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2907

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2908

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2909

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

291

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_BUSY_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2910

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2911

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2912

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2913

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xcc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2914

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2915

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2916

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2917

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xcc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2918

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2919

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

292

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2920

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2921

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2922

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2923

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2924

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2925

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2926

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2927

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2928

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2929

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xec),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

293

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2930

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2931

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2932

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2933

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xec),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2934

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2935

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2936

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2937

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2938

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2939

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

294

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HPD_STATUS0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2940

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2941

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2942

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2943

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2944

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2945

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2946

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2947

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2948

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2949

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

295

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2950

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2951

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2952

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2953

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2954

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2955

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2956

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2957

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xf8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2958

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2959

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

296

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2960

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2961

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xfc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2962

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2963

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x17),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2964

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2965

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xfc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2966

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2967

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x17),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2968

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2969

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

297

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2970

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2971

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2972

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2973

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2974

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2975

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x13),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2976

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2977

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2978

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2979

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

298

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2980

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2981

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2982

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2983

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2984

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2985

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2986

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2987

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2988

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2989

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xe0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

299

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2990

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2991

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2992

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2993

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x118),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2994

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2995

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2996

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2997

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x118),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2998

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

2999

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

300

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3000

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3001

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x11c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3002

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3003

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3004

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3005

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x11c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3006

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3007

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3008

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3009

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x120),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

301

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3010

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3011

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3012

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3013

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x120),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3014

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3015

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3016

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3017

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x124),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3018

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3019

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

302

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3020

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3021

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x124),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3022

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3023

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3024

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3025

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xdc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3026

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3027

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3028

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3029

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xdc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

303

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3030

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3031

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3032

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3033

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x110),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3034

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3035

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3036

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3037

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x110),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3038

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3039

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

304

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3040

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3041

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x114),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3042

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3043

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3044

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3045

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x114),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3046

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3047

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3048

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3049

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x108),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

305

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3050

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3051

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3052

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3053

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x108),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3054

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3055

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3056

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3057

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3058

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3059

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

306

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3060

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3061

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3062

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3063

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3064

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3065

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3066

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3067

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3068

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3069

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

307

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3070

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3071

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3072

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3073

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x128),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3074

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3075

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3076

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3077

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x128),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3078

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3079

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

308

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3080

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3081

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x12c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3082

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3083

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3084

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3085

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x12c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3086

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3087

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3088

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3089

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x138),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

309

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3090

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3091

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3092

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3093

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x138),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3094

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3095

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3096

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3097

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x13c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3098

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3099

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

310

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3100

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3101

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x13c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3102

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3103

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3104

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3105

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3106

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3107

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3108

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3109

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

311

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3110

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3111

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3112

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3113

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x134),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3114

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3115

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3116

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3117

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x134),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3118

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3119

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

312

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3120

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3121

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x140),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3122

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3123

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3124

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3125

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x140),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3126

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3127

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3128

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3129

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x144),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

313

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3130

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3131

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3132

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3133

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x144),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3134

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3135

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3136

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3137

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x150),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3138

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3139

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

314

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3140

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3141

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x150),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3142

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3143

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3144

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3145

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x154),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3146

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3147

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3148

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3149

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x154),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

315

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3150

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3151

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3152

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3153

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x148),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3154

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3155

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3156

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3157

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x148),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3158

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3159

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

316

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3160

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3161

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3162

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3163

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3164

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3165

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3166

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3167

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3168

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3169

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x158),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

317

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3170

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3171

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3172

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3173

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x158),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3174

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3175

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3176

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3177

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x15c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3178

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3179

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

318

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3180

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3181

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x15c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3182

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3183

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3184

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3185

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x168),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3186

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3187

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3188

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3189

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x168),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

319

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3190

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3191

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3192

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3193

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x16c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3194

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3195

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3196

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3197

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x16c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3198

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3199

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

320

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3200

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3201

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x160),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3202

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3203

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3204

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3205

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x160),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3206

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3207

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3208

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3209

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x164),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

321

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3210

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3211

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3212

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3213

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x164),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3214

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3215

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3216

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3217

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x170),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3218

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3219

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

322

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3220

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3221

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x170),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3222

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3223

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3224

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3225

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x174),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3226

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3227

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3228

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3229

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x174),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

323

SOC15_REG_ENTRY_STR(GC, 0, mmCPF_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3230

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3231

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3232

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3233

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x180),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3234

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3235

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3236

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3237

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x180),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3238

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3239

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

324

SOC15_REG_ENTRY_STR(GC, 0, mmCPC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3240

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3241

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x184),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3242

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3243

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3244

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3245

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x184),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3246

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3247

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3248

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3249

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x178),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

325

SOC15_REG_ENTRY_STR(GC, 0, mmCPG_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3250

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3251

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3252

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3253

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x178),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3254

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3255

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3256

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3257

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x17c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3258

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3259

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

326

SOC15_REG_ENTRY_STR(GC, 0, mmGDS_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3260

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3261

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x17c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3262

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3263

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3264

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3265

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3266

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3267

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3268

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3269

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

327

SOC15_REG_ENTRY_STR(GC, 0, mmGDS_VM_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3270

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3271

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3272

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3273

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3274

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3275

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3276

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3277

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3278

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3279

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

328

SOC15_REG_ENTRY_STR(GC, 0, mmIA_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3280

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3281

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x198),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3282

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3283

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3284

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3285

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x198),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3286

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3287

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3288

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3289

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x19c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

329

SOC15_REG_ENTRY_STR(GC, 0, mmIA_UTCL1_STATUS_2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3290

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3291

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3292

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3293

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x19c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3294

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3295

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3296

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3297

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x190),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3298

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3299

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

330

SOC15_REG_ENTRY_STR(GC, 0, mmPA_CL_CNTL_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3300

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3301

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x190),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3302

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3303

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3304

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3305

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x194),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3306

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3307

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3308

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3309

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x194),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

331

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3310

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3311

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3312

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3313

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3314

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3315

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3316

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3317

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3318

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3319

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

332

SOC15_REG_ENTRY_STR(GC, 0, mmRMI_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3320

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3321

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3322

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3323

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3324

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3325

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3326

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3327

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3328

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3329

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

333

SOC15_REG_ENTRY_STR(GC, 0, mmSQC_DCACHE_UTCL0_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3330

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3331

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3332

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3333

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3334

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3335

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3336

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3337

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3338

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3339

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

334

SOC15_REG_ENTRY_STR(GC, 0, mmSQC_ICACHE_UTCL0_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3340

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3341

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLOBALS_SAMPLE_SKEW, 0x000000FF, 0x1f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3342

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3343

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLOBALS_MUXSEL_SKEW, 0x000000FF, 0x22),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3344

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3345

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLE_SKEW, 0x000000FF, 0x1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3346

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3347

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLE_SKEW, 0x000000FF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3348

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3349

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_MUXSEL_SKEW, 0x000000FF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

335

SOC15_REG_ENTRY_STR(GC, 0, mmSQG_UTCL0_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3350

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3351

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_MUXSEL_SKEW, 0x000000FF, 0x15),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3352

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3353

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_DESER_START_SKEW, 0x000000FF, 0x35),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3354

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xFFFFFFFF, 0xe0000000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3358

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0x78000000, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3359

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_PS_CLK_CTRL, 0xff7f0fff, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

336

SOC15_REG_ENTRY_STR(GC, 0, mmTCP_UTCL0_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3360

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA0_CLK_CTRL, 0xff7f0fff, 0x30000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3361

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA1_CLK_CTRL, 0xff7f0fff, 0x7e000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3362

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3363

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000280),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3364

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3365

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_EXCEPTION_CONTROL, 0x7fff0f1f, 0x00b80000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3366

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCEA_SDP_TAG_RESERVE0, 0xffffffff, 0x10100100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3367

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCEA_SDP_TAG_RESERVE1, 0xffffffff, 0x17000088),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3368

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Sienna_Cichlid, 0x1ff1ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3369

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCUTCL2_CGTT_CLK_CTRL_Sienna_Cichlid, 0xff000000, 0xff008080),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

337

SOC15_REG_ENTRY_STR(GC, 0, mmWD_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3370

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCVM_L2_CGTT_CLK_CTRL_Sienna_Cichlid, 0xff000000, 0xff008080),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3371

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PC_CNTL, 0x003fffff, 0x00280400),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3372

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3373

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3374

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3375

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x10f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3376

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x00000020, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3377

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3378

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3379

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0xffffffbf, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

338

SOC15_REG_ENTRY_STR(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3380

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffffffff, 0x00070104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3381

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xe07df47f, 0x00180070),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3382

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER0_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3383

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER1_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3384

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER10_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3385

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER11_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3386

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER12_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3387

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER13_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3388

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER14_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3389

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER15_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

339

SOC15_REG_ENTRY_STR(GC, 0, mmGCVM_L2_PROTECTION_FAULT_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3390

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER2_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3391

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER3_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3392

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER4_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3393

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER5_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3394

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER6_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3395

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER7_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3396

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER8_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3397

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER9_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3398

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSX_DEBUG_1, 0x00010000, 0x00010020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3399

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

340

SOC15_REG_ENTRY_STR(GC, 0, mmCP_DEBUG),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3400

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffbfffff, 0x00a00000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3408

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0xff7f0fff, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3409

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_PS_CLK_CTRL, 0xff7f0fff, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

341

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3410

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA0_CLK_CTRL, 0xff7f0fff, 0x30000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3411

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA1_CLK_CTRL, 0xff7f0fff, 0x7e000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3412

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3413

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000280),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3414

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3415

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_EXCEPTION_CONTROL, 0x7fff0f1f, 0x00b80000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3416

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Sienna_Cichlid, 0x1ff1ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3417

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCUTCL2_CGTT_CLK_CTRL_Sienna_Cichlid, 0xffffffff, 0xff008080),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3418

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCVM_L2_CGTT_CLK_CTRL_Sienna_Cichlid, 0xffff8fff, 0xff008080),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3419

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PC_CNTL, 0x003fffff, 0x00280400),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

342

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3420

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3421

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3422

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3423

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x00f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3424

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3425

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3426

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0xffffffbf, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3427

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffffffff, 0x00070104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3428

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_START_PHASE, 0x000000ff, 0x00000004),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3429

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xe07df47f, 0x00180070),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

343

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3430

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER0_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3431

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER1_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3432

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER10_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3433

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER11_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3434

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER12_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3435

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER13_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3436

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER14_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3437

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER15_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3438

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER2_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3439

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER3_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

344

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC1_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3440

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER4_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3441

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER5_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3442

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER6_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3443

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER7_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3444

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER8_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3445

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER9_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3446

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3447

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffbfffff, 0x00a00000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3448

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_GS_MAX_WAVE_ID, 0x00000fff, 0x000003ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

345

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC2_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3451

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x00000020, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3455

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA0_CLK_CTRL, 0xff7f0fff, 0x30000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3456

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA1_CLK_CTRL, 0xff7f0fff, 0x7e000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3457

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0x000000ff, 0x000000e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3458

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3459

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

346

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_DEBUG_INTERRUPT_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3460

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_EXCEPTION_CONTROL, 0x7fff0f1f, 0x00b80000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3461

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x00000142),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3462

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3463

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x000000ff, 0x000000e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3464

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3465

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3466

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3467

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3468

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3469

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x00f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

347

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3470

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3471

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3472

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0xffffffbf, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3473

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1_Vangogh, 0xffffffff, 0x00070103),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3474

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQG_CONFIG, 0x000017ff, 0x00001000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3475

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSX_DEBUG_1, 0x00010000, 0x00010020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3476

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3477

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffffffff, 0x00400000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3478

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_GS_MAX_WAVE_ID, 0x00000fff, 0x000000ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

348

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3481

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x00000020, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3485

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0xff7f0fff, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3486

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0x000000ff, 0x000000e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3487

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3488

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000280),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3489

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

349

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3490

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x00000242),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3491

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3492

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x000000ff, 0x000000e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3493

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3494

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3495

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3496

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3497

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3498

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x00f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3499

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x000001ff, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

350

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3500

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3501

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3502

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0xffffffbf, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3503

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3504

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffffffff, 0x00100000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3508

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0x78000000, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3509

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA0_CLK_CTRL, 0x30000000, 0x30000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

351

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3510

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA1_CLK_CTRL, 0x7e000000, 0x7e000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3511

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3512

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x00000280, 0x00000280),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3513

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x07800000, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3514

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Sienna_Cichlid, 0x00001d00, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3515

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PC_CNTL, 0x003c0000, 0x00280400),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3516

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3517

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3518

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0x40000000, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3519

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0x00040000, 0x00f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

352

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_COMMAND),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3520

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0x01000000, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3521

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3522

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0x00000800, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3523

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0x0000001f, 0x00180070),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3524

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER0_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3525

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER1_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3526

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER10_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3527

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER11_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3528

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER12_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3529

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER13_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

353

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_MESSAGE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3530

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER14_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3531

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER15_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3532

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER2_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3533

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER3_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3534

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER4_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3535

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER5_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3536

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER6_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3537

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER7_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3538

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER8_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3539

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER9_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

354

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3540

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSX_DEBUG_1, 0x00010000, 0x00010020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3541

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0x01030000, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3542

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x03a00000, 0x00a00000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3543

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x00000020, 0x00000020)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3547

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0x78000000, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3548

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA0_CLK_CTRL, 0xb0000ff0, 0x30000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3549

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA1_CLK_CTRL, 0xff000000, 0x7e000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

355

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3550

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3551

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000280),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3552

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3553

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Sienna_Cichlid, 0x1ff1ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3554

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3555

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3556

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3557

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x00f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3558

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x000001ff, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3559

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

356

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3560

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xe07df47f, 0x00180070),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3561

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER0_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3562

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER1_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3563

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER10_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3564

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER11_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3565

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER12_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3566

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER13_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3567

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER14_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3568

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER15_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3569

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER2_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

357

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3570

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER3_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3571

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER4_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3572

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER5_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3573

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER6_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3574

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER7_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3575

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER8_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3576

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_PERFCOUNTER9_SELECT, 0xf0f001ff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3577

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3578

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffbfffff, 0x00a00000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

358

SOC15_REG_ENTRY_STR(GC, 0, mmSMU_RLC_RESPONSE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3582

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3583

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_FAST_CLKS, 0x3fffffff, 0x0000493e),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3584

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_CPF_CLK_CTRL, 0xfcff8fff, 0xf8000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3585

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CLK_CTRL, 0xff7f0fff, 0x3c000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3586

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_3, 0xa0000000, 0xa0000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3587

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0x00008000, 0x003c8014),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3588

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_DRAM_BURST_CTRL, 0x00000010, 0x00000017),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3589

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0xffffffff, 0xd8d8d8d8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

359

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3590

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000003, 0x00000003),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3591

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0x800007ff, 0x000005ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3592

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG, 0xffffffff, 0x20000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3593

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3594

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x04800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3595

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_LAST_OF_BURST_CONFIG, 0xffffffff, 0x03860210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3596

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1800ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3597

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x00009d00, 0x00008500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3598

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0xffffffff, 0x000fffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3599

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_DRAM_BURST_CTRL, 0x00000010, 0x00000017),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

360

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3600

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0xfcfcfcfc, 0xd8d8d8d8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3601

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x77707770, 0x21302130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3602

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x77707770, 0x21302130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3603

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3604

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3605

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CGTT_SCLK_CTRL, 0x10000000, 0x10000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3606

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL2, 0xfc02002f, 0x9402002f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3607

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0x00002188, 0x00000188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3608

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x08000009, 0x08000009),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3609

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_0, 0xcc3fcc03, 0x842a4c02),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

361

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_RLCS_GPM_STAT_2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3610

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000000f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3611

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_SPARE, 0xffff3109, 0xffff3101),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3612

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ARB_CONFIG, 0x00000100, 0x00000130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3613

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_LDS_CLK_CTRL, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3614

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0x00030008, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3615

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00800000, 0x00800000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3619

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0xff7f0fff, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

362

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SPP_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3620

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0x000000ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3621

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3622

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000280),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3623

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3624

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x00000042),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3625

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3626

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x000000ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3627

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3628

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3629

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

363

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_RLCS_BOOTLOAD_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3630

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3631

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3632

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x00f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3633

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x000001ff, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3634

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf17fffff, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3635

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3636

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0xffffffbf, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3637

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQG_CONFIG, 0x000017ff, 0x00001000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3638

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSX_DEBUG_1, 0xffffff7f, 0x00010020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3639

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

364

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_INT_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3640

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffffffff, 0x00100000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3644

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0xff7f0fff, 0x78000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3645

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0x000000ff, 0x000000e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3646

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3647

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000280),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3648

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3649

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1807ff, 0x00000041),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

365

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_GENERAL_6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3650

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Vangogh, 0x1ff1ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3651

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0x000000ff, 0x000000e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3652

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3653

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x77777777, 0x32103210),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3654

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3655

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3656

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CM_CTRL1, 0xff8fff0f, 0x580f1008),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3657

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xf7ffffff, 0x00f80988),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3658

SOC15_REG_GOLDEN_VALUE(GC, 0, mmLDS_CONFIG, 0x000001ff, 0x00000020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3659

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_CL_ENHANCE, 0xf000003f, 0x01200007),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

366

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_A),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3660

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3661

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0xffffffbf, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3662

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQG_CONFIG, 0x000017ff, 0x00001000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3663

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSX_DEBUG_1, 0xffffff7f, 0x00010020),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3664

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3665

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffffffff, 0x00100000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

367

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_B),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

368

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

369

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_LX6_CORE_PDEBUG_INST),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

371

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

373

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

374

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE1),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

375

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE2),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

376

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE3)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

381

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_VMID),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

382

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PERSISTENT_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

383

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PIPE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3835

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 0x2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3836

WREG32_SOC15(GC, 0, mmSPI_COMPUTE_QUEUE_RESET, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3839

if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

384

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3846

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

385

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3853

WREG32_SOC15(GC, 0, mmCP_VMID_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3857

if (!(RREG32_SOC15(GC, 0, mmCP_GFX_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

386

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

387

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

388

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

389

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

390

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

391

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

392

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

393

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

394

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

395

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

396

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

397

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

398

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

399

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

400

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

401

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

402

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

403

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_EVENTS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4036

uint32_t scratch = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

404

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_BASE_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

405

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

406

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

407

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

408

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CNTL_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

409

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

410

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

411

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_GDS_RESOURCE_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

412

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

413

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_WPTR_MEM),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

414

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

415

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

416

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_SUSPEND_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

417

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_SUSPEND_CNTL_STACK_DW_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

418

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_SUSPEND_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

419

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_DEQUEUE_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

421

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

422

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

423

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

424

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

425

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

426

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

427

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

428

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

433

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_ACTIVE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4338

ctx_reg_offset = SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

434

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

435

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

436

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4364

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4365

reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4366

reg_access_ctrl->scratch_reg2 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4367

reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG3);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4368

reg_access_ctrl->grbm_cntl = SOC15_REG_OFFSET(GC, 0, mmGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4369

reg_access_ctrl->grbm_idx = SOC15_REG_OFFSET(GC, 0, mmGRBM_GFX_INDEX);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

437

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4373

SOC15_REG_OFFSET(GC, 0, mmRLC_SPARE_INT_0_Sienna_Cichlid);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4377

SOC15_REG_OFFSET(GC, 0, mmRLC_SPARE_INT);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

438

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_CSMD_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

439

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

440

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

441

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

442

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_MAPPED),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

443

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_QUE_MGR_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

444

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_HQ_CONTROL0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

445

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_HQ_STATUS0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

446

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_CE_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

447

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_CE_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4479

WREG32_SOC15(GC, 0, mmSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

448

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_CE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4482

return RREG32_SOC15(GC, 0, mmSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4489

WREG32_SOC15(GC, 0, mmSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

449

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_CE_CSMD_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4495

*(out++) = RREG32_SOC15(GC, 0, mmSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

450

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_CE_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

451

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_HQD_CE_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

452

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_MQD_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

453

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_MQD_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

454

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

455

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4558

data = def = RREG32_SOC15(GC, 0, mmRLC_PERFMON_CLK_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4566

WREG32_SOC15(GC, 0, mmRLC_PERFMON_CLK_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

457

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

458

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

459

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4593

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

460

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4608

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

461

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

462

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

463

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

464

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

465

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

466

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

467

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

468

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

469

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

470

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

471

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

472

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

473

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

474

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

475

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

476

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

477

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

478

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

479

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

480

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

484

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_4, 0xffffffff, 0x00400014),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

485

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_CPF_CLK_CTRL, 0xfcff8fff, 0xf8000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

486

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CLK_CTRL, 0xcd000000, 0x0d000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

487

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQ_CLK_CTRL, 0x60000ff0, 0x60000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

488

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SQG_CLK_CTRL, 0x40000000, 0x40000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

489

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xffff8fff, 0xffff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

490

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_WD_CLK_CTRL, 0xfeff8fff, 0xfeff8100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

491

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

492

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000002, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

493

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0x000007ff, 0x000005ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

494

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG, 0x20000000, 0x20000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

495

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xffffffff, 0x00000420),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

496

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x00000200, 0x00000200),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

497

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0x07900000, 0x04900000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

498

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DFSM_TILES_IN_FLIGHT, 0x0000ffff, 0x0000003f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

499

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_LAST_OF_BURST_CONFIG, 0xffffffff, 0x03860204),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

500

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff0ffff, 0x00000500),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

501

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PRIV_CONTROL, 0x000007ff, 0x000001fe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

502

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

503

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_0, 0x77777777, 0x10321032),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

504

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2_PIPE_STEER_1, 0x77777777, 0x02310231),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

505

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

506

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

507

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CGTT_SCLK_CTRL, 0x10000000, 0x10000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

508

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL2, 0xffffffff, 0x1402002f),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5080

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5087

data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5088

data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

509

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2C_CTRL3, 0xffff9fff, 0x00001188),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

510

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_TIMEOUT_COUNTER, 0xffffffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

511

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

512

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0x00400000, 0x04440000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

513

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0x00000800, 0x00000820),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

514

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

515

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_SPARE, 0xffffffff, 0xffff3101),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

516

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070104),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

517

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ALU_CLK_CTRL, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

518

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ARB_CONFIG, 0x00000100, 0x00000130),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

519

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_LDS_CLK_CTRL, 0xffffffff, 0xffffffff),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5190

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_CONFIG), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5191

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5193

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA0), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5194

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA1), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

520

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

521

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CNTL, 0x60000010, 0x479c0010),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5214

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5215

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

522

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CGTT_CLK_CTRL, 0xfeff0fff, 0x40000100),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5225

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5226

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5227

WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5228

WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

523

SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00c00000, 0x00c00000)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5246

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5247

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5248

WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5249

WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5303

tmp = RREG32_SOC15(GC, 0, mmUTCL1_UTCL0_INVREQ_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5307

WREG32_SOC15(GC, 0, mmUTCL1_UTCL0_INVREQ_DISABLE, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5309

tmp = RREG32_SOC15(GC, 0, mmGCRD_SA_TARGETS_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

531

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5313

WREG32_SOC15(GC, 0, mmGCRD_SA_TARGETS_DISABLE, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

532

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5327

tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE_gc_10_3) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5328

RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE_gc_10_3);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

533

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5330

tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5331

RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

534

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5345

WREG32_FIELD15(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

535

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5359

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

536

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5365

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

537

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

538

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5385

return SOC15_REG_OFFSET(GC, 0, mmCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5387

return SOC15_REG_OFFSET(GC, 0, mmCP_INT_CNTL_RING1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

539

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

540

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5406

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5408

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

541

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5410

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5412

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

542

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

543

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5432

tmp = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

544

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5441

WREG32_SOC15_IP(GC, cp_int_cntl_reg, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

545

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5453

WREG32_SOC15_RLC(GC, 0, mmRLC_CSIB_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5455

WREG32_SOC15_RLC(GC, 0, mmRLC_CSIB_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5457

WREG32_SOC15_RLC(GC, 0, mmRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5459

WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

546

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5461

WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5463

WREG32_SOC15(GC, 0, mmRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

547

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5470

u32 tmp = RREG32_SOC15(GC, 0, mmRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5473

WREG32_SOC15(GC, 0, mmRLC_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5478

WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

548

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5480

WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5489

rlc_pg_cntl = RREG32_SOC15(GC, 0, mmRLC_PG_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

549

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

550

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5503

WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, rlc_pg_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

551

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5515

WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

552

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5524

tmp = RREG32_SOC15(GC, 0, mmRLC_SRM_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5527

WREG32_SOC15(GC, 0, mmRLC_SRM_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

553

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xcc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

554

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5546

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

555

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5550

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5553

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

556

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

557

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

558

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5584

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5587

WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

559

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

560

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

561

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xd4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

562

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

563

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

564

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

565

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

566

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

567

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

568

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

569

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

570

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

571

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

572

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

573

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

574

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

575

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

576

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

577

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

578

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

579

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

580

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

581

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

582

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

583

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x11),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

584

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

585

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

586

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5861

WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_ADDR_HI, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5862

WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_ADDR_LO, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5863

WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_SIZE, rlc_g_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5865

tmp = RREG32_SOC15(GC, 0, mmRLC_HYP_RESET_VECTOR);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

587

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5872

tmp = RREG32_SOC15(GC, 0, mmRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

588

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5889

tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

589

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5891

WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5895

tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

590

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

591

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5910

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5912

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

592

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5926

tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5928

WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

593

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5932

tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

594

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5947

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5949

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

595

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

596

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5963

tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5965

WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5969

tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

597

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

598

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5984

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

5986

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

599

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

600

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6000

tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6002

WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6006

tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

601

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

602

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6021

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6023

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

603

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6036

cp_status = RREG32_SOC15(GC, 0, mmCP_STAT);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6037

bootload_status = RREG32_SOC15(GC, 0, mmRLC_RLCS_BOOTLOAD_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

604

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

605

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

606

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

607

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6075

u32 tmp = RREG32_SOC15(GC, 0, mmCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

608

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6082

WREG32_SOC15_RLC(GC, 0, mmCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6084

WREG32_SOC15(GC, 0, mmCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

609

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xb8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6090

if (RREG32_SOC15(GC, 0, mmCP_STAT) == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

610

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

611

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

612

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

613

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xbc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6136

tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6138

WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

614

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6142

tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

615

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6157

tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

616

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6162

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6163

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6165

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6168

WREG32_SOC15(GC, 0, mmCP_HYP_PFP_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

617

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6171

WREG32_SOC15(GC, 0, mmCP_HYP_PFP_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6174

WREG32_SOC15(GC, 0, mmCP_HYP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

618

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

619

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

620

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

621

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6214

tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6216

WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

622

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6220

tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

623

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6235

tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

624

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6240

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6242

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6245

WREG32_SOC15(GC, 0, mmCP_HYP_CE_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6248

WREG32_SOC15(GC, 0, mmCP_HYP_CE_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

625

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x90),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6251

WREG32_SOC15(GC, 0, mmCP_HYP_CE_UCODE_ADDR, adev->gfx.ce_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

626

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

627

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

628

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

629

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x94),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6291

tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6293

WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6297

tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

630

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

631

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6312

tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6317

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6319

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

632

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6322

WREG32_SOC15(GC, 0, mmCP_HYP_ME_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6325

WREG32_SOC15(GC, 0, mmCP_HYP_ME_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6328

WREG32_SOC15(GC, 0, mmCP_HYP_ME_UCODE_ADDR, adev->gfx.me_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

633

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x98),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

634

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

635

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

636

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

637

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x9c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6372

WREG32_SOC15(GC, 0, mmCP_MAX_CONTEXT,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6374

WREG32_SOC15(GC, 0, mmCP_DEVICE_ID, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

638

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

639

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

640

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6407

SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

641

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

642

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

643

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

644

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6448

tmp = RREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

645

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6451

WREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

646

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6460

tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

647

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6470

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

648

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6483

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6485

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

649

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xa8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6491

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6493

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

650

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6507

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

651

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x6),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6510

WREG32_SOC15(GC, 0, mmCP_RB_VMID, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

652

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6524

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6528

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6529

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

653

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xac),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6533

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6534

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6538

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

654

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6540

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6544

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6547

WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6548

WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

655

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x4),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6550

WREG32_SOC15(GC, 0, mmCP_RB_ACTIVE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

656

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6564

WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6567

WREG32_SOC15(GC, 0, mmCP_RB1_WPTR, lower_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6568

WREG32_SOC15(GC, 0, mmCP_RB1_WPTR_HI, upper_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

657

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6571

WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6572

WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6575

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6577

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

658

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6581

WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6584

WREG32_SOC15(GC, 0, mmCP_RB1_BASE, rb_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6585

WREG32_SOC15(GC, 0, mmCP_RB1_BASE_HI, upper_32_bits(rb_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6586

WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

659

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

660

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

661

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6614

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL_Sienna_Cichlid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6617

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

662

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

663

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6630

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL_Sienna_Cichlid,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6635

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

664

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

665

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

666

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6666

tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6668

WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

667

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6672

tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

668

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6687

tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

669

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6691

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6693

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr &

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6695

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6699

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

670

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6702

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6705

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

671

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x8),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

672

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

673

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6730

tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6733

WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6736

tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6739

WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

674

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

675

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6757

tmp = RREG32_SOC15(GC, 0, mmCP_GFX_HQD_QUEUE_PRIORITY);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

676

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

677

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6779

tmp = RREG32_SOC15(GC, 0, mmCP_GFX_MQD_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

678

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6786

tmp = RREG32_SOC15(GC, 0, mmCP_GFX_HQD_VMID);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

679

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6794

tmp = RREG32_SOC15(GC, 0, mmCP_GFX_HQD_QUANTUM);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

680

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

681

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6816

tmp = RREG32_SOC15(GC, 0, mmCP_GFX_HQD_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

682

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6825

tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

683

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6837

mqd->cp_gfx_hqd_rptr = RREG32_SOC15(GC, 0, mmCP_GFX_HQD_RPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

684

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

685

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

686

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

687

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

688

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

689

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

690

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

691

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

692

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6926

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

693

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6933

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

694

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

695

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

696

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6962

tmp = RREG32_SOC15(GC, 0, mmCP_MQD_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

697

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6972

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

698

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

699

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6999

mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

700

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7004

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7009

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_IB_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

701

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

702

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

703

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7030

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7033

WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7036

if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7037

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7039

if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

704

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7043

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7045

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7047

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7049

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

705

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7054

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7057

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7059

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

706

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7063

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7067

WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7069

WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

707

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7073

WREG32_SOC15(GC, 0, mmCP_MQD_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7077

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7079

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

708

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7083

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7087

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7089

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

709

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7093

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7095

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

710

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7100

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7102

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7106

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

711

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7110

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7112

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7116

WREG32_SOC15(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7118

WREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

712

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7122

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7126

WREG32_FIELD15(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

713

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

714

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

715

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

716

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

717

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

718

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

719

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x7),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

720

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

721

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

722

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

723

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x5),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

724

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

725

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

726

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

727

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

728

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

729

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7294

data = RREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_Sienna_Cichlid);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7295

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_Sienna_Cichlid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7296

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, pattern);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7298

if (RREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_Sienna_Cichlid) == pattern) {

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7299

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

730

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7302

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_Sienna_Cichlid, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

731

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xc),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7310

data = RREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7311

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7312

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, pattern);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7314

if (RREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE) == pattern) {

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7315

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7318

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

732

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

733

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7336

WREG32_SOC15(GC, 0, mmGRBM_CAM_INDEX, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

734

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7348

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_RING_SIZE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

735

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7350

(SOC15_REG_OFFSET(GC, 0, mmVGT_TF_RING_SIZE_Sienna_Cichlid) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7352

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7353

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7356

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7358

(SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_Sienna_Cichlid) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

736

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7360

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7361

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7364

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_HI_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7366

(SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_HI_Sienna_Cichlid) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7368

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7369

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

737

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7372

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_HS_OFFCHIP_PARAM_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7374

(SOC15_REG_OFFSET(GC, 0, mmVGT_HS_OFFCHIP_PARAM_Sienna_Cichlid) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7376

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7377

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

738

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7380

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_ESGS_RING_SIZE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7382

(SOC15_REG_OFFSET(GC, 0, mmVGT_ESGS_RING_SIZE_Sienna_Cichlid) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7384

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7385

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7388

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_GSVS_RING_SIZE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

739

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7390

(SOC15_REG_OFFSET(GC, 0, mmVGT_GSVS_RING_SIZE_Sienna_Cichlid) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7392

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7393

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7396

data = (SOC15_REG_OFFSET(GC, 0, mmSPI_CONFIG_CNTL_REMAP) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7398

(SOC15_REG_OFFSET(GC, 0, mmSPI_CONFIG_CNTL_Sienna_Cichlid) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

740

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7403

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_RING_SIZE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7405

(SOC15_REG_OFFSET(GC, 0, mmVGT_TF_RING_SIZE) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7407

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7408

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

741

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7411

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7413

(SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7415

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7416

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7419

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_HI_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

742

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7421

(SOC15_REG_OFFSET(GC, 0, mmVGT_TF_MEMORY_BASE_HI) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7423

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7424

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7427

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_HS_OFFCHIP_PARAM_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7429

(SOC15_REG_OFFSET(GC, 0, mmVGT_HS_OFFCHIP_PARAM) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

743

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x9),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7431

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7432

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7435

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_ESGS_RING_SIZE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7437

(SOC15_REG_OFFSET(GC, 0, mmVGT_ESGS_RING_SIZE) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7439

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

744

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7440

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7443

data = (SOC15_REG_OFFSET(GC, 0, mmVGT_GSVS_RING_SIZE_UMD) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7445

(SOC15_REG_OFFSET(GC, 0, mmVGT_GSVS_RING_SIZE) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7447

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7448

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

745

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7451

data = (SOC15_REG_OFFSET(GC, 0, mmSPI_CONFIG_CNTL_REMAP) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7453

(SOC15_REG_OFFSET(GC, 0, mmSPI_CONFIG_CNTL) <<

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7458

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7459

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

746

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7466

data = RREG32_SOC15(GC, 0, mmCPC_PSP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7468

WREG32_SOC15(GC, 0, mmCPC_PSP_DEBUG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

747

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xb),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7470

data = RREG32_SOC15(GC, 0, mmCPG_PSP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7472

WREG32_SOC15(GC, 0, mmCPG_PSP_DEBUG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

748

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

749

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

750

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

751

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x3),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

752

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

753

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

754

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

755

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

756

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

757

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

758

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7584

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, mmGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

759

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7599

tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS) &

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

760

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

761

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7616

tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

762

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

763

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7637

tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

764

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

765

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

766

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

767

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7671

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7674

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7675

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

768

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7680

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7681

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

769

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x24),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

770

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

771

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

772

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

773

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

774

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

775

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

776

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

777

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x28),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7771

SOC15_REG_OFFSET(GC, 0, mmGDS_VMID0_BASE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7776

SOC15_REG_OFFSET(GC, 0, mmGDS_VMID0_SIZE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

778

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7781

SOC15_REG_OFFSET(GC, 0, mmGDS_GWS_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7786

SOC15_REG_OFFSET(GC, 0, mmGDS_OA_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

779

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

780

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

781

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

782

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

783

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

784

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

785

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x2c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7859

rlc_cntl = RREG32_SOC15(GC, 0, mmRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

786

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

787

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

788

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7880

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7884

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

789

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7891

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7895

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

790

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

791

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7918

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

792

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7921

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

793

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x30),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7937

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7938

WREG32_SOC15(GC, 0, mmCGTT_WD_CLK_CTRL, 0xff000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7939

WREG32_SOC15(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xff000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

794

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7940

WREG32_SOC15(GC, 0, mmCGTT_IA_CLK_CTRL, 0xff000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7943

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

795

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7952

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7958

def = data = RREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

796

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7961

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7965

def = data = RREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7968

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

797

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7973

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

798

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7981

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7984

data = RREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7987

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

799

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7991

data = RREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7994

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

800

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

801

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x34),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8011

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8019

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

802

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8022

def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

803

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8034

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8037

def = RREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

804

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8041

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8044

def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

805

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8055

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

806

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8068

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

807

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8079

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

808

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8082

def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

809

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x38),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8094

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8097

def = RREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

810

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8101

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8103

def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

811

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8114

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

812

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8127

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

813

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8132

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8134

def = data = RREG32_SOC15(GC, 0, mmRLC_CLK_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8139

WREG32_SOC15(GC, 0, mmRLC_CLK_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

814

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8141

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8146

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8148

def = data = RREG32_SOC15(GC, 0, mmRLC_CLK_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

815

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8153

WREG32_SOC15(GC, 0, mmRLC_CLK_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

816

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

817

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x3c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

818

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

819

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

820

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

821

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

822

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

823

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

824

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

825

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

826

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

827

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x19),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

828

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

829

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

830

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8303

reg = SOC15_REG_OFFSET(GC, 0, mmRLC_SPM_MC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

831

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8315

WREG32_SOC15_NO_KIQ(GC, 0, mmRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8317

WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

832

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

833

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x50),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

834

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

835

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8359

u32 data = RREG32_SOC15(GC, 0, mmRLC_PG_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

836

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8366

WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

837

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

838

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8385

WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

839

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

840

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

841

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x54),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

842

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

843

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

844

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

845

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

846

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

847

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

848

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

849

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x58),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

850

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8504

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8509

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

851

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8514

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

852

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8523

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8528

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

853

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8533

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

854

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

855

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8557

wptr = RREG32_SOC15(GC, 0, mmCP_RB0_WPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8558

wptr += (u64)RREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI) << 32;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

856

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

857

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x5c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8574

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8576

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

858

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

859

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x18),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

860

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

861

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

862

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

863

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

864

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

865

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x14),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

866

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

867

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1d),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

868

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

869

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

870

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

871

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

872

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

873

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x48),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

874

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

875

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

876

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

877

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

878

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

879

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

880

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8802

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

881

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x4c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

882

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

883

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1a),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

884

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

885

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

886

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

887

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

888

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

889

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x40),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

890

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

891

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

892

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

893

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

894

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

895

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

896

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

897

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x44),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

898

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

899

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x1b),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

900

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

901

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

902

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

903

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x17),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

904

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

905

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

906

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9061

cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9064

cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_INT_CNTL_RING1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

907

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x17),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9077

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

908

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9080

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9083

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9086

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

909

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

910

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9108

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

911

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9111

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9114

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9117

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

912

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

913

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x60),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9130

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9133

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9136

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9139

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

914

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

915

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

916

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

917

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

918

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

919

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

920

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

921

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x64),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

922

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

923

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xf),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

924

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9244

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9248

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

925

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9258

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

926

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9262

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

927

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

928

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

929

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x70),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9290

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9294

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

930

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9304

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9308

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

931

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x16),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

932

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

933

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9335

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9339

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

934

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

935

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

936

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

937

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x74),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

938

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

939

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

940

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

941

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

942

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9421

target = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9423

target = SOC15_REG_OFFSET(GC, 0, mmCP_ME2_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9429

tmp = RREG32_SOC15(GC, 0, mmCPC_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

943

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9432

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9434

tmp = RREG32_SOC15_IP(GC, target);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9437

WREG32_SOC15_IP(GC, target, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9439

tmp = RREG32_SOC15(GC, 0, mmCPC_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

944

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9442

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9444

tmp = RREG32_SOC15_IP(GC, target);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9447

WREG32_SOC15_IP(GC, target, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

945

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x68),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

946

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

947

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x12),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

948

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

949

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

950

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

951

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

952

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

953

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x6c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

954

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9545

SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

955

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0x10),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9550

SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), 0, 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

956

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

957

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

958

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

959

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

960

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

961

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x78),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9614

if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

962

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

963

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xd),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

964

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

965

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

966

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

967

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

968

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

969

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x7c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

970

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

971

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

972

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

973

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

974

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9748

RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME2_HEADER_DUMP));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

975

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

976

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

977

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x88),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

978

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

979

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

980

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

981

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

982

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

983

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

984

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

985

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x8c),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

986

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

987

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

988

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

989

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

990

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

991

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

992

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

993

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x80),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

994

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x10000),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

995

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xe),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

996

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

997

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR, 0xFFFFFFFF, 0x84),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

998

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_GFX_INDEX, 0xffffff, 0x0),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

999

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA, 0xFFFFFFFF, 0xa),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

125

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

126

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS2),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

127

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS3),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

128

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

129

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

130

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

131

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

132

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

133

SOC15_REG_ENTRY_STR(GC, 0, regCP_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

134

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

135

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

136

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_BUSY_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

137

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_BUSY_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

138

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

139

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

140

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HPD_STATUS0),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

141

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

142

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

143

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

144

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

145

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

146

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

147

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB1_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

148

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB1_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

149

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB1_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

150

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

151

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1512

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_HI, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1513

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_LO, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1515

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_SIZE, rlc_g_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

152

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

153

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

154

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

155

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

156

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

157

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

158

SOC15_REG_ENTRY_STR(GC, 0, regCPF_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

159

SOC15_REG_ENTRY_STR(GC, 0, regCPC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

160

SOC15_REG_ENTRY_STR(GC, 0, regCPG_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

161

SOC15_REG_ENTRY_STR(GC, 0, regGDS_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

162

SOC15_REG_ENTRY_STR(GC, 0, regGDS_VM_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

163

SOC15_REG_ENTRY_STR(GC, 0, regIA_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

164

SOC15_REG_ENTRY_STR(GC, 0, regIA_UTCL1_STATUS_2),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

165

SOC15_REG_ENTRY_STR(GC, 0, regPA_CL_CNTL_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

166

SOC15_REG_ENTRY_STR(GC, 0, regRLC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

167

SOC15_REG_ENTRY_STR(GC, 0, regRMI_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

168

SOC15_REG_ENTRY_STR(GC, 0, regSQC_CACHES),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

169

SOC15_REG_ENTRY_STR(GC, 0, regSQG_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

170

SOC15_REG_ENTRY_STR(GC, 0, regWD_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

171

SOC15_REG_ENTRY_STR(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

172

SOC15_REG_ENTRY_STR(GC, 0, regGCVM_L2_PROTECTION_FAULT_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

173

SOC15_REG_ENTRY_STR(GC, 0, regCP_DEBUG),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

174

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

175

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

176

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC1_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

177

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_DEBUG_INTERRUPT_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

178

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

179

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

180

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

181

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

183

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

184

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

185

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

186

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

187

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

188

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

189

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

190

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

192

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE0),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

193

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE1),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

194

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE2),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

195

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE3),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

196

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE4),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

197

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE5)

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1971

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1978

gc_disabled_sa_mask = RREG32_SOC15(GC, 0, regCC_GC_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1982

gc_user_disabled_sa_mask = RREG32_SOC15(GC, 0, regGC_USER_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

1997

gc_disabled_rb_mask = RREG32_SOC15(GC, 0, regCC_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2001

gc_user_disabled_rb_mask = RREG32_SOC15(GC, 0, regGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

202

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_VMID),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

203

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PERSISTENT_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

204

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PIPE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

205

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

206

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2066

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2067

WREG32_SOC15(GC, 0, regSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

207

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2070

data = RREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2072

WREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

208

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2082

WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_BASE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2083

WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2084

WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2085

WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

209

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

210

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2100

WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_BASE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2101

WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2102

WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2103

WREG32_SOC15_OFFSET(GC, 0, regGDS_OA_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

211

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2115

uint32_t tcc_disable = RREG32_SOC15(GC, 0, regCGTS_TCC_DISABLE) |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2116

RREG32_SOC15(GC, 0, regCGTS_USER_TCC_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

212

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2129

WREG32_FIELD15_PREREG(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

213

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2137

tmp = RREG32_SOC15(GC, 0, regTA_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

214

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2147

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

215

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2153

WREG32_SOC15(GC, 0, regSH_MEM_BASES, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

216

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

217

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2172

return SOC15_REG_OFFSET(GC, 0, regCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2174

return SOC15_REG_OFFSET(GC, 0, regCP_INT_CNTL_RING1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

218

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

219

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2193

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2195

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2197

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2199

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

220

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

221

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2219

tmp = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

222

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2228

WREG32_SOC15_IP(GC, cp_int_cntl_reg, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

223

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2238

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

224

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_EVENTS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2240

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2242

WREG32_SOC15(GC, 0, regRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2249

u32 tmp = RREG32_SOC15(GC, 0, regRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

225

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_BASE_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2252

WREG32_SOC15(GC, 0, regRLC_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2257

WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2259

WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

226

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2268

rlc_pg_cntl = RREG32_SOC15(GC, 0, regRLC_PG_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

227

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

228

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2282

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, rlc_pg_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

229

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CNTL_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2292

WREG32_FIELD15_PREREG(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

230

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2301

tmp = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2304

WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL), tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

231

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2318

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

232

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_GDS_RESOURCE_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2322

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2325

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

233

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

234

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR_MEM),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2341

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2346

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

235

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2350

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2356

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

236

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2360

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2364

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2366

tmp = RREG32_SOC15(GC, 0, regRLC_LX6_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2369

WREG32_SOC15(GC, 0, regRLC_LX6_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

237

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

238

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_DW_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2385

WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

239

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2390

WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2394

WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2396

tmp = RREG32_SOC15(GC, 0, regRLC_GPM_THREAD_ENABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2398

WREG32_SOC15(GC, 0, regRLC_GPM_THREAD_ENABLE, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

240

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2404

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2409

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2413

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_UCODE_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2415

tmp = RREG32_SOC15(GC, 0, regRLC_GPU_IOV_F32_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2417

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_F32_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

242

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

243

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

244

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

245

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

246

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2468

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

247

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2471

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

248

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

249

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2494

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2496

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2500

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2515

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2520

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2523

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2525

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2538

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

254

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_ACTIVE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2540

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2544

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

255

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_VMID),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2559

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

256

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2564

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2567

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2569

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

257

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

258

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2582

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2585

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2589

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

259

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

260

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2604

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2608

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

261

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2611

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2613

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

262

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_CSMD_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2629

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

263

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2631

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2634

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2638

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

264

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2646

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

265

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2659

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

266

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_MAPPED),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2661

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2664

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

267

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUE_MGR_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2679

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

268

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_HQ_CONTROL0),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2682

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2689

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

269

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_HQ_STATUS0),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2696

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

270

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_MQD_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2705

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2707

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2709

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

271

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_MQD_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2715

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2718

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

272

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2721

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2723

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2726

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

273

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

274

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

275

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2751

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2753

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2756

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

276

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2760

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2768

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

277

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

278

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2781

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2783

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2787

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

280

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2802

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2805

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

281

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2812

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2819

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

282

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2828

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

283

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2830

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2832

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2838

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

284

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2841

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2844

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2846

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2849

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

285

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

286

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

287

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2874

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2878

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

288

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2880

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2883

WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2889

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, addr2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

289

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2890

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2893

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2896

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2899

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

290

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2900

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2907

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2909

WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

291

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2913

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

292

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2926

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2928

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

293

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2932

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

294

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

295

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2964

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2967

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2973

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2976

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2981

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2986

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2989

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

299

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL, 0x20000000, 0x20000000)

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2995

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

2998

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3003

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3008

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3011

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3017

tmp = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3022

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3029

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

304

SOC15_REG_GOLDEN_VALUE(GC, 0, regCGTT_GS_NGG_CLK_CTRL, 0x9fff8fff, 0x00000010),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3040

cp_status = RREG32_SOC15(GC, 0, regCP_STAT);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

305

SOC15_REG_GOLDEN_VALUE(GC, 0, regCGTT_WD_CLK_CTRL, 0xffff8fff, 0x00000010),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3050

bootload_status = RREG32_SOC15(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3053

bootload_status = RREG32_SOC15(GC, 0, regRLC_RLCS_BOOTLOAD_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

306

SOC15_REG_GOLDEN_VALUE(GC, 0, regCPF_GCR_CNTL, 0x0007ffff, 0x0000c200),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

307

SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL3, 0xffff001b, 0x00f01988),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

308

SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_CL_ENHANCE, 0xf0ffffff, 0x00880007),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

309

SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_SC_ENHANCE_3, 0xfffffffd, 0x00000008),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

310

SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_SC_VRS_SURFACE_CNTL_1, 0xfff891ff, 0x55480100),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

311

SOC15_REG_GOLDEN_VALUE(GC, 0, regTA_CNTL_AUX, 0xf7f7ffff, 0x01030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3116

u32 tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

312

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL2, 0xfcffffff, 0x0000000a)

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3120

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3123

if (RREG32_SOC15(GC, 0, regCP_STAT) == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3168

WREG32_SOC15(GC, 0, regCP_HYP_PFP_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3171

WREG32_SOC15(GC, 0, regCP_HYP_PFP_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3174

WREG32_SOC15(GC, 0, regCP_HYP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3240

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3242

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3245

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3249

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3257

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3270

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3272

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3275

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3290

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3293

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3300

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3307

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3316

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3318

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3320

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3326

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3329

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3332

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3334

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3337

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3386

WREG32_SOC15(GC, 0, regCP_HYP_ME_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3389

WREG32_SOC15(GC, 0, regCP_HYP_ME_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3392

WREG32_SOC15(GC, 0, regCP_HYP_ME_UCODE_ADDR, adev->gfx.me_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3458

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3460

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3463

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3467

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3475

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3488

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3490

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3494

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3509

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3512

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3519

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3526

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3535

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3537

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3539

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3545

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3548

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3551

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3553

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3556

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3610

WREG32_SOC15(GC, 0, regCP_MAX_CONTEXT,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3612

WREG32_SOC15(GC, 0, regCP_DEVICE_ID, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3646

SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3682

tmp = RREG32_SOC15(GC, 0, regGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3685

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3693

tmp = RREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3703

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3707

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3709

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3721

WREG32_SOC15(GC, 0, regCP_RB_WPTR_DELAY, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3724

WREG32_SOC15(GC, 0, regCP_RB_VMID, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3735

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3739

WREG32_SOC15(GC, 0, regCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3740

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3744

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3745

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3749

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3751

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3755

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3758

WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3759

WREG32_SOC15(GC, 0, regCP_RB0_BASE_HI, upper_32_bits(rb_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3761

WREG32_SOC15(GC, 0, regCP_RB_ACTIVE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3775

WREG32_SOC15(GC, 0, regCP_RB1_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3778

WREG32_SOC15(GC, 0, regCP_RB1_WPTR, lower_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3779

WREG32_SOC15(GC, 0, regCP_RB1_WPTR_HI, upper_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3782

WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3783

WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3786

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3788

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3792

WREG32_SOC15(GC, 0, regCP_RB1_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3795

WREG32_SOC15(GC, 0, regCP_RB1_BASE, rb_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3796

WREG32_SOC15(GC, 0, regCP_RB1_BASE_HI, upper_32_bits(rb_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3797

WREG32_SOC15(GC, 0, regCP_RB1_ACTIVE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3818

data = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3839

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3841

data = RREG32_SOC15(GC, 0, regCP_MEC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3852

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3898

WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3901

WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3904

WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3968

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3972

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3974

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3977

WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3983

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, adev->gfx.mec.mec_fw_data_gpu_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3984

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3987

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3990

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3993

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3994

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4001

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4003

WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4007

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4020

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4022

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4026

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4047

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4050

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4056

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4058

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4062

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4064

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4374

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4377

WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4380

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4382

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4386

WREG32_SOC15(GC, 0, regCP_HQD_EOP_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4390

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4394

if (RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4395

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4397

if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4401

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4403

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4405

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4407

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4412

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4414

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4418

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4422

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4424

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4428

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4432

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4434

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4438

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4440

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4445

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4447

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4451

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4455

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4457

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4461

WREG32_SOC15(GC, 0, regCP_HQD_VMID, mqd->cp_hqd_vmid);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4463

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4467

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4471

WREG32_FIELD15_PREREG(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4678

tmp = RREG32_SOC15(GC, 0, regCP_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4680

WREG32_SOC15(GC, 0, regCP_GFX_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4682

tmp = RREG32_SOC15(GC, 0, regCP_MEC_ISA_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4684

WREG32_SOC15(GC, 0, regCP_MEC_ISA_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4695

gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4731

data = RREG32_SOC15(GC, 0, regCPC_PSP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4733

WREG32_SOC15(GC, 0, regCPC_PSP_DEBUG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4735

data = RREG32_SOC15(GC, 0, regCPG_PSP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4737

WREG32_SOC15(GC, 0, regCPG_PSP_DEBUG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4835

adev->gfx.imu_fw_version = RREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4939

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, regGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4954

tmp = RREG32_SOC15(GC, 0, regGRBM_STATUS) &

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4973

WREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4975

val = RREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5005

tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5010

WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5018

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5019

WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5028

WREG32_SOC15(GC, 0, regCP_GFX_HQD_DEQUEUE_REQUEST, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5044

WREG32_SOC15(GC, 0, regCP_VMID_RESET, 0xfffffffe);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5048

RREG32_SOC15(GC, 0, regCP_VMID_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5049

RREG32_SOC15(GC, 0, regCP_VMID_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5050

RREG32_SOC15(GC, 0, regCP_VMID_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5061

if (!RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) &&

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5062

!RREG32_SOC15(GC, 0, regCP_GFX_HQD_ACTIVE))

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5072

grbm_soft_reset = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5083

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5085

grbm_soft_reset = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5096

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5098

tmp = RREG32_SOC15(GC, 0, regCP_SOFT_RESET_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5100

WREG32_SOC15(GC, 0, regCP_SOFT_RESET_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5102

WREG32_SOC15(GC, 0, regCP_ME_CNTL, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5103

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5106

if (!RREG32_SOC15(GC, 0, regCP_VMID_RESET))

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5115

tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5120

WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5168

clock_counter_hi_pre = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5169

clock_counter_lo = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5170

clock_counter_hi_after = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_HI);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5172

clock_counter_lo = (uint64_t)RREG32_SOC15(GC, 0, regCP_MES_MTIME_LO);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5199

SOC15_REG_OFFSET(GC, 0, regGDS_VMID0_BASE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5204

SOC15_REG_OFFSET(GC, 0, regGDS_VMID0_SIZE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5209

SOC15_REG_OFFSET(GC, 0, regGDS_GWS_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5214

SOC15_REG_OFFSET(GC, 0, regGDS_OA_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5295

rlc_cntl = RREG32_SOC15(GC, 0, regRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5307

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5311

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5320

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5331

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5339

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5350

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5358

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5369

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5377

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5392

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5399

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5403

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5410

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5428

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5441

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5444

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5459

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5462

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5477

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5480

def = data = RREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5487

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5489

data = RREG32_SOC15(GC, 0, regCP_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5494

WREG32_SOC15(GC, 0, regCP_INT_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5496

data = RREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5498

WREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5502

data = RREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5504

WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5508

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5517

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5520

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5528

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5530

data = RREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5532

WREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5536

data = RREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5538

WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5576

reg = SOC15_REG_OFFSET(GC, 0, regRLC_SPM_MC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5587

WREG32_SOC15_NO_KIQ(GC, 0, regRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5589

WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

561

uint32_t scratch = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5618

u32 data = RREG32_SOC15(GC, 0, regRLC_PG_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5625

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5636

WREG32_SOC15(GC, 0, regRLC_PG_DELAY_3, RLC_PG_DELAY_3_DEFAULT_GC_11_0_1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5724

data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5741

data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5750

data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5774

wptr = RREG32_SOC15(GC, 0, regCP_RB0_WPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5775

wptr += (u64)RREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI) << 32;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5791

WREG32_SOC15(GC, 0, regCP_RB0_WPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5793

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6023

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, regCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6318

cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6321

cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_INT_CNTL_RING1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6334

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6339

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6342

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6347

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6369

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6372

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6375

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6378

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6391

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6396

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6399

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6404

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6510

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6514

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6524

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6528

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6556

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6560

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6570

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6574

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6601

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6605

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6700

target = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6706

tmp = RREG32_SOC15(GC, 0, regCPC_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6709

WREG32_SOC15(GC, 0, regCPC_INT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6711

tmp = RREG32_SOC15_IP(GC, target);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6714

WREG32_SOC15_IP(GC, target, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6716

tmp = RREG32_SOC15(GC, 0, regCPC_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6719

WREG32_SOC15(GC, 0, regCPC_INT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6721

tmp = RREG32_SOC15_IP(GC, target);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6724

WREG32_SOC15_IP(GC, target, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6804

WREG32_SOC15(GC, 0, regCP_ME_CNTL, reset_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6805

WREG32_SOC15(GC, 0, regCP_ME_CNTL, clean_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6807

r = (RREG32(SOC15_REG_OFFSET(GC, 0, regCP_GFX_RS64_INSTR_PNTR1)) << 2) -

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6871

reset_pipe = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6904

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, reset_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6905

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, clean_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6906

r = (RREG32_SOC15(GC, 0, regCP_MEC_RS64_INSTR_PNTR) << 2) -

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6970

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, reset_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6971

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, clean_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6972

r = RREG32(SOC15_REG_OFFSET(GC, 0, regCP_MEC1_INSTR_PNTR));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7118

RREG32(SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7436

WREG32_SOC15(GC, 0, regGC_USER_SHADER_ARRAY_CONFIG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7442

data = RREG32_SOC15(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7443

data |= RREG32_SOC15(GC, 0, regGC_USER_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

866

ctx_reg_offset = SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

892

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

893

reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

894

reg_access_ctrl->scratch_reg2 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

895

reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG3);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

896

reg_access_ctrl->grbm_cntl = SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

897

reg_access_ctrl->grbm_idx = SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

898

reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, 0, regRLC_SPARE_INT_0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

974

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

977

return RREG32_SOC15(GC, 0, regSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

984

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

990

*(out++) = RREG32_SOC15(GC, 0, regSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0_3.c

44

rlc_status0 = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_RLCS_FED_STATUS_0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0_3.c

45

rlc_status1 = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_RLCS_FED_STATUS_1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0_3.c

91

rlc_status0 = RREG32_SOC15(GC, 0, regRLC_RLCS_FED_STATUS_0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

100

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

101

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HPD_STATUS0),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

102

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

103

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

104

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

105

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

106

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

107

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

108

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

109

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

110

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

111

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

112

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

113

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

114

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

115

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB2_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

116

SOC15_REG_ENTRY_STR(GC, 0, regCPF_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

117

SOC15_REG_ENTRY_STR(GC, 0, regCPC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

118

SOC15_REG_ENTRY_STR(GC, 0, regCPG_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

119

SOC15_REG_ENTRY_STR(GC, 0, regIA_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

120

SOC15_REG_ENTRY_STR(GC, 0, regIA_UTCL1_STATUS_2),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

121

SOC15_REG_ENTRY_STR(GC, 0, regPA_CL_CNTL_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

122

SOC15_REG_ENTRY_STR(GC, 0, regRMI_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

123

SOC15_REG_ENTRY_STR(GC, 0, regSQC_CACHES),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

124

SOC15_REG_ENTRY_STR(GC, 0, regSQG_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

125

SOC15_REG_ENTRY_STR(GC, 0, regWD_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

126

SOC15_REG_ENTRY_STR(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

127

SOC15_REG_ENTRY_STR(GC, 0, regGCVM_L2_PROTECTION_FAULT_STATUS_LO32),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

128

SOC15_REG_ENTRY_STR(GC, 0, regGCVM_L2_PROTECTION_FAULT_STATUS_HI32),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

129

SOC15_REG_ENTRY_STR(GC, 0, regCP_DEBUG),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

130

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

131

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

132

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1320

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_HI, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1321

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_LO, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1323

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_SIZE, rlc_g_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

133

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1339

data = RREG32_SOC15(GC, 0, regRLC_GPM_THREAD_ENABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

134

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1342

WREG32_SOC15(GC, 0, regRLC_GPM_THREAD_ENABLE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1343

WREG32_SOC15(GC, 0, regRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

135

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

136

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_RS64_INSTR_PNTR0),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

137

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_RS64_INSTR_PNTR1),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

138

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_RS64_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

140

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

141

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

142

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

143

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

144

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

145

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

146

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

147

SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

149

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE0),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

150

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE1),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

151

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE2),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

152

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE3)

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

157

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_VMID),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

158

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PERSISTENT_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

159

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PIPE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

160

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

161

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

162

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

163

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

164

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

165

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

166

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

167

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

168

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1685

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

169

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1692

gc_disabled_sa_mask = RREG32_SOC15(GC, 0, regGRBM_CC_GC_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1696

gc_user_disabled_sa_mask = RREG32_SOC15(GC, 0, regGRBM_GC_USER_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

170

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

171

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1711

gc_disabled_rb_mask = RREG32_SOC15(GC, 0, regCC_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1715

gc_user_disabled_rb_mask = RREG32_SOC15(GC, 0, regGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

172

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

173

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

174

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

175

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

176

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

177

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1779

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

178

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1780

WREG32_SOC15(GC, 0, regSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1783

data = RREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1785

WREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

179

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_EVENTS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

180

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_BASE_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1806

WREG32_FIELD15_PREREG(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

181

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1819

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

182

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1825

WREG32_SOC15(GC, 0, regSH_MEM_BASES, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

183

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

184

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CNTL_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1843

return SOC15_REG_OFFSET(GC, 0, regCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

185

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

186

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1862

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1864

return SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

187

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_GDS_RESOURCE_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

188

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1884

tmp = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

189

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR_MEM),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1893

WREG32_SOC15_IP(GC, cp_int_cntl_reg, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

190

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1903

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1905

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1907

WREG32_SOC15(GC, 0, regRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

191

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1914

u32 tmp = RREG32_SOC15(GC, 0, regRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1917

WREG32_SOC15(GC, 0, regRLC_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

192

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1922

WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1924

WREG32_FIELD15_PREREG(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

193

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_DW_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1933

rlc_pg_cntl = RREG32_SOC15(GC, 0, regRLC_PG_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

194

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1947

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, rlc_pg_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

195

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1957

WREG32_FIELD15_PREREG(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1966

tmp = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1969

WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL), tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

197

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

198

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1983

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1987

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

199

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

1990

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

200

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2006

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

201

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2011

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2015

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

202

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2021

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2025

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2029

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

203

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2031

tmp = RREG32_SOC15(GC, 0, regRLC_LX6_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2034

WREG32_SOC15(GC, 0, regRLC_LX6_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

204

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2083

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2086

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

209

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_ACTIVE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

210

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_VMID),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

211

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

212

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2120

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2123

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2129

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

213

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2132

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2137

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

214

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2142

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2145

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

215

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2151

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2154

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2159

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

216

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2164

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2167

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

217

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_CSMD_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2173

tmp = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2178

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

218

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2185

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

219

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2198

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

220

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2201

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2208

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

221

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_MAPPED),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2215

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

222

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_QUE_MGR_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2224

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

223

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_HQ_CONTROL0),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

224

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_HQ_STATUS0),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2240

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2243

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

225

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_MQD_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2250

tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2257

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

226

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_MQD_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2266

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

227

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

228

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2282

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2285

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

229

SOC15_REG_ENTRY_STR(GC, 0, regCP_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2299

cp_status = RREG32_SOC15(GC, 0, regCP_STAT);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

230

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2300

bootload_status = RREG32_SOC15(GC, 0, regRLC_RLCS_BOOTLOAD_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

231

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

232

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2329

u32 tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

233

SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2333

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2336

if (RREG32_SOC15(GC, 0, regCP_STAT) == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

235

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

236

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

237

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

238

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

239

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

240

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2404

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2406

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2409

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

241

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2413

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

242

SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2421

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

243

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2434

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2436

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2439

tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

244

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

245

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2455

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2457

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

246

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2463

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2466

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2469

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

247

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2471

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2474

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

248

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

249

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

250

SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

254

SOC15_REG_GOLDEN_VALUE(GC, 0, regDB_MEM_CONFIG, 0x0000000f, 0x0000000f),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2548

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

255

SOC15_REG_GOLDEN_VALUE(GC, 0, regCB_HW_CONTROL_1, 0x03000000, 0x03000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2550

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2553

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2557

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

256

SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL5, 0x00000070, 0x00000020)

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2565

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2578

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2580

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2584

tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

260

SOC15_REG_GOLDEN_VALUE(GC, 0, regDB_MEM_CONFIG, 0x00008000, 0x00008000),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2600

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2602

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2608

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2611

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2614

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2616

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2619

tmp = RREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2663

WREG32_SOC15(GC, 0, regCP_MAX_CONTEXT,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2665

WREG32_SOC15(GC, 0, regCP_DEVICE_ID, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2678

tmp = RREG32_SOC15(GC, 0, regGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2681

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2689

tmp = RREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2699

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2703

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2705

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2717

WREG32_SOC15(GC, 0, regCP_RB_WPTR_DELAY, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2720

WREG32_SOC15(GC, 0, regCP_RB_VMID, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2731

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2735

WREG32_SOC15(GC, 0, regCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2736

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2740

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2741

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2745

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2747

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2751

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2754

WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2755

WREG32_SOC15(GC, 0, regCP_RB0_BASE_HI, upper_32_bits(rb_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2757

WREG32_SOC15(GC, 0, regCP_RB_ACTIVE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2776

data = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2797

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2863

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2867

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2869

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2872

WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2878

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2881

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2885

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2887

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2894

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2896

WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2900

tmp = RREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2913

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2915

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2919

tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2942

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2945

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2951

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2953

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2957

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2959

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3251

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3254

WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3257

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3259

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3263

WREG32_SOC15(GC, 0, regCP_HQD_EOP_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3267

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3271

if (RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3272

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3274

if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3278

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3280

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3282

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3284

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3289

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3291

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3295

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3299

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3301

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3305

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3309

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3311

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3315

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3317

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3322

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3324

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3328

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3332

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3334

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3338

WREG32_SOC15(GC, 0, regCP_HQD_VMID, mqd->cp_hqd_vmid);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3340

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3344

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3348

WREG32_FIELD15_PREREG(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3540

gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3576

data = RREG32_SOC15(GC, 0, regCPC_PSP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3578

WREG32_SOC15(GC, 0, regCPC_PSP_DEBUG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3580

data = RREG32_SOC15(GC, 0, regCPG_PSP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3582

WREG32_SOC15(GC, 0, regCPG_PSP_DEBUG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3767

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3769

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3797

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, regGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3812

tmp = RREG32_SOC15(GC, 0, regGRBM_STATUS) &

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3908

rlc_cntl = RREG32_SOC15(GC, 0, regRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3921

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3925

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3935

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3946

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3954

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3963

reg = SOC15_REG_OFFSET(GC, 0, regRLC_SPM_MC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3973

WREG32_SOC15_NO_KIQ(GC, 0, regRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3975

WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3981

uint32_t reg = SOC15_REG_OFFSET(GC, 0, regRLC_SPM_MC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4046

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4059

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4062

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4077

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4080

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4095

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4098

def = data = RREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4105

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4107

data = RREG32_SOC15(GC, 0, regCP_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4112

WREG32_SOC15(GC, 0, regCP_INT_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4114

data = RREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4116

WREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4120

data = RREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4122

WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4126

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4135

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4138

def = data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4146

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4161

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4168

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4172

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4179

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4192

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4202

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4213

def = data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4221

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4279

data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4296

data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4305

data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4329

wptr = RREG32_SOC15(GC, 0, regCP_RB0_WPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4330

wptr += (u64)RREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI) << 32;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4346

WREG32_SOC15(GC, 0, regCP_RB0_WPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4348

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

453

uint32_t scratch = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4543

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, regCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4703

cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4716

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4721

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4724

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4729

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4751

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4754

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, regCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4767

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4772

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4775

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4780

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4886

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4890

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4900

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4904

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4932

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4936

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4946

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4950

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4977

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4981

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5277

WREG32_SOC15(GC, 0, regCP_ME_CNTL, reset_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5278

WREG32_SOC15(GC, 0, regCP_ME_CNTL, clean_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5280

r = (RREG32(SOC15_REG_OFFSET(GC, 0, regCP_GFX_RS64_INSTR_PNTR1)) << 2) -

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5343

reset_pipe = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5375

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, reset_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5376

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, clean_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5377

r = (RREG32_SOC15(GC, 0, regCP_MEC_RS64_INSTR_PNTR) << 2) -

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5396

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, reset_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5397

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, clean_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5680

WREG32_SOC15(GC, 0, regGC_USER_SHADER_ARRAY_CONFIG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5686

data = RREG32_SOC15(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5687

data |= RREG32_SOC15(GC, 0, regGC_USER_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

735

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

736

reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

737

reg_access_ctrl->scratch_reg2 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

738

reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG3);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

739

reg_access_ctrl->grbm_cntl = SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

740

reg_access_ctrl->grbm_idx = SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

741

reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, 0, regRLC_SPARE_INT_0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

817

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

820

return RREG32_SOC15(GC, 0, regSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

827

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

833

*(out++) = RREG32_SOC15(GC, 0, regSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

86

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

87

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS2),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

88

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS3),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

89

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

90

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

91

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

92

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

93

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

94

SOC15_REG_ENTRY_STR(GC, 0, regCP_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

95

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

96

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

97

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_BUSY_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

98

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_BUSY_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

99

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1057

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 0x2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1058

WREG32_SOC15(GC, 0, mmSPI_COMPUTE_QUEUE_RESET, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1061

if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1197

uint32_t scratch = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

154

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

155

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

156

SOC15_REG_ENTRY_STR(GC, 0, mmCP_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

157

SOC15_REG_ENTRY_STR(GC, 0, mmCP_STALLED_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

158

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

159

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

160

SOC15_REG_ENTRY_STR(GC, 0, mmCP_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

161

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

162

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

163

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPF_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

164

SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

165

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

166

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

167

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

168

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

169

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1691

WREG32_SOC15(GC, 0, mmRLC_PG_ALWAYS_ON_CU_MASK, cu_bitmap);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

170

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB0_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1701

WREG32_SOC15(GC, 0, mmRLC_LB_ALWAYS_ACTIVE_CU_MASK, cu_bitmap);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

171

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1714

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1715

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x0333A5A7);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1716

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_3, 0x00000077);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1717

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_4, (0x30 | 0x40 << 8 | 0x02FA << 16));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

172

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1720

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1723

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_MAX, 0x00000500);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1728

WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

173

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB1_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1734

WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1737

data = RREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

174

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1740

WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

175

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1752

WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

176

SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB2_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1763

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1764

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x033388F8);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1765

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_3, 0x00000077);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1766

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_4, (0x10 | 0x27 << 8 | 0x02FA << 16));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1769

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

177

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1772

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_MAX, 0x00000800);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1777

WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

178

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1783

WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1786

data = RREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1789

WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

179

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

180

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_CMD_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1801

WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1809

WREG32_FIELD15(GC, 0, RLC_LB_CNTL, LOAD_BALANCE_ENABLE, enable ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

181

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

182

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1825

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1826

reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1827

reg_access_ctrl->scratch_reg2 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1828

reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1829

reg_access_ctrl->grbm_cntl = SOC15_REG_OFFSET(GC, 0, mmGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

183

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1830

reg_access_ctrl->grbm_idx = SOC15_REG_OFFSET(GC, 0, mmGRBM_GFX_INDEX);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1831

reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, 0, mmRLC_SPARE_INT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

184

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

185

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

186

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB2_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

187

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

188

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

189

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB1_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

190

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

191

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

192

SOC15_REG_ENTRY_STR(GC, 0, mmCP_IB2_BUFSZ),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

193

SOC15_REG_ENTRY_STR(GC, 0, mmCPF_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1931

WREG32_SOC15_RLC(GC, 0, mmSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1936

return RREG32_SOC15(GC, 0, mmSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

194

SOC15_REG_ENTRY_STR(GC, 0, mmCPC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1943

WREG32_SOC15_RLC(GC, 0, mmSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

195

SOC15_REG_ENTRY_STR(GC, 0, mmCPG_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1951

*(out++) = RREG32_SOC15(GC, 0, mmSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

196

SOC15_REG_ENTRY_STR(GC, 0, mmGDS_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

197

SOC15_REG_ENTRY_STR(GC, 0, mmGDS_VM_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

198

SOC15_REG_ENTRY_STR(GC, 0, mmIA_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

199

SOC15_REG_ENTRY_STR(GC, 0, mmIA_UTCL1_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

200

SOC15_REG_ENTRY_STR(GC, 0, mmPA_CL_CNTL_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

201

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

202

SOC15_REG_ENTRY_STR(GC, 0, mmRMI_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

203

SOC15_REG_ENTRY_STR(GC, 0, mmSQC_DCACHE_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

204

SOC15_REG_ENTRY_STR(GC, 0, mmSQC_ICACHE_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

205

SOC15_REG_ENTRY_STR(GC, 0, mmSQ_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2051

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

206

SOC15_REG_ENTRY_STR(GC, 0, mmTCP_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

207

SOC15_REG_ENTRY_STR(GC, 0, mmWD_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2078

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

208

SOC15_REG_ENTRY_STR(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2088

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

209

SOC15_REG_ENTRY_STR(GC, 0, mmVM_L2_PROTECTION_FAULT_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2099

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

210

SOC15_REG_ENTRY_STR(GC, 0, mmCP_DEBUG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

211

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

212

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

213

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC1_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

214

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC2_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

215

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

216

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

217

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

218

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

219

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_COMMAND),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

220

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_MESSAGE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

221

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

222

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_ARGUMENT_2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

223

SOC15_REG_ENTRY_STR(GC, 0, mmSMU_RLC_RESPONSE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

224

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

225

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

226

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_INT_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

227

SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_GENERAL_6),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

229

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE0),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

230

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

231

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

232

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

234

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

235

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

236

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

237

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

238

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

239

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

240

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

241

SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

242

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

243

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

244

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

245

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

246

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

247

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

248

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

249

SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

250

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

251

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2518

WREG32_SOC15_RLC_SHADOW(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

252

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2525

data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2526

data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

253

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

254

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

255

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

256

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

257

SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2577

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_CONFIG), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2578

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2580

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA0), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2581

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA1), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2607

WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, sh_mem_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2608

WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2616

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2617

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2618

WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2619

WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

262

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_VMID),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

263

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_ACTIVE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2634

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2635

WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2636

WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2637

WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

264

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PERSISTENT_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2647

tmp = RREG32_SOC15(GC, 0, mmSQ_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

265

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PIPE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2650

WREG32_SOC15(GC, 0, mmSQ_CONFIG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

266

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2667

WREG32_FIELD15_RLC(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

267

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2675

adev->gfx.config.db_debug2 = RREG32_SOC15(GC, 0, mmDB_DEBUG2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

268

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2688

WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2689

WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

269

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2695

WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

270

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2700

WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

271

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

272

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2722

if (RREG32_SOC15(GC, 0, mmRLC_SERDES_CU_MASTER_BUSY) == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

273

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

274

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2744

if ((RREG32_SOC15(GC, 0, mmRLC_SERDES_NONCU_MASTER_BUSY) & mask) == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

275

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2757

tmp= RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

276

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2765

WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

277

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2772

WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2774

WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2776

WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_LENGTH),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

278

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

279

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

280

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

281

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

282

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

283

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

284

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2847

tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2849

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL), tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

285

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_EVENTS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2852

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_ARAM_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2855

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_ARAM_DATA),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2859

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

286

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_BASE_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2864

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

287

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2870

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2874

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2875

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2879

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, j);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

288

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

289

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2892

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2894

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), list_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2897

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

290

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CNTL_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2900

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2906

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_ADDR_0)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

291

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2910

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_DATA_0)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

292

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2922

WREG32_FIELD15(GC, 0, RLC_SRM_CNTL, SRM_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

293

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_GDS_RESOURCE_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

294

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

295

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_WPTR_MEM),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2959

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_RB_WPTR_POLL_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

296

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2962

WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_RB_WPTR_POLL_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

297

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2970

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2972

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_2));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2975

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_2), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2977

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

298

SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_GFX_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2980

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2982

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_AUTO_PG_CTRL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2987

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_AUTO_PG_CTRL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

299

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2999

default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

300

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3004

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

301

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3013

default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3018

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

302

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3027

default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

303

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3032

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

304

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3040

default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3045

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

305

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3053

default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3058

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

306

SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3062

data = RREG32(SOC15_REG_OFFSET(GC, 0, mmDB_RENDER_CONTROL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3070

default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3075

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3083

default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3088

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3113

WREG32_SOC15(GC, 0, mmRLC_JUMP_TABLE_RESTORE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3121

WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3128

WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3130

WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3140

WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3151

rlc_ucode_ver = RREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_6);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3157

WREG32_SOC15(GC, 0, mmRLC_GPM_TIMER_INT_3, 0x9C4);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3161

WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_12, 0x100);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3182

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3185

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3186

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3203

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3243

u32 tmp = RREG32_SOC15(GC, 0, mmCP_ME_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3257

WREG32_SOC15_RLC(GC, 0, mmCP_ME_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3290

WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3292

WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3293

WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3300

WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3302

WREG32_SOC15(GC, 0, mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3303

WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3310

WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3312

WREG32_SOC15(GC, 0, mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3313

WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3326

WREG32_SOC15(GC, 0, mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3327

WREG32_SOC15(GC, 0, mmCP_DEVICE_ID, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3379

(SOC15_REG_OFFSET(GC, 0, mmVGT_INDEX_TYPE) - PACKET3_SET_UCONFIG_REG_START));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3396

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3399

WREG32_SOC15(GC, 0, mmCP_RB_VMID, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3409

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3413

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3414

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3418

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3419

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3422

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3423

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3426

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3429

WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3430

WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3432

tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3441

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3445

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3447

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3460

WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3462

WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3498

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3500

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3502

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3506

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3509

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3512

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3526

tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3529

WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3576

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3583

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3613

tmp = RREG32_SOC15(GC, 0, mmCP_MQD_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3623

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3650

mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3655

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3660

tmp = RREG32_SOC15(GC, 0, mmCP_HQD_IB_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3666

mqd->cp_hqd_quantum = RREG32_SOC15(GC, 0, mmCP_HQD_QUANTUM);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3684

WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3686

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3688

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3692

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3696

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3700

if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3701

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3703

if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3707

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3709

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3711

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3713

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3718

WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3720

WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3724

WREG32_SOC15_RLC(GC, 0, mmCP_MQD_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3728

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3730

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3734

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3738

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3740

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3744

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3746

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3751

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3759

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3762

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3766

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3770

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3772

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3776

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3778

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3782

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3786

WREG32_FIELD15(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3797

if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3799

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3802

if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3811

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3814

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3818

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_IQ_TIMER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3819

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_IB_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3820

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3821

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3822

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3823

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3824

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3825

WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4001

tmp = RREG32_SOC15(GC, 0, mmTCP_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4008

WREG32_SOC15(GC, 0, mmTCP_ADDR_CONFIG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4070

WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4114

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, mmGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4141

tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4160

tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4177

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4180

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4181

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4186

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4187

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4297

WREG32_SOC15(GC, 0, mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4298

clock = (uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_LSB) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4299

((uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4318

SOC15_REG_OFFSET(GC, 0, mmGDS_VMID0_BASE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4323

SOC15_REG_OFFSET(GC, 0, mmGDS_VMID0_SIZE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4328

SOC15_REG_OFFSET(GC, 0, mmGDS_GWS_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4333

SOC15_REG_OFFSET(GC, 0, mmGDS_OA_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4470

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4471

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4472

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Y), 4 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4473

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4474

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0x3f },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4475

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x400000 }, /* 64KB LDS */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4476

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE0), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4477

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE1), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4478

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE2), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4479

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE3), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4480

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE4), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4481

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE5), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4482

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE6), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4483

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE7), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4487

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4488

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4489

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Y), 4 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4490

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4491

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0xbf },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4492

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x400000 }, /* 64KB LDS */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4493

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE0), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4494

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE1), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4495

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE2), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4496

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE3), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4497

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE4), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4498

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE5), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4499

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE6), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4500

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE7), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4504

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4505

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4506

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Y), 8 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4507

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4508

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0x240 }, /* (80 GPRS) */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4509

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x0 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4510

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE0), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4511

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE1), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4512

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE2), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4513

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE3), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4514

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE4), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4515

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE5), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4516

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE6), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4517

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE7), 0x000000ff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4521

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4522

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4523

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Y), 8 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4524

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4525

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0x240 }, /* (80 GPRS) */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4526

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC2), 0x0 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4527

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE0), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4528

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE1), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4529

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE2), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4530

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE3), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4531

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE4), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4532

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE5), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4533

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE6), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4534

{ SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_STATIC_THREAD_MGMT_SE7), 0x0000ff00 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4538

{ SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_SCRATCH_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4539

{ SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_UCODE_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4540

{ SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4541

{ SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_TAG_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4542

{ SOC15_REG_ENTRY(GC, 0, mmCPG_EDC_DMA_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4543

{ SOC15_REG_ENTRY(GC, 0, mmCPG_EDC_TAG_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4544

{ SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4545

{ SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4546

{ SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4547

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4548

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_GRBM_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4549

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_DED), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4550

{ SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT), 0, 4, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4551

{ SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT), 0, 4, 6},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4552

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_DED_CNT), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4553

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_INFO), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4554

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_SEC_CNT), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4555

{ SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT), 0, 1, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4556

{ SOC15_REG_ENTRY(GC, 0, mmTCP_ATC_EDC_GATCL1_CNT), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4557

{ SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4558

{ SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4559

{ SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4560

{ SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2), 0, 4, 6},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4561

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4562

{ SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT), 0, 4, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4563

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4564

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT), 0, 1, 1},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4565

{ SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT), 0, 1, 32},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4566

{ SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2), 0, 1, 32},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4567

{ SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT), 0, 1, 72},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4568

{ SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2), 0, 1, 16},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4569

{ SOC15_REG_ENTRY(GC, 0, mmTCA_EDC_CNT), 0, 1, 2},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4570

{ SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3), 0, 4, 6},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4589

WREG32_SOC15(GC, 0, mmGDS_VMID0_BASE, 0x00000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4590

WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4615

WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, 0x00000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4698

ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4726

ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4754

ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4888

rlc_setting = RREG32_SOC15(GC, 0, mmRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4902

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4906

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4917

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4965

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4978

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4984

def = data = RREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4987

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4991

def = data = RREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4994

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4999

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5010

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5013

data = RREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5016

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5020

data = RREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5023

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5039

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5044

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5047

def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5059

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5062

def = RREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5066

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5069

def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5075

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5085

def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5094

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5097

def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5109

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5112

def = RREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5116

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5118

def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5123

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5159

reg = SOC15_REG_OFFSET(GC, 0, mmRLC_SPM_MC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5163

data = RREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5169

WREG32_SOC15_NO_KIQ(GC, 0, mmRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5171

WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5308

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5313

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5322

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5327

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5333

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5357

wptr = RREG32_SOC15(GC, 0, mmCP_RB0_WPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5358

wptr += (u64)RREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI) << 32;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5373

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5374

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5659

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5752

SOC15_REG_OFFSET(GC, 0, mmCP_VMID_PREEMPT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5930

WREG32_SOC15(GC, 0, mmSQ_CMD, value);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5940

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5964

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5967

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5970

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5973

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5986

mec_int_cntl = RREG32_SOC15_IP(GC,mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5989

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5992

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5995

WREG32_SOC15_IP(GC, mec_int_cntl_reg, mec_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6015

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6017

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6019

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6021

return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6038

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6047

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6051

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6074

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6083

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6087

WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6107

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6119

WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6123

WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6133

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6142

WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6292

{ "CPC_SCRATCH", SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_SCRATCH_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6296

{ "CPC_UCODE", SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_UCODE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6300

{ "CPF_ROQ_ME1", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6304

{ "CPF_ROQ_ME2", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6308

{ "CPF_TAG", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_TAG_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6312

{ "CPG_DMA_ROQ", SOC15_REG_ENTRY(GC, 0, mmCPG_EDC_DMA_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6316

{ "CPG_DMA_TAG", SOC15_REG_ENTRY(GC, 0, mmCPG_EDC_DMA_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6320

{ "CPG_TAG", SOC15_REG_ENTRY(GC, 0, mmCPG_EDC_TAG_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6324

{ "DC_CSINVOC", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6328

{ "DC_RESTORE", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6332

{ "DC_STATE", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6336

{ "GDS_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6340

{ "GDS_INPUT_QUEUE", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6344

{ "GDS_ME0_CS_PIPE_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6349

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6354

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6359

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6364

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6369

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6374

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6378

{ "SPI_SR_MEM", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6382

{ "TA_FS_DFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6386

{ "TA_FS_AFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6390

{ "TA_FL_LFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6394

{ "TA_FX_LFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6398

{ "TA_FS_CFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6402

{ "TCA_HOLE_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6406

{ "TCA_REQ_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6410

{ "TCC_CACHE_DATA", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6414

{ "TCC_CACHE_DIRTY", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6418

{ "TCC_HIGH_RATE_TAG", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6422

{ "TCC_LOW_RATE_TAG", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6426

{ "TCC_SRC_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6430

{ "TCC_IN_USE_DEC", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6434

{ "TCC_IN_USE_TRANSFER", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6438

{ "TCC_LATENCY_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6442

{ "TCC_RETURN_DATA", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6446

{ "TCC_RETURN_CONTROL", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6450

{ "TCC_UC_ATOMIC_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6454

{ "TCC_WRITE_RETURN", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6458

{ "TCC_WRITE_CACHE_READ", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6462

{ "TCC_SRC_FIFO_NEXT_RAM", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6466

{ "TCC_LATENCY_FIFO_NEXT_RAM", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6470

{ "TCC_CACHE_TAG_PROBE_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6474

{ "TCC_WRRET_TAG_WRITE_RETURN", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6478

{ "TCC_ATOMIC_RETURN_BUFFER", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6482

{ "TCI_WRITE_RAM", SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6486

{ "TCP_CACHE_RAM", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6490

{ "TCP_LFIFO_RAM", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6494

{ "TCP_CMD_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6498

{ "TCP_VM_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6502

{ "TCP_DB_RAM", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6506

{ "TCP_UTCL1_LFIFO0", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6510

{ "TCP_UTCL1_LFIFO1", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6514

{ "TD_SS_FIFO_LO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6518

{ "TD_SS_FIFO_HI", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6522

{ "TD_CS_FIFO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6526

{ "SQ_LDS_D", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6530

{ "SQ_LDS_I", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6534

{ "SQ_SGPR", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6538

{ "SQ_VGPR0", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6542

{ "SQ_VGPR1", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6546

{ "SQ_VGPR2", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6550

{ "SQ_VGPR3", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6554

{ "SQC_DATA_CU0_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6558

{ "SQC_DATA_CU0_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6562

{ "SQC_DATA_CU1_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6566

{ "SQC_DATA_CU1_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6570

{ "SQC_DATA_CU2_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6574

{ "SQC_DATA_CU2_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6578

{ "SQC_INST_BANKA_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6582

{ "SQC_INST_BANKA_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6586

{ "SQC_DATA_BANKA_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6590

{ "SQC_DATA_BANKA_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6594

{ "SQC_INST_BANKA_UTCL1_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6598

{ "SQC_INST_BANKA_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6602

{ "SQC_DATA_BANKA_HIT_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6606

{ "SQC_DATA_BANKA_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6610

{ "SQC_DATA_BANKA_DIRTY_BIT_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6614

{ "SQC_INST_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6618

{ "SQC_INST_BANKB_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6622

{ "SQC_INST_BANKB_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6626

{ "SQC_DATA_BANKB_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6630

{ "SQC_DATA_BANKB_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6634

{ "SQC_INST_BANKB_UTCL1_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6638

{ "SQC_INST_BANKB_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6642

{ "SQC_DATA_BANKB_HIT_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6646

{ "SQC_DATA_BANKB_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6650

{ "SQC_DATA_BANKB_DIRTY_BIT_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6654

{ "EA_DRAMRD_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6658

{ "EA_DRAMWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6662

{ "EA_DRAMWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6666

{ "EA_RRET_TAGMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6670

{ "EA_WRET_TAGMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6674

{ "EA_DRAMRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6678

{ "EA_DRAMWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6682

{ "EA_IORD_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6686

{ "EA_IOWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6690

{ "EA_IOWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6694

{ "GMIRD_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6698

{ "GMIWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6702

{ "GMIWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6706

{ "GMIRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6710

{ "GMIWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6714

{ "MAM_D0MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6718

{ "MAM_D1MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6722

{ "MAM_D2MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6726

{ "MAM_D3MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

678

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xf00fffff, 0x00000400),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

679

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0x80000000, 0x80000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

680

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_GPU_ID, 0x0000000f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

681

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3, 0x00000003, 0x82400024),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

682

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

683

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

684

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSH_MEM_CONFIG, 0x00001000, 0x00001000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

685

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_CU_0, 0x0007ffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6855

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6856

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6857

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6858

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6859

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

686

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_CU_1, 0x0007ffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6860

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6861

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6862

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6865

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6866

data = RREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

687

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_EN_CU_0, 0x01ffffff, 0x00ffff87),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

688

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_EN_CU_1, 0x01ffffff, 0x00ffff8f),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6884

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6885

data = RREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

689

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQC_CONFIG, 0x03000000, 0x020a2000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

690

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6905

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6906

data = RREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

691

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_HI, 0xffffffff, 0x4a2c0e68),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6918

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6919

data = RREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

692

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_LO, 0xffffffff, 0xb5d3f197),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

693

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_CACHE_INVALIDATION, 0x3fff3af3, 0x19200000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6938

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6939

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

694

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_GS_MAX_WAVE_ID, 0x00000fff, 0x000003ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6940

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

6941

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

695

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_MEC1_F32_INT_DIS, 0x00000800, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

696

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_MEC2_F32_INT_DIS, 0x00000800, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

697

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_DEBUG, 0x00008000, 0x00008000)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7005

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7008

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7009

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7010

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7011

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7012

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7013

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7014

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7015

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7018

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7019

RREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

702

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0x0000f000, 0x00012107),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7023

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7024

RREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7028

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7029

RREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

703

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_3, 0x30000000, 0x10000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7033

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7034

RREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7037

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7038

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7039

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

704

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPC_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7040

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

705

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

706

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

707

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xffff77ff, 0x2a114042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

708

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG_READ, 0xffff77ff, 0x2a114042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

709

SOC15_REG_GOLDEN_VALUE(GC, 0, mmIA_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

710

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0x00008000, 0x00048000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

711

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_0, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7114

wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7117

wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

712

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_1, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7120

wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7123

wcl_cs_reg = SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_CS3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

713

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_2, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

714

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_PREWALKER_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7146

SOC15_REG_OFFSET(GC, 0, mmSPI_WCL_PIPE_PERCENT_GFX),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

715

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

716

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_UTCL1_CNTL2, 0x00030000, 0x00020000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

717

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x0000000f, 0x01000107),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

718

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x00001800, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

719

SOC15_REG_GOLDEN_VALUE(GC, 0, mmWD_UTCL1_CNTL, 0x08000000, 0x08000080)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7213

if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

724

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_DCC_CONFIG, 0x0f000080, 0x04000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

725

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0x0f000000, 0x0a000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

726

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_3, 0x30000000, 0x10000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

727

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xf3e777ff, 0x22014042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

728

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG_READ, 0xf3e777ff, 0x22014042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

729

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0x00003e00, 0x00000400),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

730

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0xff840000, 0x04040000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

731

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_UTCL1_CNTL2, 0x00030000, 0x00030000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

732

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffff010f, 0x01000107),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7324

RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME2_HEADER_DUMP));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

733

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0x000b0000, 0x000b0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

734

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01000000, 0x01000000)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

739

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

740

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPC_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

741

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

742

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

743

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xf00fffff, 0x00000420),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

744

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_GPU_ID, 0x0000000f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

745

SOC15_REG_GOLDEN_VALUE(GC, 0, mmIA_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

746

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3, 0x00000003, 0x82400024),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

747

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

748

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

749

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_0, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

750

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_1, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

751

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_2, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

752

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_PREWALKER_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

753

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

754

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

755

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

756

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_LO, 0xffffffff, 0x00003120),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

757

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_CACHE_INVALIDATION, 0x3fff3af3, 0x19200000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

758

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_GS_MAX_WAVE_ID, 0x00000fff, 0x000000ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

759

SOC15_REG_GOLDEN_VALUE(GC, 0, mmWD_UTCL1_CNTL, 0x08000000, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

760

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_MEC1_F32_INT_DIS, 0x00000800, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

761

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_MEC2_F32_INT_DIS, 0x00000800, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

762

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_DEBUG, 0x00008000, 0x00008000)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

767

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_3, 0x30000000, 0x10000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

768

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xffff77ff, 0x24000042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

769

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG_READ, 0xffff77ff, 0x24000042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

770

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0xffffffff, 0x04048000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

771

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_MODE_CNTL_1, 0x06000000, 0x06000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

772

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_UTCL1_CNTL2, 0x00030000, 0x00020000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

773

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x00000800)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7739

WREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7746

data = RREG32_SOC15(GC, 0, mmCC_GC_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7747

data |= RREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

778

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_DCC_CONFIG, 0xff7fffff, 0x04000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

779

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

780

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0xff7fffff, 0x0a000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

781

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPC_UTCL1_CNTL, 0x7f0fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

782

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_UTCL1_CNTL, 0xff8fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

783

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_UTCL1_CNTL, 0x7f8fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

784

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xffff77ff, 0x26013041),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

785

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG_READ, 0xffff77ff, 0x26013041),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

786

SOC15_REG_GOLDEN_VALUE(GC, 0, mmIA_UTCL1_CNTL, 0x3f8fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

787

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0xffffffff, 0x04040000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

788

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_0, 0xff0fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

789

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_1, 0xff0fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

790

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_GPM_UTCL1_CNTL_2, 0xff0fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

791

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_PREWALKER_UTCL1_CNTL, 0xff0fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

792

SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0xff0fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

793

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

794

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_LO, 0xffffffff, 0x00000010),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

795

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x01000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

796

SOC15_REG_GOLDEN_VALUE(GC, 0, mmWD_UTCL1_CNTL, 0x3f8fffff, 0x08000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

801

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

802

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0xff7fffff, 0x0a000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

803

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xf00fffff, 0x00000400),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

804

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xf3e777ff, 0x24000042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

805

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG_READ, 0xf3e777ff, 0x24000042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

806

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

807

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0xffffffff, 0x04040000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

808

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

809

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

810

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

811

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_LO, 0xffffffff, 0x00003120),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

812

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCEA_PROBE_MAP, 0xffffffff, 0x0000cccc),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

817

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0xffffffff, 0x000001ff),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

818

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_INDEX, 0xffffffff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

819

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_DATA, 0xffffffff, 0x2544c382)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

824

SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xf00fffff, 0x00000420),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

825

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_GPU_ID, 0x0000000f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

826

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3, 0x00000003, 0x82400024),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

827

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

828

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

829

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSH_MEM_CONFIG, 0x00001000, 0x00001000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

830

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_CU_0, 0x0007ffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

831

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_CU_1, 0x0007ffff, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

832

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_EN_CU_0, 0x01ffffff, 0x0000ff87),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

833

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_EN_CU_1, 0x01ffffff, 0x0000ff8f),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

834

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQC_CONFIG, 0x03000000, 0x020a2000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

835

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x010b0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

836

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_HI, 0xffffffff, 0x4a2c0e68),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

837

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_LO, 0xffffffff, 0xb5d3f197),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

838

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_CACHE_INVALIDATION, 0x3fff3af3, 0x19200000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

839

SOC15_REG_GOLDEN_VALUE(GC, 0, mmVGT_GS_MAX_WAVE_ID, 0x00000fff, 0x000003ff)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

844

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_DCC_CONFIG, 0x00000080, 0x04000080),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

845

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

846

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0x0f000000, 0x0a000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

847

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xffff77ff, 0x24104041),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

848

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG_READ, 0xffff77ff, 0x24104041),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

849

SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_1, 0xffffffff, 0x04040000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

850

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0xffff03ff, 0x01000107),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

851

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

852

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_LO, 0xffffffff, 0x76325410),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

853

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x01000000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

854

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_MEC1_F32_INT_DIS, 0x00000800, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

855

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_MEC2_F32_INT_DIS, 0x00000800, 0x00000800),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

856

SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_DEBUG, 0x00008000, 0x00008000)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

861

SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xffff77ff, 0x2a114042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

862

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfffffeef, 0x10b0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

863

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_0_ARCT, 0x3fffffff, 0x346f0a4e),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

864

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_1_ARCT, 0x3fffffff, 0x1c642ca),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

865

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_2_ARCT, 0x3fffffff, 0x26f45098),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

866

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_3_ARCT, 0x3fffffff, 0x2ebd9fe3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

867

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_4_ARCT, 0x3fffffff, 0xb90f5b1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

868

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CHAN_STEER_5_ARCT, 0x3ff, 0x135),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

869

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xffffffff, 0x011A0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

870

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_FIFO_SIZES, 0xffffffff, 0x00000f00),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

871

SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_UTCL1_CNTL1, 0x30000000, 0x30000000)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

875

{SOC15_REG_ENTRY(GC, 0, mmGRBM_GFX_INDEX)},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

876

{SOC15_REG_ENTRY(GC, 0, mmSQ_IND_INDEX)},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

116

WREG32_SOC15_RLC_SHADOW(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

121

{ "CPC_SCRATCH", SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_SCRATCH_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

124

{ "CPC_UCODE", SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_UCODE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

127

{ "CPC_DC_STATE_RAM_ME1", SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

131

SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

135

SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

139

SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

143

SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

148

{ "CPF_ROQ_ME2", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

151

{ "CPF_ROQ_ME1", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

154

{ "CPF_TCIU_TAG", SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_TAG_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

159

{ "GDS_GRBM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_GRBM_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

162

{ "GDS_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

165

{ "GDS_PHY_CMD_RAM_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

168

{ "GDS_PHY_DATA_RAM_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

171

{ "GDS_ME0_CS_PIPE_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

175

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

179

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

183

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

187

SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

192

{ "SPI_SR_MEM", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

195

{ "SPI_GDS_EXPREQ", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

198

{ "SPI_WB_GRANT_30", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

201

{ "SPI_WB_GRANT_61", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

204

{ "SPI_LIFE_CNT", SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

209

{ "SQ_SGPR", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

212

{ "SQ_LDS_D", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

215

{ "SQ_LDS_I", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

218

{ "SQ_VGPR0", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

221

{ "SQ_VGPR1", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

224

{ "SQ_VGPR2", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

227

{ "SQ_VGPR3", SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

232

{ "SQC_INST_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

235

{ "SQC_DATA_CU0_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

238

{ "SQC_DATA_CU0_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

241

{ "SQC_DATA_CU1_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

244

{ "SQC_DATA_CU1_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

247

{ "SQC_DATA_CU2_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

250

{ "SQC_DATA_CU2_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

253

{ "SQC_INST_BANKA_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

257

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

263

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

267

{ "SQC_INST_BANKA_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

270

{ "SQC_DATA_BANKA_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

274

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

278

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

282

{ "SQC_DATA_BANKA_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

285

{ "SQC_INST_BANKB_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

289

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

295

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

299

{ "SQC_INST_BANKB_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

302

{ "SQC_DATA_BANKB_TAG_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

306

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

310

SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

314

{ "SQC_DATA_BANKB_BANK_RAM", SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

319

{ "TA_FS_DFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

322

{ "TA_FS_AFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

325

{ "TA_FL_LFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

328

{ "TA_FX_LFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

331

{ "TA_FS_CFIFO", SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

336

{ "TCA_HOLE_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

339

{ "TCA_REQ_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

344

{ "TCC_CACHE_DATA", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

347

{ "TCC_CACHE_DIRTY", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

350

{ "TCC_HIGH_RATE_TAG", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

353

{ "TCC_LOW_RATE_TAG", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

356

{ "TCC_IN_USE_DEC", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

359

{ "TCC_IN_USE_TRANSFER", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

362

{ "TCC_RETURN_DATA", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

365

{ "TCC_RETURN_CONTROL", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

368

{ "TCC_UC_ATOMIC_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

371

{ "TCC_WRITE_RETURN", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

374

{ "TCC_WRITE_CACHE_READ", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

377

{ "TCC_SRC_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

380

{ "TCC_CACHE_TAG_PROBE_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

383

{ "TCC_LATENCY_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

386

{ "TCC_LATENCY_FIFO_NEXT_RAM", SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

391

{ "TCI_WRITE_RAM", SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

396

{ "TCP_CACHE_RAM", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

399

{ "TCP_LFIFO_RAM", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

402

{ "TCP_CMD_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

405

{ "TCP_VM_FIFO", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

408

{ "TCP_DB_RAM", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

41

{ SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_SCRATCH_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

410

{ "TCP_UTCL1_LFIFO0", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

413

{ "TCP_UTCL1_LFIFO1", SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

418

{ "TD_SS_FIFO_LO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

42

{ SOC15_REG_ENTRY(GC, 0, mmCPC_EDC_UCODE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

421

{ "TD_SS_FIFO_HI", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

424

{ "TD_CS_FIFO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

429

{ "EA_DRAMRD_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

432

{ "EA_DRAMWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

435

{ "EA_DRAMWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

438

{ "EA_RRET_TAGMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

44

{ SOC15_REG_ENTRY(GC, 0, mmDC_EDC_STATE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

441

{ "EA_WRET_TAGMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

444

{ "EA_GMIRD_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

447

{ "EA_GMIWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

45

{ SOC15_REG_ENTRY(GC, 0, mmDC_EDC_CSINVOC_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

450

{ "EA_GMIWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

453

{ "EA_DRAMRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

455

{ "EA_DRAMRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

457

{ "EA_DRAMWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

459

{ "EA_DRAMWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

46

{ SOC15_REG_ENTRY(GC, 0, mmDC_EDC_RESTORE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

461

{ "EA_IORD_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

463

{ "EA_IORD_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

465

{ "EA_IOWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

467

{ "EA_IOWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

469

{ "EA_IOWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

471

{ "EA_IOWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

473

{ "EA_GMIRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

475

{ "EA_GMIRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

477

{ "EA_GMIWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

479

{ "EA_GMIWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

48

{ SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_ROQ_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

481

{ "EA_MAM_D0MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

484

{ "EA_MAM_D1MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

487

{ "EA_MAM_D2MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

49

{ SOC15_REG_ENTRY(GC, 0, mmCPF_EDC_TAG_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

490

{ "EA_MAM_D3MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

493

{ "EA_MAM_A0MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

496

{ "EA_MAM_A1MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

499

{ "EA_MAM_A2MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

502

{ "EA_MAM_A3MEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

505

{ "EA_MAM_AFMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

507

{ "EA_MAM_AFMEM", SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

51

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

511

{ "RLCG_INSTR_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

514

{ "RLCG_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

517

{ "RLCV_INSTR_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

52

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_GRBM_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

520

{ "RLCV_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

523

{ "RLC_TCTAG_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

526

{ "RLC_SPM_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

529

{ "RLC_SRM_DATA_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

53

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_DED), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

532

{ "RLC_SRM_ADDR_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

535

{ "RLC_SPM_SE0_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

538

{ "RLC_SPM_SE1_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

54

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

541

{ "RLC_SPM_SE2_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

544

{ "RLC_SPM_SE3_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

547

{ "RLC_SPM_SE4_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

55

{ SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PIPE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

550

{ "RLC_SPM_SE5_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

553

{ "RLC_SPM_SE6_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

556

{ "RLC_SPM_SE7_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

57

{ SOC15_REG_ENTRY(GC, 0, mmSPI_EDC_CNT), 0, 4, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

59

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_CNT), 0, 8, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

60

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_DED_CNT), 0, 8, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

61

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_INFO), 0, 8, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

62

{ SOC15_REG_ENTRY(GC, 0, mmSQ_EDC_SEC_CNT), 0, 8, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

64

{ SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT), 0, 4, 6 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

65

{ SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT2), 0, 4, 6 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

66

{ SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3), 0, 4, 6 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

67

{ SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_PARITY_CNT3), 0, 4, 6 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

69

{ SOC15_REG_ENTRY(GC, 0, mmTA_EDC_CNT), 0, 4, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

694

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

695

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

696

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

697

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

698

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

699

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

701

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

702

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

703

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

704

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

707

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

708

data = RREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

71

{ SOC15_REG_ENTRY(GC, 0, mmTCA_EDC_CNT), 0, 1, 2 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

728

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

729

data = RREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

73

{ SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT), 0, 1, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

74

{ SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2), 0, 1, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

751

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

752

data = RREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

76

{ SOC15_REG_ENTRY(GC, 0, mmTCI_EDC_CNT), 0, 1, 72 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

772

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

773

data = RREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

78

{ SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT_NEW), 0, 4, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

79

{ SOC15_REG_ENTRY(GC, 0, mmTCP_ATC_EDC_GATCL1_CNT), 0, 4, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

795

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

796

data = RREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

80

{ SOC15_REG_ENTRY(GC, 0, mmTCP_EDC_CNT), 0, 4, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

817

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

818

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

819

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

82

{ SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT), 0, 4, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

820

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

821

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

84

{ SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT), 0, 1, 32 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

85

{ SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT2), 0, 1, 32 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

86

{ SOC15_REG_ENTRY(GC, 0, mmGCEA_EDC_CNT3), 0, 1, 32 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

88

{ SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

89

{ SOC15_REG_ENTRY(GC, 0, mmRLC_EDC_CNT2), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

925

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

928

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

929

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

930

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

931

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

932

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

933

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

935

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

936

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

937

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

938

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

941

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

942

RREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

946

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

947

RREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

951

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

952

RREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

956

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

957

RREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

961

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

962

RREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

965

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

966

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

967

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

968

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

969

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4.c

973

SOC15_REG_ENTRY(GC, 0, mmGCEA_ERR_STATUS), 0, 1, 32

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1001

{ "RLCV_INSTR_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1004

{ "RLCV_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1007

{ "RLC_TCTAG_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1010

{ "RLC_SPM_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1013

{ "RLC_SRM_DATA_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1016

{ "RLC_SRM_ADDR_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1019

{ "RLC_SPM_SE0_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1022

{ "RLC_SPM_SE1_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1025

{ "RLC_SPM_SE2_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1028

{ "RLC_SPM_SE3_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1031

{ "RLC_SPM_SE4_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1034

{ "RLC_SPM_SE5_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1037

{ "RLC_SPM_SE6_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1040

{ "RLC_SPM_SE7_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1045

{ "SPI_SR_MEM", SOC15_REG_ENTRY(GC, 0, regSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1048

{ "SPI_GDS_EXPREQ", SOC15_REG_ENTRY(GC, 0, regSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1051

{ "SPI_WB_GRANT_30", SOC15_REG_ENTRY(GC, 0, regSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1054

{ "SPI_LIFE_CNT", SOC15_REG_ENTRY(GC, 0, regSPI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1059

{ "SQC_DATA_CU0_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1062

{ "SQC_DATA_CU0_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1065

{ "SQC_DATA_CU1_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1068

{ "SQC_DATA_CU1_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1071

{ "SQC_DATA_CU2_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1074

{ "SQC_DATA_CU2_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1077

{ "SQC_DATA_CU3_WRITE_DATA_BUF", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1080

{ "SQC_DATA_CU3_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1085

{ "SQC_INST_BANKA_TAG_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1088

{ "SQC_INST_BANKA_BANK_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1091

{ "SQC_DATA_BANKA_TAG_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1094

{ "SQC_DATA_BANKA_BANK_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1097

{ "SQC_INST_UTCL1_LFIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1100

{ "SQC_DATA_BANKA_DIRTY_BIT_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1105

{ "SQC_INST_BANKB_TAG_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1108

{ "SQC_INST_BANKB_BANK_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1111

{ "SQC_DATA_BANKB_TAG_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1114

{ "SQC_DATA_BANKB_BANK_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1117

{ "SQC_DATA_BANKB_DIRTY_BIT_RAM", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1122

{ "SQC_INST_BANKA_UTCL1_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1125

{ "SQC_INST_BANKA_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1128

{ "SQC_DATA_BANKA_HIT_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1131

{ "SQC_DATA_BANKA_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1134

{ "SQC_INST_BANKB_UTCL1_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1137

{ "SQC_INST_BANKB_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1140

{ "SQC_DATA_BANKB_HIT_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1143

{ "SQC_DATA_BANKB_MISS_FIFO", SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1148

{ "SQ_LDS_D", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1151

{ "SQ_LDS_I", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1154

{ "SQ_SGPR", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1157

{ "SQ_VGPR0", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1160

{ "SQ_VGPR1", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1163

{ "SQ_VGPR2", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1166

{ "SQ_VGPR3", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1171

{ "TCP_CACHE_RAM", SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1174

{ "TCP_LFIFO_RAM", SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1177

{ "TCP_CMD_FIFO", SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1180

{ "TCP_VM_FIFO", SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1183

{ "TCP_DB_RAM", SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1186

{ "TCP_UTCL1_LFIFO0", SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1189

{ "TCP_UTCL1_LFIFO1", SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1194

{ "TCI_WRITE_RAM", SOC15_REG_ENTRY(GC, 0, regTCI_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1199

{ "TCC_CACHE_DATA", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1202

{ "TCC_CACHE_DIRTY", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1205

{ "TCC_HIGH_RATE_TAG", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1208

{ "TCC_LOW_RATE_TAG", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1211

{ "TCC_SRC_FIFO", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1214

{ "TCC_LATENCY_FIFO", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1217

{ "TCC_LATENCY_FIFO_NEXT_RAM", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1220

{ "TCC_CACHE_TAG_PROBE_FIFO", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1223

{ "TCC_UC_ATOMIC_FIFO", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1226

{ "TCC_WRITE_CACHE_READ", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1229

{ "TCC_RETURN_CONTROL", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1232

{ "TCC_IN_USE_TRANSFER", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1235

{ "TCC_IN_USE_DEC", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1238

{ "TCC_WRITE_RETURN", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1241

{ "TCC_RETURN_DATA", SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1246

{ "TCA_HOLE_FIFO", SOC15_REG_ENTRY(GC, 0, regTCA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1249

{ "TCA_REQ_FIFO", SOC15_REG_ENTRY(GC, 0, regTCA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1254

{ "TCX_GROUP0", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1257

{ "TCX_GROUP1", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1260

{ "TCX_GROUP2", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1263

{ "TCX_GROUP3", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1266

{ "TCX_GROUP4", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1269

{ "TCX_GROUP5", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1271

{ "TCX_GROUP6", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1273

{ "TCX_GROUP7", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1275

{ "TCX_GROUP8", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1277

{ "TCX_GROUP9", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1279

{ "TCX_GROUP10", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1281

{ "TCX_GROUP11", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1283

{ "TCX_GROUP12", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1285

{ "TCX_GROUP13", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1287

{ "TCX_GROUP14", SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1291

{ "TD_SS_FIFO_LO", SOC15_REG_ENTRY(GC, 0, regTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1294

{ "TD_SS_FIFO_HI", SOC15_REG_ENTRY(GC, 0, regTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1297

{ "TD_CS_FIFO", SOC15_REG_ENTRY(GC, 0, regTD_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1302

{ "TA_FS_DFIFO", SOC15_REG_ENTRY(GC, 0, regTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1305

{ "TA_FS_AFIFO_LO", SOC15_REG_ENTRY(GC, 0, regTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1308

{ "TA_FL_LFIFO", SOC15_REG_ENTRY(GC, 0, regTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1311

{ "TA_FX_LFIFO", SOC15_REG_ENTRY(GC, 0, regTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1314

{ "TA_FS_CFIFO", SOC15_REG_ENTRY(GC, 0, regTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1317

{ "TA_FS_AFIFO_HI", SOC15_REG_ENTRY(GC, 0, regTA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1322

{ "EA_DRAMRD_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1325

{ "EA_DRAMWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1328

{ "EA_DRAMWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1331

{ "EA_RRET_TAGMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1334

{ "EA_WRET_TAGMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1337

{ "EA_IOWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1340

{ "EA_DRAMRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1342

{ "EA_DRAMWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1344

{ "EA_IORD_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1346

{ "EA_IOWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1350

{ "EA_GMIRD_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1353

{ "EA_GMIWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1356

{ "EA_GMIWR_DATAMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1359

{ "EA_GMIRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1361

{ "EA_GMIWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1363

{ "EA_MAM_D0MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1366

{ "EA_MAM_D1MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1369

{ "EA_MAM_D2MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1372

{ "EA_MAM_D3MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1377

{ "EA_DRAMRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1379

{ "EA_DRAMWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1381

{ "EA_IORD_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1383

{ "EA_IOWR_CMDMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1385

{ "EA_GMIRD_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1387

{ "EA_GMIWR_PAGEMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1389

{ "EA_MAM_A0MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1392

{ "EA_MAM_A1MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1395

{ "EA_MAM_A2MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1398

{ "EA_MAM_A3MEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1401

{ "EA_MAM_AFMEM", SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1421

{ SOC15_REG_ENTRY(GC, 0, regVML2_MEM_ECC_INDEX) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1422

{ SOC15_REG_ENTRY(GC, 0, regVML2_MEM_ECC_CNTL) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1427

{ SOC15_REG_ENTRY(GC, 0, regVML2_WALKER_MEM_ECC_INDEX) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1428

{ SOC15_REG_ENTRY(GC, 0, regVML2_WALKER_MEM_ECC_CNTL) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1433

{ SOC15_REG_ENTRY(GC, 0, regUTCL2_MEM_ECC_INDEX) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1434

{ SOC15_REG_ENTRY(GC, 0, regUTCL2_MEM_ECC_CNTL) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1439

{ SOC15_REG_ENTRY(GC, 0, regATC_L2_CACHE_2M_DSM_INDEX) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1440

{ SOC15_REG_ENTRY(GC, 0, regATC_L2_CACHE_2M_DSM_CNTL) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1445

{ SOC15_REG_ENTRY(GC, 0, regATC_L2_CACHE_32K_DSM_INDEX) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1446

{ SOC15_REG_ENTRY(GC, 0, regATC_L2_CACHE_32K_DSM_CNTL) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1451

{ SOC15_REG_ENTRY(GC, 0, regATC_L2_CACHE_4K_DSM_INDEX) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1452

{ SOC15_REG_ENTRY(GC, 0, regATC_L2_CACHE_4K_DSM_CNTL) },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1459

SOC15_REG_ENTRY(GC, 0, regGCEA_ERR_STATUS), 0, 1, 16

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1681

WREG32_SOC15(GC, 0, regUTCL2_MEM_ECC_STATUS, 0x3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1682

WREG32_SOC15(GC, 0, regVML2_MEM_ECC_STATUS, 0x3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1683

WREG32_SOC15(GC, 0, regVML2_WALKER_MEM_ECC_STATUS, 0x3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1750

data = RREG32_SOC15(GC, 0, regUTCL2_MEM_ECC_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1753

WREG32_SOC15(GC, 0, regUTCL2_MEM_ECC_STATUS, 0x3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1756

data = RREG32_SOC15(GC, 0, regVML2_MEM_ECC_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1759

WREG32_SOC15(GC, 0, regVML2_MEM_ECC_STATUS, 0x3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1762

data = RREG32_SOC15(GC, 0, regVML2_WALKER_MEM_ECC_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1765

WREG32_SOC15(GC, 0, regVML2_WALKER_MEM_ECC_STATUS, 0x3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1810

WREG32_SOC15(GC, 0, regSQ_TIMEOUT_CONFIG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1818

WREG32_SOC15_RLC_EX(reg, GC, 0, regSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1823

return RREG32_SOC15(GC, 0, regSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1883

status = RREG32_SOC15(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1894

WREG32_SOC15(GC, 0, regSQ_TIMEOUT_STATUS, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

1916

WREG32_SOC15(GC, 0, regSQ_TIMEOUT_STATUS, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

192

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

193

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

194

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Y), 4 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

195

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

196

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC1), 0xbf },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

197

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC2), 0x400006 }, /* 64KB LDS */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

198

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC3), 0x3F }, /* 63 - accum-offset = 256 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

199

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE0), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

200

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE1), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

201

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE2), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

202

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE3), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

203

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE4), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

204

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE5), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

205

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE6), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

206

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE7), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

246

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

247

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

248

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Y), 8 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

249

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

250

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC1), 0x340 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

251

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC2), 0x6 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

252

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC3), 0x0 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

253

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE0), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

254

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE1), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

255

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE2), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

256

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE3), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

257

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE4), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

258

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE5), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

259

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE6), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

260

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE7), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

288

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

289

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

290

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Y), 0xc },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

291

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

292

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC1), 0x2c0 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

293

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC2), 0x6 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

294

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC3), 0x0 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

295

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE0), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

296

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE1), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

297

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE2), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

298

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE3), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

299

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE4), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

300

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE5), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

301

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE6), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

302

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE7), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

329

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_RESOURCE_LIMITS), 0x0000000 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

330

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_X), 0x40 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

331

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Y), 0x10 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

332

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_NUM_THREAD_Z), 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

333

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC1), 0x1c0 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

334

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC2), 0x6 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

335

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_PGM_RSRC3), 0x0 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

336

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE0), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

337

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE1), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

338

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE2), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

339

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE3), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

340

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE4), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

341

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE5), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

342

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE6), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

343

{ SOC15_REG_ENTRY(GC, 0, regCOMPUTE_STATIC_THREAD_MGMT_SE7), 0xffffffff },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

390

ib->ptr[ib->length_dw++] = SOC15_REG_OFFSET(GC, 0, regCOMPUTE_PGM_LO)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

397

ib->ptr[ib->length_dw++] = SOC15_REG_OFFSET(GC, 0, regCOMPUTE_USER_DATA_0)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

64

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_0, 0x3fffffff, 0x141dc920),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

65

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_1, 0x3fffffff, 0x3b458b93),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

66

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_2, 0x3fffffff, 0x1a4f5583),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

67

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_3, 0x3fffffff, 0x317717f6),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

68

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_4, 0x3fffffff, 0x107cc1e6),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

69

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_5, 0x3ff, 0x351),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

73

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_0, 0x3fffffff, 0x2591aa38),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

74

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_1, 0x3fffffff, 0xac9e88b),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

75

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_2, 0x3fffffff, 0x2bc3369b),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

757

data = RREG32_SOC15(GC, 0, regSQ_CONFIG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

759

WREG32_SOC15(GC, 0, regSQ_CONFIG1, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

76

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_3, 0x3fffffff, 0xfb74ee),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

77

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_4, 0x3fffffff, 0x21f0a2fe),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

779

WREG32(SOC15_REG_OFFSET(GC, 0, regSPI_GDBG_PER_VMID_CNTL), data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

78

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CHAN_STEER_5, 0x3ff, 0x49),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

785

WREG32(SOC15_REG_OFFSET(GC, 0, regSPI_GDBG_TRAP_DATA0), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

786

WREG32(SOC15_REG_OFFSET(GC, 0, regSPI_GDBG_TRAP_DATA1), 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

797

WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

801

WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL1, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

803

WREG32_SOC15(GC, 0, regGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

806

WREG32_SOC15(GC, 0, regGC_CAC_IND_DATA, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

811

{ SOC15_REG_ENTRY(GC, 0, regCPF_EDC_ROQ_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

812

{ SOC15_REG_ENTRY(GC, 0, regCPF_EDC_TAG_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

814

{ SOC15_REG_ENTRY(GC, 0, regCPC_EDC_SCRATCH_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

815

{ SOC15_REG_ENTRY(GC, 0, regCPC_EDC_UCODE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

816

{ SOC15_REG_ENTRY(GC, 0, regDC_EDC_STATE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

817

{ SOC15_REG_ENTRY(GC, 0, regDC_EDC_CSINVOC_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

818

{ SOC15_REG_ENTRY(GC, 0, regDC_EDC_RESTORE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

82

SOC15_REG_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0xffff77ff, 0x2a114042),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

820

{ SOC15_REG_ENTRY(GC, 0, regGDS_EDC_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

821

{ SOC15_REG_ENTRY(GC, 0, regGDS_EDC_GRBM_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

822

{ SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

823

{ SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PHY_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

824

{ SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PIPE_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

826

{ SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

827

{ SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT2), 0, 1, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

829

{ SOC15_REG_ENTRY(GC, 0, regSPI_EDC_CNT), 0, 8, 1 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

83

SOC15_REG_GOLDEN_VALUE(GC, 0, regTA_CNTL_AUX, 0xfffffeef, 0x10b0000),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

831

{ SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT), 0, 8, 7 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

832

{ SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT2), 0, 8, 7 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

833

{ SOC15_REG_ENTRY(GC, 0, regSQC_EDC_CNT3), 0, 8, 7 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

834

{ SOC15_REG_ENTRY(GC, 0, regSQC_EDC_PARITY_CNT3), 0, 8, 7 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

836

{ SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT), 0, 8, 14 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

838

{ SOC15_REG_ENTRY(GC, 0, regTCP_EDC_CNT_NEW), 0, 8, 14 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

84

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_UTCL1_CNTL1, 0xffffffff, 0x30800400),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

840

{ SOC15_REG_ENTRY(GC, 0, regTCI_EDC_CNT), 0, 1, 69 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

842

{ SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT), 0, 1, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

843

{ SOC15_REG_ENTRY(GC, 0, regTCC_EDC_CNT2), 0, 1, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

845

{ SOC15_REG_ENTRY(GC, 0, regTCA_EDC_CNT), 0, 1, 2 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

847

{ SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT), 0, 1, 2 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

848

{ SOC15_REG_ENTRY(GC, 0, regTCX_EDC_CNT2), 0, 1, 2 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

85

SOC15_REG_GOLDEN_VALUE(GC, 0, regTCI_CNTL_3, 0xff, 0x20),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

850

{ SOC15_REG_ENTRY(GC, 0, regTD_EDC_CNT), 0, 8, 14 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

852

{ SOC15_REG_ENTRY(GC, 0, regTA_EDC_CNT), 0, 8, 14 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

854

{ SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT), 0, 1, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

855

{ SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT2), 0, 1, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

856

{ SOC15_REG_ENTRY(GC, 0, regGCEA_EDC_CNT3), 0, 1, 16 },

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

883

WREG32_SOC15_RLC_SHADOW_EX(reg, GC, 0, regGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

888

{ "CPF_ROQ_ME2", SOC15_REG_ENTRY(GC, 0, regCPF_EDC_ROQ_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

891

{ "CPF_ROQ_ME1", SOC15_REG_ENTRY(GC, 0, regCPF_EDC_ROQ_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

894

{ "CPF_TCIU_TAG", SOC15_REG_ENTRY(GC, 0, regCPF_EDC_TAG_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

899

{ "CPC_SCRATCH", SOC15_REG_ENTRY(GC, 0, regCPC_EDC_SCRATCH_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

902

{ "CPC_UCODE", SOC15_REG_ENTRY(GC, 0, regCPC_EDC_UCODE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

905

{ "CPC_DC_STATE_RAM_ME1", SOC15_REG_ENTRY(GC, 0, regDC_EDC_STATE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

909

SOC15_REG_ENTRY(GC, 0, regDC_EDC_CSINVOC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

913

SOC15_REG_ENTRY(GC, 0, regDC_EDC_RESTORE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

917

SOC15_REG_ENTRY(GC, 0, regDC_EDC_CSINVOC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

921

SOC15_REG_ENTRY(GC, 0, regDC_EDC_RESTORE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

926

{ "GDS_GRBM", SOC15_REG_ENTRY(GC, 0, regGDS_EDC_GRBM_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

929

{ "GDS_MEM", SOC15_REG_ENTRY(GC, 0, regGDS_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

932

{ "GDS_PHY_CMD_RAM_MEM", SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

935

{ "GDS_PHY_DATA_RAM_MEM", SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

938

{ "GDS_ME0_CS_PIPE_MEM", SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PHY_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

942

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

946

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

950

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

954

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_PIPE_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

958

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

961

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

964

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

967

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

970

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

973

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

976

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

979

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

982

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

985

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

988

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

991

SOC15_REG_ENTRY(GC, 0, regGDS_EDC_OA_DED), 0, 0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

995

{ "RLCG_INSTR_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

998

{ "RLCG_SCRATCH_RAM", SOC15_REG_ENTRY(GC, 0, regRLC_EDC_CNT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

100

SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_MESSAGE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

101

SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_ARGUMENT_1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

102

SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_ARGUMENT_2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

103

SOC15_REG_ENTRY_STR(GC, 0, regSMU_RLC_RESPONSE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

104

SOC15_REG_ENTRY_STR(GC, 0, regRLC_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

105

SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_SAFE_MODE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

106

SOC15_REG_ENTRY_STR(GC, 0, regRLC_INT_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

107

SOC15_REG_ENTRY_STR(GC, 0, regRLC_GPM_GENERAL_6),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

109

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE0),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

110

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

111

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

112

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE3)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

117

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_VMID),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

118

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_ACTIVE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

119

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PERSISTENT_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

120

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PIPE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

121

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_QUEUE_PRIORITY),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

122

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

123

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1237

soc15_grbm_select(adev, 0, 0, 0, i, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1239

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSH_MEM_CONFIG, sh_mem_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

124

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1240

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSH_MEM_BASES, sh_mem_bases);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1243

data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSPI_GDBG_PER_VMID_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1245

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSPI_GDBG_PER_VMID_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1247

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

125

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1255

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_BASE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1256

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_SIZE, 2 * i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1257

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1258

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, i, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

126

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

127

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1273

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_BASE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1274

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_SIZE, 2 * vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1275

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_GWS_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1276

WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_OA_VMID0, vmid, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

128

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

129

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1291

data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_CONFIG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1293

WREG32_SOC15(GC, xcc_id, regSQ_CONFIG1, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

130

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1306

soc15_grbm_select(adev, 0, 0, 0, i, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

131

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1313

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1315

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

132

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1322

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

133

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1330

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1334

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

134

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_REQUEST),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

135

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1351

RREG32_SOC15(GC, GET_INST(GC, 0), regDB_DEBUG2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

136

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

137

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1377

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), RLC_SRM_CNTL, SRM_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

138

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

139

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1392

data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1394

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

140

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_EVENTS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1402

rlc_setting = RREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

141

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_BASE_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1416

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

142

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_BASE_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1420

if (!REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

143

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_CONTROL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1432

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

144

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CNTL_STACK_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1442

reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[GET_INST(GC, xcc_id)];

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1443

reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1444

reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1445

reg_access_ctrl->scratch_reg2 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1446

reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1447

reg_access_ctrl->grbm_cntl = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regGRBM_GFX_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1448

reg_access_ctrl->grbm_idx = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regGRBM_GFX_INDEX);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1449

reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SPARE_INT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

145

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CNTL_STACK_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

146

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_WG_STATE_OFFSET),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

147

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_CTX_SAVE_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1475

if (RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SERDES_CU_MASTER_BUSY) == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

148

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_GDS_RESOURCE_STATE),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

149

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1499

if ((RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SERDES_NONCU_MASTER_BUSY) & mask) == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

150

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_WPTR_MEM),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

151

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_LO),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1512

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1518

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

152

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1523

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), RLC_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

153

SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_GFX_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

154

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1540

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), GRBM_SOFT_RESET,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1543

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), GRBM_SOFT_RESET,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

155

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1559

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), RLC_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

156

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

157

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

158

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1582

rlc_ucode_ver = RREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_GENERAL_6);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1589

WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_TIMER_INT_3, 0x9C4);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

159

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1593

WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_GENERAL_12, 0x100);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

160

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

161

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1616

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1623

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1625

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1645

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1674

reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1685

WREG32_SOC15_NO_KIQ(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1687

WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1692

{SOC15_REG_ENTRY(GC, 0, regGRBM_GFX_INDEX)},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1693

{SOC15_REG_ENTRY(GC, 0, regSQ_IND_INDEX)},

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1734

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MEC_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1736

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MEC_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1775

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1777

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1779

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1783

SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_MEC_ME1_UCODE_ADDR);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1785

SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_MEC_ME1_UCODE_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1806

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1809

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1852

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1859

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1892

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1902

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1929

mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1934

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1939

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_IB_CONTROL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1945

mqd->cp_hqd_quantum = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_QUANTUM);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1964

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), CP_PQ_WPTR_POLL_CNTL, EN, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1966

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1968

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1972

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1976

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1980

if (RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1981

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1983

if (!(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1987

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1989

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1991

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1993

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

1998

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2000

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2004

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MQD_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2008

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2010

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2014

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2018

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR_REPORT_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2020

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2024

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2026

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2032

GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2038

GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2045

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2049

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_LO,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2051

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_HI,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2055

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_VMID, mqd->cp_hqd_vmid);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2057

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2061

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2065

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), CP_PQ_STATUS, DOORBELL_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2077

if (RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2079

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2082

if (!(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2091

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2094

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2098

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_IQ_TIMER, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2099

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_IB_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2100

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, CP_HQD_PERSISTENT_STATE_DEFAULT);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2101

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2102

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2103

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2104

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_HI, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2105

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_LO, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2133

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2135

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2144

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2147

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2175

soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2177

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2206

ring->queue, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2208

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2328

WREG32_FIELD15_PREREG(GC, GET_INST(GC, xcc_id), CP_PQ_WPTR_POLL_CNTL, EN, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2340

GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2343

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2409

if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i), regGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2436

tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2455

tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_STATUS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2468

tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2471

WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2472

tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2477

WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2478

tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2496

SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_VMID0_BASE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2501

SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_VMID0_SIZE) + 2 * vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2506

SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_GWS_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2511

SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_OA_VMID0) + vmid,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2565

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2574

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2587

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2596

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2609

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2617

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2623

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2626

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2630

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2633

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2638

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2646

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2649

data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2652

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2656

data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEM_SLP_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2659

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEM_SLP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2673

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2682

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2685

def = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2694

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2697

def = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_WPTR_POLL_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2701

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_WPTR_POLL_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2703

def = data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2708

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2796

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2801

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGCG_CGLS_CTRL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2810

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2815

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regCP_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2986

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

304

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST, 0x2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

305

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSPI_COMPUTE_QUEUE_RESET, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3061

WREG32_SOC15(GC, GET_INST(GC, ring->xcc_id), regSQ_CMD, value);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

308

if (!(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3080

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3083

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3086

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3089

mec_int_cntl_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3131

return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE0_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3133

return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE1_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3135

return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE2_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3137

return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE3_INT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3156

WREG32_FIELD15_PREREG(GC, GET_INST(GC, i), CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3196

WREG32_FIELD15_PREREG(GC, GET_INST(GC, i), CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3235

WREG32_FIELD15_PREREG(GC, GET_INST(GC, i), CP_INT_CNTL_RING0,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3424

wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3427

wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3430

wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3433

wcl_cs_reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_CS3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3455

SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regSPI_WCL_PIPE_PERCENT_GFX),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3478

soc15_grbm_select(adev, me, pipe, queue, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3480

if (!(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3488

soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3518

reset_pipe = RREG32_SOC15(GC, GET_INST(GC, ring->xcc_id), regCP_MEC_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

353

dev_inst = GET_INST(GC, i);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

355

WREG32_SOC15(GC, dev_inst, regGB_ADDR_CONFIG,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3551

WREG32_SOC15(GC, GET_INST(GC, ring->xcc_id), regCP_MEC_CNTL, reset_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3552

WREG32_SOC15(GC, GET_INST(GC, ring->xcc_id), regCP_MEC_CNTL, clean_pipe);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

357

WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2, SPARE, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

425

xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

426

scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), regSCRATCH_REG0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4263

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regRLC_CE_ERR_STATUS_LOW, regRLC_CE_ERR_STATUS_HIGH),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4266

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPC_CE_ERR_STATUS_LO, regCPC_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4269

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPF_CE_ERR_STATUS_LO, regCPF_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4272

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPG_CE_ERR_STATUS_LO, regCPG_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4275

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGDS_CE_ERR_STATUS_LO, regGDS_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4278

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGC_CANE_CE_ERR_STATUS_LO, regGC_CANE_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4281

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSPI_CE_ERR_STATUS_LO, regSPI_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4284

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP0_CE_ERR_STATUS_LO, regSP0_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4287

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP1_CE_ERR_STATUS_LO, regSP1_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4290

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQ_CE_ERR_STATUS_LO, regSQ_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4293

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQC_CE_EDC_LO, regSQC_CE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4296

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCX_CE_ERR_STATUS_LO, regTCX_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4299

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCC_CE_ERR_STATUS_LO, regTCC_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4302

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTA_CE_EDC_LO, regTA_CE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4305

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCI_CE_EDC_LO_REG, regTCI_CE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4308

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCP_CE_EDC_LO_REG, regTCP_CE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4311

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTD_CE_EDC_LO, regTD_CE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4314

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGCEA_CE_ERR_STATUS_LO, regGCEA_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4317

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regLDS_CE_ERR_STATUS_LO, regLDS_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4323

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regRLC_UE_ERR_STATUS_LOW, regRLC_UE_ERR_STATUS_HIGH),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4326

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPC_UE_ERR_STATUS_LO, regCPC_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4329

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPF_UE_ERR_STATUS_LO, regCPF_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4332

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPG_UE_ERR_STATUS_LO, regCPG_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4335

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGDS_UE_ERR_STATUS_LO, regGDS_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4338

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGC_CANE_UE_ERR_STATUS_LO, regGC_CANE_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4341

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSPI_UE_ERR_STATUS_LO, regSPI_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4344

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP0_UE_ERR_STATUS_LO, regSP0_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4347

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP1_UE_ERR_STATUS_LO, regSP1_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4350

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQ_UE_ERR_STATUS_LO, regSQ_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4353

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQC_UE_EDC_LO, regSQC_UE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4356

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCX_UE_ERR_STATUS_LO, regTCX_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4359

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCC_UE_ERR_STATUS_LO, regTCC_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4362

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTA_UE_EDC_LO, regTA_UE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4365

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCI_UE_EDC_LO_REG, regTCI_UE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4368

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCP_UE_EDC_LO_REG, regTCP_UE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4371

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTD_UE_EDC_LO, regTD_UE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4374

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCA_UE_ERR_STATUS_LO, regTCA_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4377

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGCEA_UE_ERR_STATUS_LO, regGCEA_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4380

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regLDS_UE_ERR_STATUS_LO, regLDS_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4413

GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4422

GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4443

GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4479

GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4484

GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4501

GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4520

data = RREG32_SOC15(GC, GET_INST(GC, 0), regSQ_TIMEOUT_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4536

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_TIMEOUT_CONFIG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4662

GET_INST(GC, xcc_id)));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4681

GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4689

RREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4697

GET_INST(GC, xcc_id)));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4886

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGC_USER_SHADER_ARRAY_CONFIG, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4893

data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCC_GC_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4894

data |= RREG32_SOC15(GC, GET_INST(GC, xcc_id), regGC_USER_SHADER_ARRAY_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4961

tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4964

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

514

WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

515

clock = (uint64_t)RREG32_SOC15(GC, GET_INST(GC, 0), regRLC_GPU_CLOCK_COUNT_LSB) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

516

((uint64_t)RREG32_SOC15(GC, GET_INST(GC, 0), regRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

68

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

69

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

70

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

71

SOC15_REG_ENTRY_STR(GC, 0, regCP_STALLED_STAT2),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

713

WREG32_SOC15_RLC_SHADOW_EX(reg, GC, GET_INST(GC, xcc_id), regGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

718

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

72

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

723

return RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

73

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_STALLED_STAT1),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

730

WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regSQ_IND_INDEX,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

738

*(out++) = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

74

SOC15_REG_ENTRY_STR(GC, 0, regCP_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

75

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

76

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_BUSY_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

77

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPF_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

78

SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_ERROR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

784

soc15_grbm_select(adev, me, pipe, q, vm, GET_INST(GC, xcc_id));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

79

SOC15_REG_ENTRY_STR(GC, 0, regCPF_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

792

xcp_ctl = RREG32_SOC15(GC, GET_INST(GC, 0), regCP_HYP_XCP_CTL);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

80

SOC15_REG_ENTRY_STR(GC, 0, regCPC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

81

SOC15_REG_ENTRY_STR(GC, 0, regCPG_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

817

WREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

82

SOC15_REG_ENTRY_STR(GC, 0, regGDS_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

83

SOC15_REG_ENTRY_STR(GC, 0, regGDS_VM_PROTECTION_FAULT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

84

SOC15_REG_ENTRY_STR(GC, 0, regRLC_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

85

SOC15_REG_ENTRY_STR(GC, 0, regRMI_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

86

SOC15_REG_ENTRY_STR(GC, 0, regSQC_DCACHE_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

87

SOC15_REG_ENTRY_STR(GC, 0, regSQC_ICACHE_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

88

SOC15_REG_ENTRY_STR(GC, 0, regSQ_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

89

SOC15_REG_ENTRY_STR(GC, 0, regTCP_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

90

SOC15_REG_ENTRY_STR(GC, 0, regWD_UTCL1_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

91

SOC15_REG_ENTRY_STR(GC, 0, regVM_L2_PROTECTION_FAULT_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

92

SOC15_REG_ENTRY_STR(GC, 0, regVM_L2_PROTECTION_FAULT_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

93

SOC15_REG_ENTRY_STR(GC, 0, regCP_DEBUG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

94

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_CNTL),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

95

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC1_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

96

SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC2_INSTR_PNTR),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

97

SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_STATUS),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

98

SOC15_REG_ENTRY_STR(GC, 0, regRLC_STAT),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

99

SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_COMMAND),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

111

u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

121

return (u64)RREG32_SOC15(GC, 0, regGCMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

129

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

133

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

144

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

146

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

149

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

151

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

159

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

160

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

161

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

164

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

167

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

172

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

174

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

178

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

180

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

183

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

192

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

204

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

218

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

229

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

231

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

234

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

246

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

251

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

255

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

262

tmp = RREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

267

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

278

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

280

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

283

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

288

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

289

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

300

tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

325

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

327

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

329

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

331

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

334

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

348

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

350

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

363

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

365

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

391

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

395

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

399

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

402

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

403

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

418

tmp = RREG32_SOC15(GC, 0, regCP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

420

WREG32_SOC15(GC, 0, regCP_DEBUG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

428

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

458

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

471

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

474

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

477

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

479

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

481

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

483

SOC15_REG_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

485

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c

487

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

113

u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

123

return (u64)RREG32_SOC15(GC, 0, regGCMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

132

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

136

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

147

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

149

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

152

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

154

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

163

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

164

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

165

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

168

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

170

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

176

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

178

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

182

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

184

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

187

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

197

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

209

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

223

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

234

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

236

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

239

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

251

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

256

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

260

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

267

tmp = RREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

272

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

283

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

288

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

290

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

293

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

294

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

305

tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

330

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

332

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

334

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

336

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

339

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

353

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

355

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

368

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

370

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

396

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

400

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

404

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

407

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

408

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

423

tmp = RREG32_SOC15(GC, 0, regCP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

425

WREG32_SOC15(GC, 0, regCP_DEBUG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

433

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

463

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

476

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

479

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

482

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

484

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

486

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

488

SOC15_REG_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

490

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_STATUS_LO32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c

492

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

102

WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

115

WREG32_SOC15_RLC(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

121

GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

126

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

128

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

132

WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

134

WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

137

WREG32_FIELD15(GC, 0, VM_L2_PROTECTION_FAULT_CNTL2,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

145

WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_TOP, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

146

WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

147

WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

148

WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFF);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

149

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

150

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

159

tmp = RREG32_SOC15(GC, 0, mmMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

171

WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

179

tmp = RREG32_SOC15(GC, 0, mmVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

188

WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

190

tmp = RREG32_SOC15(GC, 0, mmVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

193

WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

205

WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

215

WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

222

tmp = RREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

230

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

235

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

237

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

240

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

242

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

245

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

246

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

265

tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i * hub->ctx_distance);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

295

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

297

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

299

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

301

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

304

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

316

WREG32_SOC15_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

318

WREG32_SOC15_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

349

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

357

tmp = RREG32_SOC15(GC, 0, mmMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

36

return (u64)RREG32_SOC15(GC, 0, mmMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

363

WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

366

WREG32_FIELD15(GC, 0, VM_L2_CNTL, ENABLE_L2_CACHE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

367

WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

381

tmp = RREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

412

WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

420

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

423

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

426

SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

428

SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

430

SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

432

SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

434

SOC15_REG_OFFSET(GC, 0, mmVM_L2_PROTECTION_FAULT_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

436

SOC15_REG_OFFSET(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

45

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

49

WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

69

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

71

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

74

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

76

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

79

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

81

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

84

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

86

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

97

WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

98

WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c

99

WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_1.c

53

xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL_ALDE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_1.c

55

RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE_ALDE),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_1.c

60

xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_1.c

62

RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

101

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

104

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

108

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

111

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

115

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

118

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

135

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

136

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

137

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

141

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

154

WREG32_SOC15_RLC(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

159

WREG32_SOC15_RLC(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

165

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

167

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

171

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

173

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

176

tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

179

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

186

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_TOP, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

187

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

188

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_TOP, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

189

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_BOT, 0xFFFFFF);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

190

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

191

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

204

tmp = RREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

218

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

230

tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

239

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

241

tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

244

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

256

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

267

WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

278

tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

286

WREG32_SOC15(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

297

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

300

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

304

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

307

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

311

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

313

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

346

tmp = RREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

380

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

382

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

385

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

388

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

39

return (u64)RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

392

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

410

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

412

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

456

WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

460

tmp = RREG32_SOC15(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

466

WREG32_SOC15_RLC(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

470

tmp = RREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

472

WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

473

WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

494

tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

52

WREG32_SOC15_OFFSET(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

525

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

553

SOC15_REG_OFFSET(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

556

SOC15_REG_OFFSET(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

559

SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

561

SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

563

SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

565

SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

567

SOC15_REG_OFFSET(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

57

WREG32_SOC15_OFFSET(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

570

SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

601

xgmi_lfb_cntl = RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_XGMI_LFB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

603

RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_XGMI_LFB_SIZE),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

94

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c

97

WREG32_SOC15(GC, GET_INST(GC, i),

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

107

u64 base = RREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

117

return (u64)RREG32_SOC15(GC, 0, mmGCMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

125

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

129

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

140

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

142

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

145

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

147

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

157

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

158

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

159

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

162

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

164

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

169

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

171

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

176

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

178

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

181

WREG32_FIELD15(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

191

tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

202

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

214

tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

225

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

227

tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

230

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

242

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

247

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

251

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL5, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

258

tmp = RREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

263

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

268

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

270

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

273

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

275

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

278

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

279

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

290

tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

315

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

317

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

319

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

321

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

324

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

338

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

340

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

369

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

373

tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

377

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

381

WREG32_FIELD15(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

382

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

397

tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

427

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

440

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

443

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

446

SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

448

SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

450

SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

452

SOC15_REG_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

454

SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c

456

SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

110

u64 base = RREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

120

return (u64)RREG32_SOC15(GC, 0, mmGCMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

128

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

132

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

143

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

145

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

148

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

150

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

162

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

163

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

164

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

167

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

169

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

174

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

176

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

180

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

182

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

185

WREG32_FIELD15(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

195

tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

206

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

220

tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

231

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

233

tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

236

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

248

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

253

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

257

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL5, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

264

tmp = RREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

269

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

280

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

282

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

285

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

287

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

290

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

291

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

302

tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

327

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

329

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

331

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

333

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

336

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

350

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

352

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

365

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

367

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_TOP,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

393

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

397

tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

401

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

407

WREG32_FIELD15(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

408

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

428

tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

458

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

471

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

474

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

477

SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

479

SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

481

SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

483

SOC15_REG_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

485

SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

487

SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

522

efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

527

vbios_setting = RREG32_SOC15(GC, 0, mmGC_USER_SA_UNIT_DISABLE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

542

WREG32_SOC15(GC, 0, mmGCUTCL2_HARVEST_BYPASS_GROUPS_YELLOW_CARP, disabled_sa);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

553

adev->gmc.VM_L2_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

554

adev->gmc.VM_L2_CNTL2 = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

555

adev->gmc.VM_DUMMY_PAGE_FAULT_CNTL = RREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

556

adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_LO32 = RREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_LO32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

557

adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_HI32 = RREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_HI32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

558

adev->gmc.VM_L2_PROTECTION_FAULT_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

559

adev->gmc.VM_L2_PROTECTION_FAULT_CNTL2 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

560

adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL3 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL3);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

561

adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL4 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL4);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

562

adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_LO32 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_LO32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

563

adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_HI32 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_HI32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

564

adev->gmc.VM_DEBUG = RREG32_SOC15(GC, 0, mmGCVM_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

565

adev->gmc.VM_L2_MM_GROUP_RT_CLASSES = RREG32_SOC15(GC, 0, mmGCVM_L2_MM_GROUP_RT_CLASSES);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

566

adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID = RREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

567

adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID2 = RREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

568

adev->gmc.VM_L2_CACHE_PARITY_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_CACHE_PARITY_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

569

adev->gmc.VM_L2_IH_LOG_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_IH_LOG_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

572

adev->gmc.VM_CONTEXT_CNTL[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, i);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

573

adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, i * 2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

574

adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, i * 2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

575

adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, i * 2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

576

adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, i * 2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

577

adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, i * 2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

578

adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, i * 2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

581

adev->gmc.MC_VM_MX_L1_TLB_CNTL = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

588

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, adev->gmc.VM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

589

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, adev->gmc.VM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

590

WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_CNTL, adev->gmc.VM_DUMMY_PAGE_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

591

WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_LO32, adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_LO32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

592

WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_HI32, adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_HI32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

593

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

594

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL2, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

595

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL3, adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL3);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

596

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL4, adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL4);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

597

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_LO32, adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_LO32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

598

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_HI32, adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_HI32);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

599

WREG32_SOC15(GC, 0, mmGCVM_DEBUG, adev->gmc.VM_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

600

WREG32_SOC15(GC, 0, mmGCVM_L2_MM_GROUP_RT_CLASSES, adev->gmc.VM_L2_MM_GROUP_RT_CLASSES);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

601

WREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID, adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

602

WREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID2, adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

603

WREG32_SOC15(GC, 0, mmGCVM_L2_CACHE_PARITY_CNTL, adev->gmc.VM_L2_CACHE_PARITY_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

604

WREG32_SOC15(GC, 0, mmGCVM_L2_IH_LOG_CNTL, adev->gmc.VM_L2_IH_LOG_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

607

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, i, adev->gmc.VM_CONTEXT_CNTL[i]);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

608

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, i * 2, adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_LO32[i]);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

609

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, i * 2, adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_HI32[i]);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

610

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, i * 2, adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_LO32[i]);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

611

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, i * 2, adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_HI32[i]);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

612

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, i * 2, adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_LO32[i]);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

613

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, i * 2, adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_HI32[i]);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

616

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE, adev->gmc.vram_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

617

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_TOP, adev->gmc.vram_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

618

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, adev->gmc.MC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

631

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

633

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

635

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

638

WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

642

tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c

648

tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

106

u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

116

return (u64)RREG32_SOC15(GC, 0, regGCMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

124

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

128

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

139

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

141

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

144

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

146

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

155

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

156

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

157

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

161

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

163

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

168

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

170

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

174

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

176

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

179

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

189

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

201

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

215

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

226

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

228

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

231

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

243

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

248

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

252

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

259

tmp = RREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

264

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

275

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

277

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

280

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

282

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

286

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

297

tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

322

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

324

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

326

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

328

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

331

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

345

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

347

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

360

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

362

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

388

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

392

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

396

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

399

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

400

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

415

tmp = RREG32_SOC15(GC, 0, regCP_DEBUG);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

417

WREG32_SOC15(GC, 0, regCP_DEBUG, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

425

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

455

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

468

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

471

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

474

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

476

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

478

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

480

SOC15_REG_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

482

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c

484

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

109

u64 base = RREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

119

return (u64)RREG32_SOC15(GC, 0, regGCMC_VM_FB_OFFSET) << 24;

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

127

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

131

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

142

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

144

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

147

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

149

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

161

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

162

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

163

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

166

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

168

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

173

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

175

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

179

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

181

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

184

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

194

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

206

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

220

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

231

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

233

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_CNTL2);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

236

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

248

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

253

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

257

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

264

tmp = RREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

269

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

280

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

282

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

287

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

290

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

291

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

302

tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

327

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

329

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

331

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

333

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

336

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

350

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

352

WREG32_SOC15_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

381

WREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

385

tmp = RREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

389

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

392

WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

393

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

413

tmp = RREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

443

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

456

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

459

SOC15_REG_OFFSET(GC, 0,

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

462

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_SEM);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

464

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_REQ);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

466

SOC15_REG_OFFSET(GC, 0, regGCVM_INVALIDATE_ENG0_ACK);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

468

SOC15_REG_OFFSET(GC, 0, regGCVM_CONTEXT0_CNTL);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

470

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c

472

SOC15_REG_OFFSET(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL);

sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c

276

1 << vmid, GET_INST(GC, 0));

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

264

1 << vmid, GET_INST(GC, 0));

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

338

1 << vmid, GET_INST(GC, 0));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

889

tmp = RREG32_SOC15_IP_NO_KIQ(MMHUB, sem, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

891

tmp = RREG32_SOC15_IP_NO_KIQ(GC, sem, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

902

WREG32_SOC15_IP_NO_KIQ(MMHUB, req, inv_req, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

904

WREG32_SOC15_IP_NO_KIQ(GC, req, inv_req, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

917

tmp = RREG32_SOC15_IP_NO_KIQ(MMHUB, ack, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

919

tmp = RREG32_SOC15_IP_NO_KIQ(GC, ack, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

932

WREG32_SOC15_IP_NO_KIQ(MMHUB, sem, 0, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

934

WREG32_SOC15_IP_NO_KIQ(GC, sem, 0, GET_INST(GC, inst));

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

108

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

111

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

113

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, adev->gfx.imu_fw_version);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

120

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

123

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

125

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, adev->gfx.imu_fw_version);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

135

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_GFX_RESET_CTRL);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

154

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL0, 0xffffff);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

155

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL1, 0xffff);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

158

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

160

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16, imu_reg_val);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

164

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

166

WREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10, imu_reg_val);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

174

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

176

WREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL, imu_reg_val);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

186

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_IO_RD_COMBINE_FLUSH, 0x00055555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

187

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_IO_WR_COMBINE_FLUSH, 0x00055555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

188

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_DRAM_COMBINE_FLUSH, 0x00555555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

189

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_MISC2, 0x00001ffe, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

190

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_CREDITS , 0x003f3fff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

191

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_TAG_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

192

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCC_RESERVE0, 0x00041000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

193

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCC_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

194

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCD_RESERVE0, 0x00040000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

195

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCD_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

196

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_MISC, 0x00000017, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

197

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_ENABLE, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

198

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_CREDITS , 0x003f3fbf, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

199

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_TAG_RESERVE0, 0x10201000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

200

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_TAG_RESERVE1, 0x00000080, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

201

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_VCC_RESERVE0, 0x1d041040, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

202

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_VCC_RESERVE1, 0x80000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

203

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_IO_PRIORITY, 0x88888888, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

204

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_MAM_CTRL, 0x0000d800, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

205

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_ARB_FINAL, 0x000003f7, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

206

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_ENABLE, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

207

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL2, 0x00020000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

208

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_APT_CNTL, 0x0000000c, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

209

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

210

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_MISC, 0x0c48bff0, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

211

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SA_UNIT_DISABLE, 0x00fffc01, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

212

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_PRIM_CONFIG, 0x000fffe1, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

213

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_RB_BACKEND_DISABLE, 0x0fffff01, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

214

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xfffe0001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

215

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

216

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

217

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

218

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_START, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

219

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_END, 0x000fffff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

220

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

221

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT1_CNTL, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

222

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_TOP_OF_DRAM_SLOT1, 0xff800000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

223

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_LOWER_TOP_OF_DRAM2, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

224

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_UPPER_TOP_OF_DRAM2, 0x00000fff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

225

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, 0x00001ffc, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

226

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000501, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

227

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL, 0x00080603, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

228

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL2, 0x00000003, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

229

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL3, 0x00100003, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

230

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL5, 0x00003fe0, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

231

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

232

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CONTEXT0_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES, 0x00000c00, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

233

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT1_CNTL, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

234

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CONTEXT1_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES, 0x00000c00, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

235

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x00000545, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

236

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_0, 0x13455431, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

237

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_1, 0x13455431, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

238

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_2, 0x76027602, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

239

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_3, 0x76207620, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

240

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x00000345, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

241

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCUTCL2_HARVEST_BYPASS_GROUPS, 0x0000003e, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

242

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

243

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x000061ff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

244

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_APT_CNTL, 0x0000000c, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

245

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BASE, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

246

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BOT, 0x00000002, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

247

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_TOP, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

248

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL2, 0x00020000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

249

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA0_UCODE_SELFLOAD_CONTROL, 0x00000210, 0),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

250

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA1_UCODE_SELFLOAD_CONTROL, 0x00000210, 0),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

251

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPC_PSP_DEBUG, CPC_PSP_DEBUG__GPA_OVERRIDE_MASK, 0),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

252

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPG_PSP_DEBUG, CPG_PSP_DEBUG__GPA_OVERRIDE_MASK, 0)

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

257

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_MISC, 0x0c48bff0, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

258

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_CREDITS, 0x003f3fbf, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

259

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_TAG_RESERVE0, 0x10200800, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

260

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_TAG_RESERVE1, 0x00000088, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

261

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_VCC_RESERVE0, 0x1d041040, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

262

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_VCC_RESERVE1, 0x80000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

263

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_IO_PRIORITY, 0x88888888, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

264

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_MAM_CTRL, 0x0000d800, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

265

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_ARB_FINAL, 0x000007ef, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

266

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_DRAM_PAGE_BURST, 0x20080200, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

267

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_ENABLE, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

268

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_APT_CNTL, 0x0000000c, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

269

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

270

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_IO_RD_COMBINE_FLUSH, 0x00055555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

271

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_IO_WR_COMBINE_FLUSH, 0x00055555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

272

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_DRAM_COMBINE_FLUSH, 0x00555555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

273

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_MISC2, 0x00001ffe, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

274

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_CREDITS, 0x003f3fff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

275

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_TAG_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

276

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCC_RESERVE0, 0x00041000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

277

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCC_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

278

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCD_RESERVE0, 0x00040000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

279

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCD_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

280

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_MISC, 0x00000017, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

281

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_ENABLE, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

282

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SA_UNIT_DISABLE, 0x00fffc01, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

283

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_PRIM_CONFIG, 0x000fffe1, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

284

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_RB_BACKEND_DISABLE, 0x00000f01, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

285

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xfffe0001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

286

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL1_PIPE_STEER, 0x000000e4, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

287

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCH_PIPE_STEER, 0x000000e4, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

288

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_0, 0x01231023, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

289

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x00000243, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

290

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCUTCL2_HARVEST_BYPASS_GROUPS, 0x00000002, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

291

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

292

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

293

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

294

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_START, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

295

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_END, 0x000001ff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

296

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

297

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x000061ff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

298

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

299

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT1_CNTL, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

300

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_APT_CNTL, 0x0000000c, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

301

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_TOP_OF_DRAM_SLOT1, 0xff800000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

302

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_LOWER_TOP_OF_DRAM2, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

303

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_UPPER_TOP_OF_DRAM2, 0x00000fff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

304

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BASE, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

305

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BOT, 0x00000002, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

306

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_TOP, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

307

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, 0x00001ffc, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

308

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL2, 0x00002825, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

309

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000501, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

310

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL, 0x00080603, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

311

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL2, 0x00000003, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

312

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL3, 0x00100003, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

313

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL5, 0x00003fe0, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

314

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

315

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CONTEXT0_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES, 0x00000c00, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

316

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT1_CNTL, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

317

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CONTEXT1_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES, 0x00000c00, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

318

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA0_UCODE_SELFLOAD_CONTROL, 0x00000210, 0),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

319

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA1_UCODE_SELFLOAD_CONTROL, 0x00000210, 0),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

320

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPC_PSP_DEBUG, CPC_PSP_DEBUG__GPA_OVERRIDE_MASK, 0),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

321

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPG_PSP_DEBUG, CPG_PSP_DEBUG__GPA_OVERRIDE_MASK, 0)

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

347

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

348

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

349

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

352

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

353

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

354

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

361

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

381

reg_data = RREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0.c

383

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

100

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL2, 0x00020000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

101

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA0_UCODE_SELFLOAD_CONTROL, 0x00000210, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

102

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA1_UCODE_SELFLOAD_CONTROL, 0x00000210, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

103

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPC_PSP_DEBUG, CPC_PSP_DEBUG__GPA_OVERRIDE_MASK, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

104

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCPG_PSP_DEBUG, CPG_PSP_DEBUG__GPA_OVERRIDE_MASK, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

130

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

131

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

132

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

135

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

136

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

137

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

31

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_IO_RD_COMBINE_FLUSH, 0x00055555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

32

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_IO_WR_COMBINE_FLUSH, 0x00055555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

33

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_DRAM_COMBINE_FLUSH, 0x00555555, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

34

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_MISC2, 0x00001ffe, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

35

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_CREDITS, 0x003f3fff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

36

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_TAG_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

37

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCC_RESERVE0, 0x00041000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

38

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCC_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

39

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCD_RESERVE0, 0x00040000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

40

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_VCD_RESERVE1, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

41

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_MISC, 0x00000017, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

42

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGUS_SDP_ENABLE, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

43

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_CREDITS, 0x003f3fbf, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

44

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_TAG_RESERVE0, 0x10200800, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

45

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_TAG_RESERVE1, 0x00000088, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

46

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_VCC_RESERVE0, 0x1d041040, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

47

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_VCC_RESERVE1, 0x80000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

48

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_IO_PRIORITY, 0x88888888, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

49

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_MAM_CTRL, 0x0000d800, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

50

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_ARB_FINAL, 0x000007ff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

51

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_DRAM_PAGE_BURST, 0x20080200, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

52

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_SDP_ENABLE, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

53

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL2, 0x00020000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

54

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_APT_CNTL, 0x0000000c, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

55

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

56

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCEA_MISC, 0x0c48bff0, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

57

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SA_UNIT_DISABLE, 0x00fffc01, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

58

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_PRIM_CONFIG, 0x000fffe1, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

59

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_RB_BACKEND_DISABLE, 0xffffff01, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

60

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xfffe0001, 0x40000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

61

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xfffe0001, 0x42000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

62

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xffff0001, 0x44000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

63

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xffff0001, 0x46000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

64

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xffff0001, 0x48000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

65

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_ARRAY_CONFIG, 0xffff0001, 0x4A000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

66

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCGTS_TCC_DISABLE, 0x00000001, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

67

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SHADER_RATE_CONFIG, 0x00000001, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

68

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_EDC_CONFIG, 0x00000001, 0x00000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

69

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

70

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

71

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

72

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_START, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

73

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_END, 0x000005ff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

74

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

75

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x000065ff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

76

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

77

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT1_CNTL, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

78

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_TOP_OF_DRAM_SLOT1, 0xff800000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

79

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_LOWER_TOP_OF_DRAM2, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

80

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_UPPER_TOP_OF_DRAM2, 0x00000fff, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

81

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, 0x00001ffc, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

82

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000551, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

83

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL, 0x00080603, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

84

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL2, 0x00000003, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

85

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL3, 0x00100003, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

86

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL5, 0x00003fe0, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

87

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

88

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CONTEXT0_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES, 0x00000c00, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

89

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT1_CNTL, 0x00000001, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

90

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CONTEXT1_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES, 0x00000c00, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

91

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x00000444, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

92

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_0, 0x54105410, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

93

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_2, 0x76323276, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

94

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x00000244, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

95

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCUTCL2_HARVEST_BYPASS_GROUPS, 0x00000006, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

96

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_APT_CNTL, 0x0000000c, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

97

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BASE, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

98

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BOT, 0x00000002, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v11_0_3.c

99

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_TOP, 0x00000000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

102

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

105

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

107

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, adev->gfx.imu_fw_version);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

114

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

117

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_DATA, le32_to_cpup(fw_data++));

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

119

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, adev->gfx.imu_fw_version);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

130

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_GFX_RESET_CTRL);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

148

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL0, 0xffffff);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

149

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL1, 0xffff);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

152

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

154

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16, imu_reg_val);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

156

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

158

WREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10, imu_reg_val);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

167

imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

169

WREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL, imu_reg_val);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

178

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCH_PIPE_STEER, 0x1e4, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

179

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL1X_PIPE_STEER, 0x1e4, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

180

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL1_PIPE_STEER, 0x1e4, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

181

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_0, 0x13571357, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

182

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_1, 0x64206420, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

183

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_2, 0x2460246, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

184

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2_PIPE_STEER_3, 0x75317531, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

185

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGL2C_CTRL3, 0xc0d41183, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

186

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA0_CHICKEN_BITS, 0x507d1c0, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

187

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regSDMA1_CHICKEN_BITS, 0x507d1c0, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

188

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCP_RB_WPTR_POLL_CNTL, 0x600100, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

189

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_CREDITS, 0x3f7fff, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

190

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_CREDITS, 0x3f7ebf, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

191

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_TAG_RESERVE0, 0x2e00000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

192

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_TAG_RESERVE1, 0x1a078, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

193

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_TAG_RESERVE2, 0x0, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

194

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_TAG_RESERVE0, 0x0, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

195

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_TAG_RESERVE1, 0x12030, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

196

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_TAG_RESERVE2, 0x0, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

197

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_VCC_RESERVE0, 0x19041000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

198

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_VCC_RESERVE1, 0x80000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

199

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_VCC_RESERVE0, 0x1e080000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

200

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_VCC_RESERVE1, 0x80000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

201

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_PRIORITY, 0x880, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

202

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_PRIORITY, 0x8880, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

203

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_ARB_FINAL, 0x17, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

204

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_ARB_FINAL, 0x77, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

205

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_SDP_ENABLE, 0x00000001, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

206

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_SDP_ENABLE, 0x00000001, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

207

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL2, 0x20000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

208

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_APT_CNTL, 0x0c, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

209

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0xfffff, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

210

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_CPWD_MISC, 0x0091, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

211

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGC_EA_SE_MISC, 0x0091, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

212

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGRBM_GFX_INDEX, 0xe0000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

213

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCR_GENERAL_CNTL, 0x00008500, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

214

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regPA_CL_ENHANCE, 0x00880007, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

215

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regTD_CNTL, 0x00000001, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

216

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGRBM_GFX_INDEX, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

217

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regRMI_GENERAL_CNTL, 0x01e00000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

218

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGRBM_GFX_INDEX, 0x00000001, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

219

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regRMI_GENERAL_CNTL, 0x01e00000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

220

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGRBM_GFX_INDEX, 0x00000100, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

221

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regRMI_GENERAL_CNTL, 0x01e00000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

222

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGRBM_GFX_INDEX, 0x00000101, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

223

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regRMI_GENERAL_CNTL, 0x01e00000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

224

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGRBM_GFX_INDEX, 0xe0000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

225

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x08200545, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

226

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGRBMH_CP_PERFMON_CNTL, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

227

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCB_PERFCOUNTER0_SELECT1, 0x000fffff, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

228

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCP_DEBUG_2, 0x00020000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

229

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCP_CPC_DEBUG, 0x00500010, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

230

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000500, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

231

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x00000001, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

232

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

233

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_START, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

234

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_END, 0x0000000f, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

235

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_BASE, 0x00006000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

236

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x0000600f, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

237

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT0_CNTL, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

238

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_CONTEXT1_CNTL, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

239

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_TOP_OF_DRAM_SLOT1, 0xff800000, 0xe0000000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

240

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_LOWER_TOP_OF_DRAM2, 0x00000001, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

241

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_NB_UPPER_TOP_OF_DRAM2, 0x0000ffff, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

242

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BASE, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

243

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_BOT, 0x00000002, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

244

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_AGP_TOP, 0x00000000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

245

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, 0x00001ffc, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

246

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, 0x00000551, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

247

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL, 0x00080603, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

248

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL2, 0x00000003, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

249

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL3, 0x00100003, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

250

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCVM_L2_CNTL5, 0x00003fe0, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

251

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x0003d000, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

252

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0x0003d7ff, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

253

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, 0, 0x1c0000),

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

254

IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, 0, 0x1c0000)

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

279

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

280

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

281

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

308

if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_FB_LOCATION_BASE))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

310

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_FB_LOCATION_TOP))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

312

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_FB_OFFSET))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

314

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_AGP_BASE))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

316

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_AGP_BOT))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

318

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_AGP_TOP))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

320

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

322

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

324

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

326

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_START))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

328

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_LOCAL_FB_ADDRESS_END))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

330

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_LOCAL_SYSMEM_ADDRESS_START))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

332

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_LOCAL_SYSMEM_ADDRESS_END))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

334

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

336

else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB))

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

356

if (reg == SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX)) {

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

360

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, val_h);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

361

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg | val_l);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

362

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

373

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

390

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

391

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

392

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

394

reg_data = RREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX);

sys/dev/pci/drm/amd/amdgpu/imu_v12_0.c

396

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1002

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1033

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1037

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1039

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1043

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1045

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1049

WREG32_SOC15(GC, 0, regCP_MES_MIBOUND_LO, 0x1FFFFF);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1052

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_LO,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1054

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1058

WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1062

data = RREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1065

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1068

data = RREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1070

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1218

data = RREG32_SOC15(GC, 0, regCP_HQD_VMID);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1220

WREG32_SOC15(GC, 0, regCP_HQD_VMID, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1223

data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1226

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1229

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1230

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1233

data = RREG32_SOC15(GC, 0, regCP_MQD_CONTROL);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1235

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1238

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1239

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1242

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1244

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1248

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1251

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1253

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1257

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1261

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1264

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, mqd->cp_hqd_active);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1517

if (RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1518

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1520

if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1525

data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1530

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1532

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1534

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1535

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1536

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1548

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1551

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1559

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

1561

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

404

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

411

WREG32_SOC15(GC, 0, regCP_VMID_RESET, value);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

419

if (!(RREG32_SOC15(GC, 0, regCP_GFX_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

435

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

436

WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

440

if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

455

reg = SOC15_REG_OFFSET(GC, 0, regSDMA1_QUEUE_RESET_REQ);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

459

reg = SOC15_REG_OFFSET(GC, 0, regSDMA0_QUEUE_RESET_REQ);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

933

RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

936

RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

950

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

952

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

955

RREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI),

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

956

RREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO));

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

959

data = RREG32_SOC15(GC, 0, regCP_MES_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

963

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

974

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

976

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

986

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v11_0.c

993

data = RREG32_SOC15(GC, 0, regCP_MES_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1096

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1099

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1103

RREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI),

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1104

RREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO));

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1108

data = RREG32_SOC15(GC, 0, regCP_MES_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1113

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1116

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1118

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1127

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1140

data = RREG32_SOC15(GC, 0, regCP_MES_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1148

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1166

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1168

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1202

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_CNTL, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1205

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_LO,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1207

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1211

WREG32_SOC15(GC, 0, regCP_MES_MIBOUND_LO, 0x1FFFFF);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1214

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_LO,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1216

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1220

WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1224

data = RREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1227

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1230

data = RREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1232

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1385

data = RREG32_SOC15(GC, 0, regCP_HQD_VMID);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1387

WREG32_SOC15(GC, 0, regCP_HQD_VMID, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1390

data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1393

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1396

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1397

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1400

data = RREG32_SOC15(GC, 0, regCP_MQD_CONTROL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1402

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1405

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1406

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1409

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1411

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1415

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1418

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1420

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1424

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1428

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1431

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, mqd->cp_hqd_active);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1502

adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1504

adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1697

if (RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1) {

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1698

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1700

if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1705

data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1710

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1712

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1714

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1715

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1716

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR, 0);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1730

tmp = RREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

1733

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

389

WREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX, tmp);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

391

val = RREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

429

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX,

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

436

WREG32_SOC15(GC, 0, regCP_VMID_RESET, value);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

444

if (!(RREG32_SOC15(GC, 0, regCP_GFX_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

460

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

461

WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

465

if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

480

reg = SOC15_REG_OFFSET(GC, 0, regSDMA1_QUEUE_RESET_REQ);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

484

reg = SOC15_REG_OFFSET(GC, 0, regSDMA0_QUEUE_RESET_REQ);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

809

data = RREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL1);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

816

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL1, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

818

data = RREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL2);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

825

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL2, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

827

data = RREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL3);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

834

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL3, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

836

data = RREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL4);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

843

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL4, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

845

data = RREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL5);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

852

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL5, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

855

WREG32_SOC15(GC, 0, regCP_HQD_GFX_CONTROL, data);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

863

uint32_t data = RREG32_SOC15(GC, 0, regCP_UNMAPPED_DOORBELL);

sys/dev/pci/drm/amd/amdgpu/mes_v12_0.c

876

WREG32_SOC15(GC, 0, regCP_UNMAPPED_DOORBELL, data);

sys/dev/pci/drm/amd/amdgpu/nv.c

283

address = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_INDEX);

sys/dev/pci/drm/amd/amdgpu/nv.c

284

data = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/nv.c

297

address = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_INDEX);

sys/dev/pci/drm/amd/amdgpu/nv.c

298

data = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/nv.c

326

WREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL, grbm_gfx_cntl);

sys/dev/pci/drm/amd/amdgpu/nv.c

336

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS)},

sys/dev/pci/drm/amd/amdgpu/nv.c

337

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},

sys/dev/pci/drm/amd/amdgpu/nv.c

338

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE0)},

sys/dev/pci/drm/amd/amdgpu/nv.c

339

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE1)},

sys/dev/pci/drm/amd/amdgpu/nv.c

340

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE2)},

sys/dev/pci/drm/amd/amdgpu/nv.c

341

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE3)},

sys/dev/pci/drm/amd/amdgpu/nv.c

344

{ SOC15_REG_ENTRY(GC, 0, mmCP_STAT)},

sys/dev/pci/drm/amd/amdgpu/nv.c

345

{ SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/nv.c

346

{ SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT2)},

sys/dev/pci/drm/amd/amdgpu/nv.c

347

{ SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT3)},

sys/dev/pci/drm/amd/amdgpu/nv.c

348

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/nv.c

349

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/nv.c

350

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STATUS)},

sys/dev/pci/drm/amd/amdgpu/nv.c

351

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/nv.c

352

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/nv.c

353

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},

sys/dev/pci/drm/amd/amdgpu/nv.c

354

{ SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)},

sys/dev/pci/drm/amd/amdgpu/nv.c

381

if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG))

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

100

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

101

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

102

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

103

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

104

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

105

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

106

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

107

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

108

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

109

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

110

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

111

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

112

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

113

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

114

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

115

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

116

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

117

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

118

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

119

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_VM_CNTL)

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

76

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

77

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS1_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

78

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS2_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

79

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS3_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

80

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UCODE_CHECKSUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

81

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RB_RPTR_FETCH_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

82

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RB_RPTR_FETCH),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

83

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

84

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

85

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

86

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

87

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

88

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

89

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

90

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

91

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

92

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

93

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

94

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

95

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

96

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

97

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

98

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

99

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

52

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_STATUS_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

53

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_STATUS1_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

54

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_STATUS2_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

55

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_STATUS3_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

56

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_UCODE_CHECKSUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

57

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RB_RPTR_FETCH_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

58

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RB_RPTR_FETCH),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

59

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_UTCL1_RD_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

60

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_UTCL1_WR_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

61

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_UTCL1_RD_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

62

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_UTCL1_RD_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

63

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_UTCL1_WR_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

64

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_UTCL1_WR_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

65

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

66

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

67

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

68

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

69

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

70

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

71

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

72

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

73

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_IB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

74

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

75

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

76

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_GFX_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

77

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

78

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

79

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

80

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

81

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

82

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

83

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

84

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

85

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_PAGE_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

86

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

87

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

88

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

89

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

90

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

91

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

92

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

93

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

94

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_RLC0_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

95

SOC15_REG_ENTRY_STR(GC, 0, regSDMA_VM_CNTL)

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

100

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

101

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

102

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

103

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

104

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

105

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

106

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_INT_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

107

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_VM_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

108

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2)

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

119

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_CHICKEN_BITS, 0xffbf1f0f, 0x03ab0107),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

120

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

121

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

122

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

123

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

124

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC2_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

125

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

126

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

127

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

128

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC6_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

129

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC7_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

130

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_UTCL1_PAGE, 0x00ffffff, 0x000c5c00),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

131

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_CHICKEN_BITS, 0xffbf1f0f, 0x03ab0107),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

132

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

133

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

134

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1340

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1343

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1344

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1349

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

135

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1350

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

136

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC2_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

137

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

138

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

139

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

140

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC6_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

141

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC7_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

142

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_UTCL1_PAGE, 0x00ffffff, 0x000c5c00)

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

146

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

147

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

148

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

149

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

150

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC2_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

151

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

152

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

153

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

154

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC6_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

155

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC7_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

156

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

157

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

158

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

159

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

160

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC2_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

161

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

162

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

163

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

164

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC6_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

165

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC7_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

169

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC3_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

170

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

174

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

175

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

179

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

180

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GB_ADDR_CONFIG, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

181

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GB_ADDR_CONFIG_READ, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

182

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_GB_ADDR_CONFIG, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

183

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

184

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

188

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_CHICKEN_BITS, 0xffbf1f0f, 0x03ab0107),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

189

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GB_ADDR_CONFIG, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

190

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GB_ADDR_CONFIG_READ, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

191

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

192

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

193

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

194

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

195

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC2_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

196

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

197

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

198

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

199

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC6_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

200

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_RLC7_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

201

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_UTCL1_PAGE, 0x007fffff, 0x004c5c00),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

202

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_CHICKEN_BITS, 0xffbf1f0f, 0x03ab0107),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

203

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_GB_ADDR_CONFIG, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

204

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x001877ff, 0x00000044),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

205

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

206

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

207

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

208

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

209

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC2_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

210

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

211

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

212

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

213

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC6_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

214

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC7_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

215

SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_UTCL1_PAGE, 0x007fffff, 0x004c5c00)

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

355

wptr = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

357

wptr |= RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

398

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev,

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

401

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev,

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

569

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

571

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

572

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

574

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

63

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

635

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE0_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

637

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE1_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

639

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE2_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

64

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS1_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

65

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS2_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

66

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS3_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

67

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UCODE_CHECKSUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

68

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RB_RPTR_FETCH_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

69

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RB_RPTR_FETCH),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

70

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

706

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

71

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

713

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

717

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

718

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

719

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

72

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

720

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

722

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

723

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

724

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

725

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

729

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

73

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

731

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

733

wptr_poll_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i,

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

738

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

74

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

742

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

744

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

749

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

75

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

751

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

758

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

76

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

767

doorbell = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

768

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i,

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

77

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

778

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL), doorbell);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

779

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

78

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

789

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

79

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

80

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

81

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

82

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

823

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

825

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

83

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

831

WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

84

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

85

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

86

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

87

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

88

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

89

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

90

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

91

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

92

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

93

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

94

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

95

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

96

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

97

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

98

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

99

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

100

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

101

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

102

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

103

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

104

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

105

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

106

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

107

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_INT_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

108

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_VM_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

109

SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2)

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

419

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

421

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

422

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

424

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

479

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_PHASE0_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

481

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_PHASE1_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

483

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_PHASE2_QUANTUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

551

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

555

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

562

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

566

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

567

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

568

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

569

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

571

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

572

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

573

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

574

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

579

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

581

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

583

wptr_poll_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i,

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

588

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

592

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

594

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

599

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE), ring->gpu_addr >> 8);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

600

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI), ring->gpu_addr >> 40);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

606

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

613

doorbell = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

614

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

623

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL), doorbell);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

624

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET), doorbell_offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

635

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

64

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

648

temp = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

65

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS1_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

651

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

654

temp = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

66

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS2_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

660

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

67

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_STATUS3_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

670

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

672

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

678

WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

68

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UCODE_CHECKSUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

69

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RB_RPTR_FETCH_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

70

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RB_RPTR_FETCH),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

71

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

72

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

73

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

74

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_RD_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

75

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

76

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_UTCL1_WR_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

77

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

776

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

779

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

78

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

780

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

785

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

786

tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

79

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

80

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

81

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

82

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

83

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

84

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

85

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

86

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

87

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

88

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_GFX_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

89

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

90

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

91

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

92

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

93

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

94

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

95

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

96

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

97

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_PAGE_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

98

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

99

SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

100

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

101

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

102

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

103

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

104

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

105

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

106

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

107

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

108

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

109

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

110

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

111

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

112

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

113

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

114

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

115

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_INT_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

116

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS2),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

117

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_CHICKEN_BITS),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

232

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev,

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

235

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev,

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

400

rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

402

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

403

ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

405

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

466

f32_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

468

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), f32_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

494

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

498

rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

506

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

510

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

511

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

512

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

513

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

515

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

516

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

517

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

518

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

522

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

524

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

528

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

530

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

537

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

538

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE_HI), ring->gpu_addr >> 40);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

544

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

547

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

548

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

551

doorbell = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

552

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

561

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL), doorbell);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

562

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

573

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

576

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

580

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

583

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

586

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

589

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

595

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

599

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

602

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

607

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

609

ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

615

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

64

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

65

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS1_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

66

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS2_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

67

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS3_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

68

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS4_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

69

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS5_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

70

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS6_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

71

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UCODE_CHECKSUM),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

72

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_RB_RPTR_FETCH_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

73

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_RB_RPTR_FETCH),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

74

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_RD_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

75

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_WR_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

76

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_RD_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

768

tmp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_FREEZE));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

77

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_RD_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

770

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_FREEZE), tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

771

tmp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

774

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

776

WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_PREEMPT), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

78

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_WR_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

781

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

782

tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

786

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

787

tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

79

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_WR_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

80

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

81

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

82

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

83

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

84

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

85

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

86

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

87

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

879

m->sdmax_rlcx_ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, 0,

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

88

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

89

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

90

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

91

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

92

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE_STATUS0),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

93

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

94

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

95

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

96

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

97

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

98

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

99

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

100

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

101

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

102

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

103

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

104

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

105

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

106

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

107

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

108

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

109

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

110

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

111

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

112

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

113

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

114

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_INT_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

115

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_VM_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

116

SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS2),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

117

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_CHICKEN_BITS),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

234

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev,

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

238

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev,

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

404

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

406

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

407

ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

409

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

459

mcu_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

461

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL), mcu_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

490

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

498

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

502

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

503

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

504

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

505

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

507

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

508

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

509

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

510

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

514

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

516

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

520

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

522

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

533

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

534

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE_HI), ring->gpu_addr >> 40);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

540

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

543

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

544

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

547

doorbell = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

548

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

557

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL), doorbell);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

558

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

569

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

572

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

576

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

579

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

582

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

585

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

590

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

594

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

597

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL), temp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

602

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

604

ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

610

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

63

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

64

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS1_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

65

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS2_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

66

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS3_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

67

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS4_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

68

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS5_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

69

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_STATUS6_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

70

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UCODE_REV),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

71

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_RB_RPTR_FETCH_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

718

tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

72

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_RB_RPTR_FETCH),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

720

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_CNTL), tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

722

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

724

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

727

tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_OP_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

729

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_OP_CNTL), tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

73

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_RD_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

733

ic_op_cntl = RREG32_SOC15_IP(GC,

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

735

sdma_status = RREG32_SOC15_IP(GC,

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

74

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_WR_STATUS),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

75

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_RD_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

76

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_RD_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

764

tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

767

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL), tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

769

WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_PREEMPT), 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

77

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_WR_XNACK0),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

774

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

775

tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

779

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

78

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_UTCL1_WR_XNACK1),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

780

tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

79

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

80

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

81

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

82

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

83

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

84

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

85

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

86

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

87

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

88

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

89

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_IB_SUB_REMAIN),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

899

m->sdmax_rlcx_ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, 0,

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

90

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE0_DUMMY_REG),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

91

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE_STATUS0),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

92

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_CNTL),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

93

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_RPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

94

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_RPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

95

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_WPTR),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

96

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_RB_WPTR_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

97

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_OFFSET),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

98

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_BASE_LO),

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

99

SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE1_IB_BASE_HI),

sys/dev/pci/drm/amd/amdgpu/soc15.c

273

address = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_INDEX);

sys/dev/pci/drm/amd/amdgpu/soc15.c

274

data = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/soc15.c

287

address = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_INDEX);

sys/dev/pci/drm/amd/amdgpu/soc15.c

288

data = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/soc15.c

302

WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg));

sys/dev/pci/drm/amd/amdgpu/soc15.c

303

r = RREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/soc15.c

313

WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg));

sys/dev/pci/drm/amd/amdgpu/soc15.c

314

WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA, (v));

sys/dev/pci/drm/amd/amdgpu/soc15.c

324

WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg));

sys/dev/pci/drm/amd/amdgpu/soc15.c

325

r = RREG32_SOC15(GC, 0, mmSE_CAC_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/soc15.c

335

WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg));

sys/dev/pci/drm/amd/amdgpu/soc15.c

336

WREG32_SOC15(GC, 0, mmSE_CAC_IND_DATA, (v));

sys/dev/pci/drm/amd/amdgpu/soc15.c

372

WREG32_SOC15_RLC_SHADOW(GC, xcc_id, mmGRBM_GFX_CNTL, grbm_gfx_cntl);

sys/dev/pci/drm/amd/amdgpu/soc15.c

382

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

383

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

384

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE0)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

385

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE1)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

386

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE2)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

387

{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE3)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

390

{ SOC15_REG_ENTRY(GC, 0, mmCP_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

391

{ SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

392

{ SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT2)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

393

{ SOC15_REG_ENTRY(GC, 0, mmCP_STALLED_STAT3)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

394

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

395

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

396

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPF_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

397

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

398

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

399

{ SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

400

{ SOC15_REG_ENTRY(GC, 0, mmGB_ADDR_CONFIG)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

401

{ SOC15_REG_ENTRY(GC, 0, mmDB_DEBUG2)},

sys/dev/pci/drm/amd/amdgpu/soc15.c

428

if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG))

sys/dev/pci/drm/amd/amdgpu/soc15.c

430

else if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmDB_DEBUG2))

sys/dev/pci/drm/amd/amdgpu/soc15.c

487

RREG32_SOC15_IP(GC, reg) : RREG32(reg);

sys/dev/pci/drm/amd/amdgpu/soc15.c

493

if (reg == SOC15_REG_OFFSET(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3) ||

sys/dev/pci/drm/amd/amdgpu/soc15.c

494

reg == SOC15_REG_OFFSET(GC, 0, mmPA_SC_ENHANCE) ||

sys/dev/pci/drm/amd/amdgpu/soc15.c

495

reg == SOC15_REG_OFFSET(GC, 0, mmPA_SC_ENHANCE_1) ||

sys/dev/pci/drm/amd/amdgpu/soc15.c

496

reg == SOC15_REG_OFFSET(GC, 0, mmSH_MEM_CONFIG))

sys/dev/pci/drm/amd/amdgpu/soc15.c

500

WREG32_SOC15_IP(GC, reg, tmp) : WREG32(reg, tmp);

sys/dev/pci/drm/amd/amdgpu/soc21.c

198

address = SOC15_REG_OFFSET(GC, 0, regDIDT_IND_INDEX);

sys/dev/pci/drm/amd/amdgpu/soc21.c

199

data = SOC15_REG_OFFSET(GC, 0, regDIDT_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/soc21.c

212

address = SOC15_REG_OFFSET(GC, 0, regDIDT_IND_INDEX);

sys/dev/pci/drm/amd/amdgpu/soc21.c

213

data = SOC15_REG_OFFSET(GC, 0, regDIDT_IND_DATA);

sys/dev/pci/drm/amd/amdgpu/soc21.c

247

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, grbm_gfx_cntl);

sys/dev/pci/drm/amd/amdgpu/soc21.c

257

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

258

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS2)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

259

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE0)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

260

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE1)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

261

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE2)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

262

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE3)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

265

{ SOC15_REG_ENTRY(GC, 0, regCP_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

266

{ SOC15_REG_ENTRY(GC, 0, regCP_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

267

{ SOC15_REG_ENTRY(GC, 0, regCP_STALLED_STAT2)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

268

{ SOC15_REG_ENTRY(GC, 0, regCP_STALLED_STAT3)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

269

{ SOC15_REG_ENTRY(GC, 0, regCP_CPF_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

270

{ SOC15_REG_ENTRY(GC, 0, regCP_CPF_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

271

{ SOC15_REG_ENTRY(GC, 0, regCP_CPF_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

272

{ SOC15_REG_ENTRY(GC, 0, regCP_CPC_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

273

{ SOC15_REG_ENTRY(GC, 0, regCP_CPC_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

274

{ SOC15_REG_ENTRY(GC, 0, regCP_CPC_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

275

{ SOC15_REG_ENTRY(GC, 0, regGB_ADDR_CONFIG)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

302

if (reg_offset == SOC15_REG_OFFSET(GC, 0, regGB_ADDR_CONFIG) && adev->gfx.config.gb_addr_config)

sys/dev/pci/drm/amd/amdgpu/soc24.c

110

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, grbm_gfx_cntl);

sys/dev/pci/drm/amd/amdgpu/soc24.c

114

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

115

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS2)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

116

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE0)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

117

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE1)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

118

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE2)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

119

{ SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS_SE3)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

122

{ SOC15_REG_ENTRY(GC, 0, regCP_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

123

{ SOC15_REG_ENTRY(GC, 0, regCP_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

124

{ SOC15_REG_ENTRY(GC, 0, regCP_STALLED_STAT2)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

125

{ SOC15_REG_ENTRY(GC, 0, regCP_STALLED_STAT3)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

126

{ SOC15_REG_ENTRY(GC, 0, regCP_CPF_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

127

{ SOC15_REG_ENTRY(GC, 0, regCP_CPF_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

128

{ SOC15_REG_ENTRY(GC, 0, regCP_CPF_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

129

{ SOC15_REG_ENTRY(GC, 0, regCP_CPC_BUSY_STAT)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

130

{ SOC15_REG_ENTRY(GC, 0, regCP_CPC_STALLED_STAT1)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

131

{ SOC15_REG_ENTRY(GC, 0, regCP_CPC_STATUS)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

132

{ SOC15_REG_ENTRY(GC, 0, regGB_ADDR_CONFIG)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

161

if (reg_offset == SOC15_REG_OFFSET(GC, 0, regGB_ADDR_CONFIG) &&

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

707

mapped_xcc = GET_INST(GC, xcc);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

646

gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1008

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1019

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1058

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1067

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1117

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

896

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

911

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

947

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

956

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

sys/dev/pci/drm/amd/pm/swsmu/smu11/vangogh_ppt.c

2252

tmp = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_ALWAYS_ON_WGP_MASK));

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c

381

xcc_id = GET_INST(GC, 0);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c

759

inst = GET_INST(GC, k);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c

814

xcc_id = GET_INST(GC, i);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c

845

gpu_metrics->gfxclk_lock_status = metrics->GfxLockXCDMak >> GET_INST(GC, 0);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c

904

inst = GET_INST(GC, k);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

1287

xcc_id = GET_INST(GC, 0);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2706

inst = GET_INST(GC, k);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2797

xcc_id = GET_INST(GC, i);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2832

version) >> GET_INST(GC, 0);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2922

inst = GET_INST(GC, k);