DMAADDR
auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize,
"in %d segs\n", KERNADDR(dma), (u_int32_t) DMAADDR(dma), dma->size,
caddr_p = DMAADDR(c_dma);
saddr_p = DMAADDR(s_dma);
next_caddr_p = DMAADDR(c_dma);
value = DMAADDR(dma);
dmaaddr = DMAADDR(chst->dma);
(void *)DMAADDR(p), (void *)p->cd_size));
DMAADDR(p));
DMAADDR(p));
if (DMAADDR(p) % CS4280_DALIGN != 0 ) {
"4kB align\n", DMAADDR(p));
BA1WRITE4(sc, CS4280_PBA, DMAADDR(p));
if (DMAADDR(p) % CS4280_DALIGN != 0) {
"4kB align\n", DMAADDR(p));
BA1WRITE4(sc, CS4280_CBA, DMAADDR(p));
(int)DMAADDR(p), dma_count));
BA0WRITE4(sc, CS4281_DBA0, DMAADDR(p));
(int)DMAADDR(p), dma_count));
BA0WRITE4(sc, CS4281_DBA1, DMAADDR(p));
(int)DMAADDR(p),
EWRITE4(sc, EAP_ADC_ADDR, DMAADDR(p));
(int)DMAADDR(p),
EWRITE4(sc, EAP_DAC2_ADDR, DMAADDR(p));
silentpage = DMAADDR(sc->silentpage) << 1;
htole32((((DMAADDR(mem->dmamem) +
mapval = DMAADDR(sc->silentpage) << 1 | EMU_CHAN_MAP_PTI_MASK;
DMAADDR(mem->dmamem));
silentpage = DMAADDR(sc->silentpage) << 1;
silentpage = DMAADDR(sc->silentpage) << 1;
emuxki_write(sc, 0, EMU_PTB, DMAADDR(sc->ptb));
bufaddr = DMAADDR(p);
bufaddr = DMAADDR(p);
sc->sc_dev.dv_xname, (unsigned long)DMAADDR(ed)));
bus_space_write_4(sc->sc_iot, sc->sc_ioh, ESO_IO_A2DMAA, DMAADDR(ed));
sc->sc_dev.dv_xname, (unsigned long)DMAADDR(ed)));
DMAADDR(ed));
*pa = DMAADDR(map);
rxd->rx_addr = htole64(DMAADDR(map));
DMAADDR(p));
DMAADDR(p));
s = DMAADDR(p);
s = DMAADDR(p);
da = DMAADDR(p);
(long long)DMAADDR(&dpipe->req_dma, 0),
dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0);
dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0);
DMAADDR(&hsotg->status_buf_dma_usb, 0);
qh->desc_list_dma = DMAADDR(&qh->desc_list_usbdma, 0);
hsotg->frame_list_dma = DMAADDR(&hsotg->frame_list_usbdma, 0);
dma_desc->buf = (u32)(DMAADDR(qtd->urb->usbdma, frame_desc->offset));
chan->xfer_dma = DMAADDR(qtd->urb->usbdma,
dma_desc->buf = (u32)(DMAADDR(qtd->urb->usbdma, frame_desc->offset));
EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
sqh->physaddr = DMAADDR(&dma, offs);
sqtd->physaddr = DMAADDR(&dma, offs);
dataphys = DMAADDR(dma, 0);
itd->physaddr = DMAADDR(&dma, offs);
setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
int addr = DMAADDR(&xfer->dmabuf, froffs);
EHCI_ITD_SET_OFFS(DMAADDR(&xfer->dmabuf, offs))
long long page = DMAADDR(&xfer->dmabuf, page_offs);
uint32_t addr = DMAADDR(&xfer->dmabuf, offs);
EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
buf = DMAADDR(&xfer->dmabuf, 0);
OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
sed->physaddr = DMAADDR(&dma, offs);
std->physaddr = DMAADDR(&dma, offs);
dataphys = DMAADDR(dma, 0);
sitd->physaddr = DMAADDR(&dma, offs);
OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
std->physaddr = DMAADDR(&dma, offs);
sqh->physaddr = DMAADDR(&dma, offs);
p->td.td_buffer = htole32(DMAADDR(dma, i * mps));
setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
buf = DMAADDR(&xfer->dmabuf, 0);
UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
trb->trb_paddr = htole64(DMAADDR(&xfer->dmabuf, 0));
uint64_t paddr = DMAADDR(&xfer->dmabuf, 0);
trb0->trb_paddr = htole64(DMAADDR(&xfer->dmabuf, 0));
paddr = DMAADDR(&xfer->dmabuf, 0);
paddr = DMAADDR(&xfer->dmabuf, 0);