DIV_ROUND_CLOSEST
*ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div);
*ref_div = clamp(DIV_ROUND_CLOSEST(den, post_div), 1u, ref_div_max);
*fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);
lum = DIV_ROUND_CLOSEST(caps->luminance_data[0].luminance * brightness,
lum = lower_lum + DIV_ROUND_CLOSEST((upper_lum - lower_lum) *
DIV_ROUND_CLOSEST(lum * brightness, 101));
props.brightness = DIV_ROUND_CLOSEST((max - min) * caps->ac_level, 100);
props.brightness = DIV_ROUND_CLOSEST((max - min) * caps->dc_level, 100);
fxp = DIV_ROUND_CLOSEST(1000 * DP_EDP_BACKLIGHT_FREQ_BASE_KHZ, driver_pwm_freq_hz);
fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4);
fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4);
f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
return DIV_ROUND_CLOSEST(mode->clock, mode->htotal);
clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
q = DIV_ROUND_CLOSEST(min_cll, 255);
min = max * DIV_ROUND_CLOSEST((q * q), 100);
dotclock = DIV_ROUND_CLOSEST(pipe_config->port_clock * 2, 3);
DIV_ROUND_CLOSEST(dram_info->fsb_freq, 1000) == latency->fsb_freq &&
DIV_ROUND_CLOSEST(dram_info->mem_freq, 1000) == latency->mem_freq)
return DIV_ROUND_CLOSEST(intel_dsi->pclk * bpp, intel_dsi->lane_count);
return DIV_ROUND_CLOSEST(KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq),
return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
return DIV_ROUND_CLOSEST(KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq),
return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
new_bw_state->qgv_point_peakbw = DIV_ROUND_CLOSEST(qgv_peak_bw, 100);
sp->dclk = DIV_ROUND_CLOSEST(16667 * dclk, 1000);
return DIV_ROUND_CLOSEST(64 * clk * 100, 6);
bi->peakbw[j] = DIV_ROUND_CLOSEST(sp->dclk *
return DIV_ROUND_CLOSEST(cdclk - 1000, 500);
return DIV_ROUND_CLOSEST(vco * cdclk_squash_divider(waveform),
cdclk_config->cdclk = DIV_ROUND_CLOSEST(hweight16(waveform) *
cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div);
int ratio = DIV_ROUND_CLOSEST(vco, display->cdclk.hw.ref);
int ratio = DIV_ROUND_CLOSEST(vco, display->cdclk.hw.ref);
int ratio = DIV_ROUND_CLOSEST(vco, display->cdclk.hw.ref);
mid_cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_squash_divider(mid_waveform) *
a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
rawclk |= CNP_RAWCLK_DEN(DIV_ROUND_CLOSEST(numerator * 1000,
return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco,
cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco,
return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;
divider = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1,
DIV_ROUND_CLOSEST(cdclk, 1000) - 1);
return DIV_ROUND_CLOSEST(val * ((1 << 16) - 1),
frac = frac_quot + DIV_ROUND_CLOSEST(frac_rem, frac_den);
ref = DIV_ROUND_CLOSEST(refclk * (1 << (1 + fb_clk_div4_en)), 1 << ref_clk_mpllb_div);
DIV_ROUND_CLOSEST(refclk * frac_rem, frac_den),
return DIV_ROUND_CLOSEST(ref_freq << 1, divider + 1);
dotclock = DIV_ROUND_CLOSEST(pipe_config->port_clock * 24,
linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8,
linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8,
DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
DIV_ROUND_CLOSEST(DISPLAY_RUNTIME_INFO(display)->rawclk_freq,
return DIV_ROUND_CLOSEST(rate * 10, intel_dp_link_symbol_size(rate));
return DIV_ROUND_CLOSEST(freq, 2000);
return DIV_ROUND_CLOSEST(DISPLAY_RUNTIME_INFO(display)->rawclk_freq, 2000);
DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
DIV_ROUND_CLOSEST(clock->vco, clock->p);
DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);
DIV_ROUND_CLOSEST(clock->vco, clock->p);
DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
DIV_ROUND_CLOSEST(clock->vco, clock->p);
DIV_ROUND_CLOSEST(clock->vco, clock->p);
clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n,
dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2);
return DIV_ROUND_CLOSEST(clock * bpc, 8);
frac_val = DIV_ROUND_CLOSEST(frac_val, (int)int_pow(10, frac_digits));
DIV_ROUND_CLOSEST(adjusted_mode->clock * 1000,
return DIV_ROUND_CLOSEST(p->iclk_virtual_root_freq,
p->desired_divisor = DIV_ROUND_CLOSEST(p->iclk_virtual_root_freq,
DIV_ROUND_CLOSEST(refclk * frac_rem, frac_den),
contrast = DIV_ROUND_CLOSEST(255 << 6, 235 - 16);
brightness = -DIV_ROUND_CLOSEST(16 * 255, 235 - 16);
sh_scale = DIV_ROUND_CLOSEST(128 << 7, 240 - 128);
return DIV_ROUND_CLOSEST(dsi_clock * intel_dsi->lane_count, bpp);
return DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);
div1_value = DIV_ROUND_CLOSEST(ddr_clk, 20000);
dsi_clk_khz = DIV_ROUND_CLOSEST(pclk * bpp, lane_count);
return DIV_ROUND_CLOSEST(intel_fsb_freq(uncore->i915), 4) * 1000;
ia_freq = DIV_ROUND_CLOSEST(ia_freq, 100);
return DIV_ROUND_CLOSEST(rps->gpll_ref_freq * (val - 0xb7), 1000);
return DIV_ROUND_CLOSEST(1000 * val, rps->gpll_ref_freq) + 0xb7;
return DIV_ROUND_CLOSEST(rps->gpll_ref_freq * val, 2 * 2 * 1000);
return DIV_ROUND_CLOSEST(2 * 1000 * val, rps->gpll_ref_freq) * 2;
return DIV_ROUND_CLOSEST(val * GT_FREQUENCY_MULTIPLIER,
return DIV_ROUND_CLOSEST(val * GEN9_FREQ_SCALER,
return DIV_ROUND_CLOSEST(val, GT_FREQUENCY_MULTIPLIER);
return DIV_ROUND_CLOSEST(slpc->rp0_freq,
return DIV_ROUND_CLOSEST(slpc->min_freq,
cparams[i].t == DIV_ROUND_CLOSEST(mem_freq, 1000)) {
#define FREQUENCY_REQ_UNIT DIV_ROUND_CLOSEST(GT_FREQUENCY_MULTIPLIER, \
return DIV_ROUND_CLOSEST(REG_FIELD_GET(SLPC_MIN_UNSLICE_FREQ_MASK,
return DIV_ROUND_CLOSEST(REG_FIELD_GET(SLPC_MAX_UNSLICE_FREQ_MASK,
clock.dot = DIV_ROUND_CLOSEST(clock.vco, clock.p);
*val = DIV_ROUND_CLOSEST(REG_FIELD_GET(GEN12_VOLTAGE_MASK, reg_value) * 25, 10);
return DIV_ROUND_CLOSEST(ns, 1 << TF_BIAS);
return DIV_ROUND_CLOSEST(user_input * ((1 << bit_precision) - 1),
#define DIV_ROUND_CLOSEST_ULL(x, y) DIV_ROUND_CLOSEST(x, y)
*fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);