DISPLAY_RUNTIME_INFO
return DIV_ROUND_CLOSEST(KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq),
return DIV_ROUND_CLOSEST(KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq),
clock = KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq);
clock = KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq);
clock = KHz(DISPLAY_RUNTIME_INFO(display)->rawclk_freq);
unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask;
crtc->num_scalers = DISPLAY_RUNTIME_INFO(display)->num_scalers[pipe];
zpos = DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + 1;
if (DISPLAY_RUNTIME_INFO(display)->edp_typec_support)
return pipes & DISPLAY_RUNTIME_INFO(display)->pipe_mask;
return !drm_WARN(display->drm, !(DISPLAY_RUNTIME_INFO(display)->port_mask & BIT(port)),
for_each_if(DISPLAY_RUNTIME_INFO(__dev_priv)->pipe_mask & BIT(__p))
for_each_if (DISPLAY_RUNTIME_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
(__s) < DISPLAY_RUNTIME_INFO(__dev_priv)->num_sprites[(__p)]; \
DISPLAY_RUNTIME_INFO(display), &p);
memcpy(DISPLAY_RUNTIME_INFO(display),
sizeof(*DISPLAY_RUNTIME_INFO(display)));
DISPLAY_RUNTIME_INFO(display)->ip = ip_ver;
DISPLAY_RUNTIME_INFO(display)->step = step;
DISPLAY_RUNTIME_INFO(display)->ip.ver,
DISPLAY_RUNTIME_INFO(display)->ip.rel,
struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(display);
#define HAS_DBUF_OVERLAP_DETECTION(__display) (DISPLAY_RUNTIME_INFO(__display)->has_dbuf_overlap_detection)
#define HAS_DISPLAY(__display) (DISPLAY_RUNTIME_INFO(__display)->pipe_mask != 0)
#define HAS_DMC(__display) (DISPLAY_RUNTIME_INFO(__display)->has_dmc)
#define HAS_DSC(__display) (DISPLAY_RUNTIME_INFO(__display)->has_dsc)
#define HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
#define HAS_TRANSCODER(__display, trans) ((DISPLAY_RUNTIME_INFO(__display)->cpu_transcoder_mask & \
#define INTEL_NUM_PIPES(__display) (hweight8(DISPLAY_RUNTIME_INFO(__display)->pipe_mask))
#define DISPLAY_VER(__display) (DISPLAY_RUNTIME_INFO(__display)->ip.ver)
#define DISPLAY_VERx100(__display) (DISPLAY_RUNTIME_INFO(__display)->ip.ver * 100 + \
DISPLAY_RUNTIME_INFO(__display)->ip.rel)
#define INTEL_DISPLAY_STEP(__display) (DISPLAY_RUNTIME_INFO(__display)->step)
DISPLAY_RUNTIME_INFO(display), &p);
drm_WARN_ON(display->drm, DISPLAY_RUNTIME_INFO(display)->rawclk_freq == 0);
DIV_ROUND_CLOSEST(DISPLAY_RUNTIME_INFO(display)->rawclk_freq,
memcpy(&snapshot->runtime_info, DISPLAY_RUNTIME_INFO(display),
freq = DISPLAY_RUNTIME_INFO(display)->rawclk_freq;
return DIV_ROUND_CLOSEST(DISPLAY_RUNTIME_INFO(display)->rawclk_freq, 2000);
for_each_if(DISPLAY_RUNTIME_INFO(__display)->fbc_mask & BIT(__fbc_id))
return DISPLAY_RUNTIME_INFO(display)->has_hdcp &&
int div = DISPLAY_RUNTIME_INFO(display)->rawclk_freq / 1000;
return pipe * DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + sprite + 'A';
if ((DISPLAY_RUNTIME_INFO(display)->fbc_mask & BIT(fbc_id)) == 0)