Symbol: DF
bin/pax/options.c
346
flg |= DF;
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
109
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
117
WREG32_FIELD15(DF, 0, DF_CS_AON0_CoherentSlaveModeCtrlA0,
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
49
tmp = RREG32_SOC15(DF, 0, mmFabricConfigAccessControl);
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
51
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
53
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
61
tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
88
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
91
WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
93
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
sys/dev/pci/drm/amd/amdgpu/df_v1_7.c
96
WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
227
tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DfGlobalCtrl);
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
270
tmp = RREG32_SOC15(DF, 0, mmFabricConfigAccessControl);
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
272
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
274
WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
283
tmp = RREG32_SOC15(DF, 0, mmDF_GCM_AON0_DramMegaBaseAddress0);
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
287
tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DramBaseAddress0);
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
316
tmp = RREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
320
WREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
323
tmp = RREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
327
WREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
342
tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater);
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
647
hw_assert_msklo = RREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/amdgpu/df_v3_6.c
649
hw_assert_mskhi = RREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/amdgpu/df_v4_15.c
37
tmp = RREG32_SOC15(DF, 0, regNCSConfigurationRegister1);
sys/dev/pci/drm/amd/amdgpu/df_v4_15.c
39
WREG32_SOC15(DF, 0, regNCSConfigurationRegister1, tmp);
sys/dev/pci/drm/amd/amdgpu/df_v4_3.c
34
hw_assert_msklo = RREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/amdgpu/df_v4_3.c
36
hw_assert_mskhi = RREG32_SOC15(DF, 0,
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
943
data->mem_channels = (RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0) &
usr.sbin/lpr/common_source/common.c
67
char *DF; /* name of tex filter (per job) */
usr.sbin/lpr/common_source/lp.h
43
extern char *DF; /* name of tex filter (per job) */
usr.sbin/lpr/lpd/printjob.c
1327
cgetstr(bp, "df", &DF);
usr.sbin/lpr/lpd/printjob.c
663
prog = (format == 't') ? TF : (format == 'n') ? NF : DF;