sys/dev/pci/drm/i915/display/icl_dsi.c

1396

intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);

sys/dev/pci/drm/i915/display/icl_dsi.c

535

intel_de_rmw(display, DDI_BUF_CTL(port), 0, DDI_BUF_CTL_ENABLE);

sys/dev/pci/drm/i915/display/intel_ddi.c

3089

intel_de_write(display, DDI_BUF_CTL(port), buf_ctl | DDI_BUF_CTL_ENABLE);

sys/dev/pci/drm/i915/display/intel_ddi.c

3101

intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);

sys/dev/pci/drm/i915/display/intel_ddi.c

3766

intel_dp->DP |= DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/display/intel_ddi.c

3810

intel_dp->DP |= DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/display/intel_ddi.c

819

if (!(tmp & DDI_BUF_CTL_ENABLE))

sys/dev/pci/drm/i915/display/intel_fdi.c

904

DDI_BUF_CTL_ENABLE |

sys/dev/pci/drm/i915/display/intel_fdi.c

950

intel_de_rmw(display, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);

sys/dev/pci/drm/i915/display/intel_fdi.c

985

intel_de_rmw(display, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);

sys/dev/pci/drm/i915/display/intel_hdmi.c

77

enabled_bits = HAS_DDI(display) ? DDI_BUF_CTL_ENABLE : SDVO_ENABLE;

sys/dev/pci/drm/i915/display/intel_tc.c

1576

DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/display.c

233

DDI_BUF_CTL_ENABLE);

sys/dev/pci/drm/i915/gvt/display.c

295

(DDI_BUF_CTL_ENABLE | DDI_INIT_DISPLAY_DETECTED);

sys/dev/pci/drm/i915/gvt/display.c

325

DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/display.c

356

DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/display.c

437

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/display.c

463

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/display.c

489

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/handlers.c

813

if (vgpu_vreg(vgpu, offset) & DDI_BUF_CTL_ENABLE) {

sys/dev/pci/drm/i915/gvt/handlers.c

840

if ((ddi_buf_ctl & DDI_BUF_CTL_ENABLE) &&