sys/arch/alpha/alpha/db_interface.c
100
{ "t3", &ddb_regs.tf_regs[FRAME_T3], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
101
{ "t4", &ddb_regs.tf_regs[FRAME_T4], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
102
{ "t5", &ddb_regs.tf_regs[FRAME_T5], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
103
{ "t6", &ddb_regs.tf_regs[FRAME_T6], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
104
{ "t7", &ddb_regs.tf_regs[FRAME_T7], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
105
{ "s0", &ddb_regs.tf_regs[FRAME_S0], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
106
{ "s1", &ddb_regs.tf_regs[FRAME_S1], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
107
{ "s2", &ddb_regs.tf_regs[FRAME_S2], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
108
{ "s3", &ddb_regs.tf_regs[FRAME_S3], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
109
{ "s4", &ddb_regs.tf_regs[FRAME_S4], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
110
{ "s5", &ddb_regs.tf_regs[FRAME_S5], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
111
{ "s6", &ddb_regs.tf_regs[FRAME_S6], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
112
{ "a0", &ddb_regs.tf_regs[FRAME_A0], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
113
{ "a1", &ddb_regs.tf_regs[FRAME_A1], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
114
{ "a2", &ddb_regs.tf_regs[FRAME_A2], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
115
{ "a3", &ddb_regs.tf_regs[FRAME_A3], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
116
{ "a4", &ddb_regs.tf_regs[FRAME_A4], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
117
{ "a5", &ddb_regs.tf_regs[FRAME_A5], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
118
{ "t8", &ddb_regs.tf_regs[FRAME_T8], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
119
{ "t9", &ddb_regs.tf_regs[FRAME_T9], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
120
{ "t10", &ddb_regs.tf_regs[FRAME_T10], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
121
{ "t11", &ddb_regs.tf_regs[FRAME_T11], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
122
{ "ra", &ddb_regs.tf_regs[FRAME_RA], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
123
{ "t12", &ddb_regs.tf_regs[FRAME_T12], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
124
{ "at", &ddb_regs.tf_regs[FRAME_AT], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
125
{ "gp", &ddb_regs.tf_regs[FRAME_GP], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
126
{ "sp", &ddb_regs.tf_regs[FRAME_SP], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
127
{ "pc", &ddb_regs.tf_regs[FRAME_PC], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
128
{ "ps", &ddb_regs.tf_regs[FRAME_PS], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
129
{ "ai", &ddb_regs.tf_regs[FRAME_T11], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
130
{ "pv", &ddb_regs.tf_regs[FRAME_T12], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
273
return (regs->tf_regs[reg_to_frame[regno]]);
sys/arch/alpha/alpha/db_interface.c
96
{ "v0", &ddb_regs.tf_regs[FRAME_V0], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
97
{ "t0", &ddb_regs.tf_regs[FRAME_T0], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
98
{ "t1", &ddb_regs.tf_regs[FRAME_T1], FCN_NULL },
sys/arch/alpha/alpha/db_interface.c
99
{ "t2", &ddb_regs.tf_regs[FRAME_T2], FCN_NULL },
sys/arch/alpha/alpha/db_trace.c
192
slot[i] = ®s->tf_regs[0] +
sys/arch/alpha/alpha/db_trace.c
193
((u_long *)db_regs[i].valuep - &ddb_regs.tf_regs[0]);
sys/arch/alpha/alpha/db_trace.c
194
frame = (u_long *)regs->tf_regs[FRAME_SP];
sys/arch/alpha/alpha/db_trace.c
195
pc = (vaddr_t)regs->tf_regs[FRAME_PC];
sys/arch/alpha/alpha/db_trace.c
196
ra = (vaddr_t)regs->tf_regs[FRAME_RA];
sys/arch/alpha/alpha/fp_complete.c
625
pc = (alpha_instruction *)p->p_md.md_tf->tf_regs[FRAME_PC];
sys/arch/alpha/alpha/fp_complete.c
693
p->p_md.md_tf->tf_regs[FRAME_PC] = usertrap_pc;
sys/arch/alpha/alpha/interrupt.c
331
printf(" pc = 0x%lx\n", framep->tf_regs[FRAME_PC]);
sys/arch/alpha/alpha/interrupt.c
332
printf(" ra = 0x%lx\n", framep->tf_regs[FRAME_RA]);
sys/arch/alpha/alpha/machdep.c
1250
regp->r_regs[R_V0] = framep->tf_regs[FRAME_V0];
sys/arch/alpha/alpha/machdep.c
1251
regp->r_regs[R_T0] = framep->tf_regs[FRAME_T0];
sys/arch/alpha/alpha/machdep.c
1252
regp->r_regs[R_T1] = framep->tf_regs[FRAME_T1];
sys/arch/alpha/alpha/machdep.c
1253
regp->r_regs[R_T2] = framep->tf_regs[FRAME_T2];
sys/arch/alpha/alpha/machdep.c
1254
regp->r_regs[R_T3] = framep->tf_regs[FRAME_T3];
sys/arch/alpha/alpha/machdep.c
1255
regp->r_regs[R_T4] = framep->tf_regs[FRAME_T4];
sys/arch/alpha/alpha/machdep.c
1256
regp->r_regs[R_T5] = framep->tf_regs[FRAME_T5];
sys/arch/alpha/alpha/machdep.c
1257
regp->r_regs[R_T6] = framep->tf_regs[FRAME_T6];
sys/arch/alpha/alpha/machdep.c
1258
regp->r_regs[R_T7] = framep->tf_regs[FRAME_T7];
sys/arch/alpha/alpha/machdep.c
1259
regp->r_regs[R_S0] = framep->tf_regs[FRAME_S0];
sys/arch/alpha/alpha/machdep.c
1260
regp->r_regs[R_S1] = framep->tf_regs[FRAME_S1];
sys/arch/alpha/alpha/machdep.c
1261
regp->r_regs[R_S2] = framep->tf_regs[FRAME_S2];
sys/arch/alpha/alpha/machdep.c
1262
regp->r_regs[R_S3] = framep->tf_regs[FRAME_S3];
sys/arch/alpha/alpha/machdep.c
1263
regp->r_regs[R_S4] = framep->tf_regs[FRAME_S4];
sys/arch/alpha/alpha/machdep.c
1264
regp->r_regs[R_S5] = framep->tf_regs[FRAME_S5];
sys/arch/alpha/alpha/machdep.c
1265
regp->r_regs[R_S6] = framep->tf_regs[FRAME_S6];
sys/arch/alpha/alpha/machdep.c
1266
regp->r_regs[R_A0] = framep->tf_regs[FRAME_A0];
sys/arch/alpha/alpha/machdep.c
1267
regp->r_regs[R_A1] = framep->tf_regs[FRAME_A1];
sys/arch/alpha/alpha/machdep.c
1268
regp->r_regs[R_A2] = framep->tf_regs[FRAME_A2];
sys/arch/alpha/alpha/machdep.c
1269
regp->r_regs[R_A3] = framep->tf_regs[FRAME_A3];
sys/arch/alpha/alpha/machdep.c
1270
regp->r_regs[R_A4] = framep->tf_regs[FRAME_A4];
sys/arch/alpha/alpha/machdep.c
1271
regp->r_regs[R_A5] = framep->tf_regs[FRAME_A5];
sys/arch/alpha/alpha/machdep.c
1272
regp->r_regs[R_T8] = framep->tf_regs[FRAME_T8];
sys/arch/alpha/alpha/machdep.c
1273
regp->r_regs[R_T9] = framep->tf_regs[FRAME_T9];
sys/arch/alpha/alpha/machdep.c
1274
regp->r_regs[R_T10] = framep->tf_regs[FRAME_T10];
sys/arch/alpha/alpha/machdep.c
1275
regp->r_regs[R_T11] = framep->tf_regs[FRAME_T11];
sys/arch/alpha/alpha/machdep.c
1276
regp->r_regs[R_RA] = framep->tf_regs[FRAME_RA];
sys/arch/alpha/alpha/machdep.c
1277
regp->r_regs[R_T12] = framep->tf_regs[FRAME_T12];
sys/arch/alpha/alpha/machdep.c
1278
regp->r_regs[R_AT] = framep->tf_regs[FRAME_AT];
sys/arch/alpha/alpha/machdep.c
1279
regp->r_regs[R_GP] = framep->tf_regs[FRAME_GP];
sys/arch/alpha/alpha/machdep.c
1288
framep->tf_regs[FRAME_V0] = regp->r_regs[R_V0];
sys/arch/alpha/alpha/machdep.c
1289
framep->tf_regs[FRAME_T0] = regp->r_regs[R_T0];
sys/arch/alpha/alpha/machdep.c
1290
framep->tf_regs[FRAME_T1] = regp->r_regs[R_T1];
sys/arch/alpha/alpha/machdep.c
1291
framep->tf_regs[FRAME_T2] = regp->r_regs[R_T2];
sys/arch/alpha/alpha/machdep.c
1292
framep->tf_regs[FRAME_T3] = regp->r_regs[R_T3];
sys/arch/alpha/alpha/machdep.c
1293
framep->tf_regs[FRAME_T4] = regp->r_regs[R_T4];
sys/arch/alpha/alpha/machdep.c
1294
framep->tf_regs[FRAME_T5] = regp->r_regs[R_T5];
sys/arch/alpha/alpha/machdep.c
1295
framep->tf_regs[FRAME_T6] = regp->r_regs[R_T6];
sys/arch/alpha/alpha/machdep.c
1296
framep->tf_regs[FRAME_T7] = regp->r_regs[R_T7];
sys/arch/alpha/alpha/machdep.c
1297
framep->tf_regs[FRAME_S0] = regp->r_regs[R_S0];
sys/arch/alpha/alpha/machdep.c
1298
framep->tf_regs[FRAME_S1] = regp->r_regs[R_S1];
sys/arch/alpha/alpha/machdep.c
1299
framep->tf_regs[FRAME_S2] = regp->r_regs[R_S2];
sys/arch/alpha/alpha/machdep.c
1300
framep->tf_regs[FRAME_S3] = regp->r_regs[R_S3];
sys/arch/alpha/alpha/machdep.c
1301
framep->tf_regs[FRAME_S4] = regp->r_regs[R_S4];
sys/arch/alpha/alpha/machdep.c
1302
framep->tf_regs[FRAME_S5] = regp->r_regs[R_S5];
sys/arch/alpha/alpha/machdep.c
1303
framep->tf_regs[FRAME_S6] = regp->r_regs[R_S6];
sys/arch/alpha/alpha/machdep.c
1304
framep->tf_regs[FRAME_A0] = regp->r_regs[R_A0];
sys/arch/alpha/alpha/machdep.c
1305
framep->tf_regs[FRAME_A1] = regp->r_regs[R_A1];
sys/arch/alpha/alpha/machdep.c
1306
framep->tf_regs[FRAME_A2] = regp->r_regs[R_A2];
sys/arch/alpha/alpha/machdep.c
1307
framep->tf_regs[FRAME_A3] = regp->r_regs[R_A3];
sys/arch/alpha/alpha/machdep.c
1308
framep->tf_regs[FRAME_A4] = regp->r_regs[R_A4];
sys/arch/alpha/alpha/machdep.c
1309
framep->tf_regs[FRAME_A5] = regp->r_regs[R_A5];
sys/arch/alpha/alpha/machdep.c
1310
framep->tf_regs[FRAME_T8] = regp->r_regs[R_T8];
sys/arch/alpha/alpha/machdep.c
1311
framep->tf_regs[FRAME_T9] = regp->r_regs[R_T9];
sys/arch/alpha/alpha/machdep.c
1312
framep->tf_regs[FRAME_T10] = regp->r_regs[R_T10];
sys/arch/alpha/alpha/machdep.c
1313
framep->tf_regs[FRAME_T11] = regp->r_regs[R_T11];
sys/arch/alpha/alpha/machdep.c
1314
framep->tf_regs[FRAME_RA] = regp->r_regs[R_RA];
sys/arch/alpha/alpha/machdep.c
1315
framep->tf_regs[FRAME_T12] = regp->r_regs[R_T12];
sys/arch/alpha/alpha/machdep.c
1316
framep->tf_regs[FRAME_AT] = regp->r_regs[R_AT];
sys/arch/alpha/alpha/machdep.c
1317
framep->tf_regs[FRAME_GP] = regp->r_regs[R_GP];
sys/arch/alpha/alpha/machdep.c
1386
ksc.sc_pc = frame->tf_regs[FRAME_PC];
sys/arch/alpha/alpha/machdep.c
1387
ksc.sc_ps = frame->tf_regs[FRAME_PS];
sys/arch/alpha/alpha/machdep.c
1421
frame->tf_regs[FRAME_PC] = p->p_p->ps_sigcode;
sys/arch/alpha/alpha/machdep.c
1422
frame->tf_regs[FRAME_A0] = sig;
sys/arch/alpha/alpha/machdep.c
1423
frame->tf_regs[FRAME_A1] = (u_int64_t)sip;
sys/arch/alpha/alpha/machdep.c
1424
frame->tf_regs[FRAME_A2] = (u_int64_t)scp;
sys/arch/alpha/alpha/machdep.c
1425
frame->tf_regs[FRAME_T12] = (u_int64_t)catcher; /* t12 is pv */
sys/arch/alpha/alpha/machdep.c
1474
p->p_md.md_tf->tf_regs[FRAME_PC] = ksc.sc_pc;
sys/arch/alpha/alpha/machdep.c
1475
p->p_md.md_tf->tf_regs[FRAME_PS] =
sys/arch/alpha/alpha/machdep.c
1579
tfp->tf_regs[i] = 0xbabefacedeadbeef;
sys/arch/alpha/alpha/machdep.c
1580
tfp->tf_regs[FRAME_A1] = 0;
sys/arch/alpha/alpha/machdep.c
1582
memset(tfp->tf_regs, 0, FRAME_SIZE * sizeof tfp->tf_regs[0]);
sys/arch/alpha/alpha/machdep.c
1586
tfp->tf_regs[FRAME_PS] = ALPHA_PSL_USERSET;
sys/arch/alpha/alpha/machdep.c
1587
tfp->tf_regs[FRAME_PC] = pack->ep_entry & ~3;
sys/arch/alpha/alpha/machdep.c
1589
tfp->tf_regs[FRAME_A0] = stack;
sys/arch/alpha/alpha/machdep.c
1591
tfp->tf_regs[FRAME_T12] = tfp->tf_regs[FRAME_PC]; /* a.k.a. PV */
sys/arch/alpha/alpha/process_machdep.c
102
regs->r_regs[R_ZERO] = process_frame(p)->tf_regs[FRAME_PC];
sys/arch/alpha/alpha/process_machdep.c
125
process_frame(p)->tf_regs[FRAME_PC] = regs->r_regs[R_ZERO];
sys/arch/alpha/alpha/process_machdep.c
135
frame->tf_regs[FRAME_PC] = (u_int64_t)addr;
sys/arch/alpha/alpha/process_machdep.c
239
return p->p_md.md_tf->tf_regs[reg_to_frame[regno]];
sys/arch/alpha/alpha/process_machdep.c
263
vaddr_t pc = p->p_md.md_tf->tf_regs[FRAME_PC];
sys/arch/alpha/alpha/prom.c
242
framep->tf_regs[FRAME_PS] = p->pcs_halt_ps;
sys/arch/alpha/alpha/prom.c
243
framep->tf_regs[FRAME_PC] = p->pcs_halt_pc;
sys/arch/alpha/alpha/prom.c
244
framep->tf_regs[FRAME_T11] = p->pcs_halt_r25;
sys/arch/alpha/alpha/prom.c
245
framep->tf_regs[FRAME_RA] = p->pcs_halt_r26;
sys/arch/alpha/alpha/prom.c
246
framep->tf_regs[FRAME_T12] = p->pcs_halt_r27;
sys/arch/alpha/alpha/trap.c
189
printf(" pc = 0x%lx\n", framep->tf_regs[FRAME_PC]);
sys/arch/alpha/alpha/trap.c
190
printf(" ra = 0x%lx\n", framep->tf_regs[FRAME_RA]);
sys/arch/alpha/alpha/trap.c
226
framep->tf_regs[FRAME_SP] = alpha_pal_rdusp();
sys/arch/alpha/alpha/trap.c
227
user = (framep->tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0;
sys/arch/alpha/alpha/trap.c
272
v = (caddr_t)framep->tf_regs[FRAME_PC];
sys/arch/alpha/alpha/trap.c
304
if (framep->tf_regs[FRAME_A0] == -2) { /* weird! */
sys/arch/alpha/alpha/trap.c
317
p->p_md.md_tf->tf_regs[FRAME_PC] -= 4;
sys/arch/alpha/alpha/trap.c
340
v = (caddr_t)framep->tf_regs[FRAME_PC];
sys/arch/alpha/alpha/trap.c
424
framep->tf_regs[FRAME_PC] =
sys/arch/alpha/alpha/trap.c
512
framep->tf_regs[FRAME_SP] = alpha_pal_rdusp();
sys/arch/alpha/alpha/trap.c
513
opc = framep->tf_regs[FRAME_PC] - 4;
sys/arch/alpha/alpha/trap.c
523
args[5] = framep->tf_regs[FRAME_A5];
sys/arch/alpha/alpha/trap.c
525
args[4] = framep->tf_regs[FRAME_A4];
sys/arch/alpha/alpha/trap.c
527
args[3] = framep->tf_regs[FRAME_A3];
sys/arch/alpha/alpha/trap.c
529
args[2] = framep->tf_regs[FRAME_A2];
sys/arch/alpha/alpha/trap.c
531
args[1] = framep->tf_regs[FRAME_A1];
sys/arch/alpha/alpha/trap.c
533
args[0] = framep->tf_regs[FRAME_A0];
sys/arch/alpha/alpha/trap.c
545
framep->tf_regs[FRAME_V0] = rval[0];
sys/arch/alpha/alpha/trap.c
546
framep->tf_regs[FRAME_A3] = 0;
sys/arch/alpha/alpha/trap.c
549
framep->tf_regs[FRAME_PC] = opc;
sys/arch/alpha/alpha/trap.c
555
framep->tf_regs[FRAME_V0] = error;
sys/arch/alpha/alpha/trap.c
556
framep->tf_regs[FRAME_A3] = 1;
sys/arch/alpha/alpha/trap.c
578
framep->tf_regs[FRAME_V0] = 0;
sys/arch/alpha/alpha/trap.c
579
framep->tf_regs[FRAME_A3] = 0;
sys/arch/alpha/alpha/trap.c
652
if ((framep->tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) == 0)
sys/arch/alpha/alpha/trap.c
679
&(p)->p_md.md_tf->tf_regs[reg_to_framereg[(reg)]])
sys/arch/alpha/alpha/trap.c
706
p->p_md.md_tf->tf_regs[FRAME_SP] = alpha_pal_rdusp();
sys/arch/alpha/alpha/trap.c
708
inst_pc = memaddr = p->p_md.md_tf->tf_regs[FRAME_PC] - 4;
sys/arch/alpha/alpha/trap.c
839
alpha_pal_wrusp(p->p_md.md_tf->tf_regs[FRAME_SP]);
sys/arch/alpha/alpha/trap.c
849
p->p_md.md_tf->tf_regs[FRAME_PC] = inst_pc; /* re-run instr. */
sys/arch/alpha/include/cpu.h
320
(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
sys/arch/alpha/include/cpu.h
321
#define CLKF_PC(framep) ((framep)->cf_tf.tf_regs[FRAME_PC])
sys/arch/alpha/include/cpu.h
333
#define PROC_PC(p) ((p)->p_md.md_tf->tf_regs[FRAME_PC])
sys/arch/alpha/include/cpu.h
334
#define PROC_STACK(p) ((p)->p_md.md_tf->tf_regs[FRAME_SP])
sys/arch/alpha/include/db_machdep.h
45
#define PC_REGS(regs) ((vaddr_t)(regs)->tf_regs[FRAME_PC])
sys/arch/alpha/include/db_machdep.h
46
#define SET_PC_REGS(regs, value) (regs)->tf_regs[FRAME_PC] = (unsigned long)(value)
sys/arch/alpha/include/db_machdep.h
61
#define FIXUP_PC_AFTER_BREAK(regs) ((regs)->tf_regs[FRAME_PC] -= sizeof(int))
sys/arch/alpha/include/frame.h
92
unsigned long tf_regs[FRAME_SIZE]; /* See above */
sys/arch/m88k/include/frame.h
40
struct reg tf_regs;
sys/arch/m88k/include/frame.h
50
#define tf_r tf_regs.r
sys/arch/m88k/include/frame.h
51
#define tf_sp tf_regs.r[31]
sys/arch/m88k/include/frame.h
52
#define tf_epsr tf_regs.epsr
sys/arch/m88k/include/frame.h
53
#define tf_fpsr tf_regs.fpsr
sys/arch/m88k/include/frame.h
54
#define tf_fpcr tf_regs.fpcr
sys/arch/m88k/include/frame.h
55
#define tf_sxip tf_regs.sxip
sys/arch/m88k/include/frame.h
56
#define tf_snip tf_regs.snip
sys/arch/m88k/include/frame.h
57
#define tf_sfip tf_regs.sfip
sys/arch/m88k/include/frame.h
58
#define tf_exip tf_regs.sxip
sys/arch/m88k/include/frame.h
59
#define tf_enip tf_regs.snip
sys/arch/m88k/include/frame.h
60
#define tf_ssbr tf_regs.ssbr
sys/arch/m88k/include/frame.h
61
#define tf_dmt0 tf_regs.dmt0
sys/arch/m88k/include/frame.h
62
#define tf_dmd0 tf_regs.dmd0
sys/arch/m88k/include/frame.h
63
#define tf_dma0 tf_regs.dma0
sys/arch/m88k/include/frame.h
64
#define tf_dmt1 tf_regs.dmt1
sys/arch/m88k/include/frame.h
65
#define tf_dmd1 tf_regs.dmd1
sys/arch/m88k/include/frame.h
66
#define tf_dma1 tf_regs.dma1
sys/arch/m88k/include/frame.h
67
#define tf_dmt2 tf_regs.dmt2
sys/arch/m88k/include/frame.h
68
#define tf_dmd2 tf_regs.dmd2
sys/arch/m88k/include/frame.h
69
#define tf_dma2 tf_regs.dma2
sys/arch/m88k/include/frame.h
70
#define tf_duap tf_regs.ssbr
sys/arch/m88k/include/frame.h
71
#define tf_dsr tf_regs.dmt0
sys/arch/m88k/include/frame.h
72
#define tf_dlar tf_regs.dmd0
sys/arch/m88k/include/frame.h
73
#define tf_dpar tf_regs.dma0
sys/arch/m88k/include/frame.h
74
#define tf_isr tf_regs.dmt1
sys/arch/m88k/include/frame.h
75
#define tf_ilar tf_regs.dmd1
sys/arch/m88k/include/frame.h
76
#define tf_ipar tf_regs.dma1
sys/arch/m88k/include/frame.h
77
#define tf_isap tf_regs.dmt2
sys/arch/m88k/include/frame.h
78
#define tf_dsap tf_regs.dmd2
sys/arch/m88k/include/frame.h
79
#define tf_iuap tf_regs.dma2
sys/arch/m88k/include/frame.h
80
#define tf_fpecr tf_regs.fpecr
sys/arch/m88k/include/frame.h
81
#define tf_fphs1 tf_regs.fphs1
sys/arch/m88k/include/frame.h
82
#define tf_fpls1 tf_regs.fpls1
sys/arch/m88k/include/frame.h
83
#define tf_fphs2 tf_regs.fphs2
sys/arch/m88k/include/frame.h
84
#define tf_fpls2 tf_regs.fpls2
sys/arch/m88k/include/frame.h
85
#define tf_fppt tf_regs.fppt
sys/arch/m88k/include/frame.h
86
#define tf_fprh tf_regs.fprh
sys/arch/m88k/include/frame.h
87
#define tf_fprl tf_regs.fprl
sys/arch/m88k/include/frame.h
88
#define tf_fpit tf_regs.fpit
sys/arch/m88k/m88k/db_interface.c
394
ddb_regs = frame->tf_regs;
sys/arch/m88k/m88k/db_interface.c
402
frame->tf_regs = ddb_regs;
sys/arch/m88k/m88k/db_trace.c
793
db_stack_trace_cmd2(&frame->tf_regs, pr);
sys/arch/m88k/m88k/m88100_machdep.c
298
m88100_rewind_insn(&(eframe->tf_regs));
sys/arch/m88k/m88k/sig_machdep.c
147
bcopy((const void *)&tf->tf_regs, (void *)&sf.sf_sc.sc_regs,
sys/arch/m88k/m88k/sig_machdep.c
207
pc = CPU_IS88110 ? tf->tf_regs.exip : tf->tf_regs.sxip ^ XIP_V;
sys/arch/m88k/m88k/sig_machdep.c
229
if ((((struct reg *)&ksc.sc_regs)->epsr ^ tf->tf_regs.epsr) &
sys/arch/m88k/m88k/sig_machdep.c
233
bcopy((const void *)&ksc.sc_regs, (caddr_t)&tf->tf_regs,
sys/arch/m88k/m88k/trap.c
1084
vaddr_t pc = PC_REGS(&frame->tf_regs);
sys/arch/m88k/m88k/trap.c
1226
m88100_rewind_insn(&(tf->tf_regs));
sys/arch/m88k/m88k/trap.c
1604
pc = PC_REGS(&frame->tf_regs);
sys/arch/m88k/m88k/trap.c
441
m88100_rewind_insn(&(frame->tf_regs));
sys/arch/m88k/m88k/trap.c
544
vaddr_t pc = PC_REGS(&frame->tf_regs);
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
42
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
576
const struct dcn_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
586
dpp->tf_regs = tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h
1360
const struct dcn_dpp_registers *tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h
1522
const struct dcn_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c
43
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
163
if (dpp->tf_regs->DSCL_MEM_PWR_CTRL) {
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
44
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c
410
const struct dcn2_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c
42
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c
420
dpp->tf_regs = tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h
680
const struct dcn2_dpp_registers *tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h
778
const struct dcn2_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
37
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c
301
const struct dcn201_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c
311
dpp->tf_regs = tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c
35
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h
60
const struct dcn201_dpp_registers *tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h
79
const struct dcn201_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1507
const struct dcn3_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1517
dpp->tf_regs = tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
34
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h
563
const struct dcn3_dpp_registers *tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h
583
const struct dcn3_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c
34
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c
150
const struct dcn3_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c
160
dpp->tf_regs = tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h
34
const struct dcn3_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c
130
uint32_t inst, const struct dcn3_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c
134
bool ret = dpp32_construct(dpp, ctx, inst, tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c
31
#define REG(reg) dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h
58
uint32_t inst, const struct dcn3_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c
265
const struct dcn401_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c
275
dpp->tf_regs = tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c
36
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h
660
const struct dcn401_dpp_registers *tf_regs;
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h
689
const struct dcn401_dpp_registers *tf_regs,
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
43
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
155
if (dpp->tf_regs->DSCL_MEM_PWR_CTRL) {
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
44
dpp->tf_regs->reg
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
353
static const struct dcn_dpp_registers tf_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
354
tf_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
355
tf_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
356
tf_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
357
tf_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
580
&tf_regs[inst], &tf_shift, &tf_mask);
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
419
static const struct dcn2_dpp_registers tf_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
420
tf_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
421
tf_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
422
tf_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
423
tf_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
424
tf_regs(4),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
425
tf_regs(5),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
742
&tf_regs[inst], &tf_shift, &tf_mask))
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
468
static const struct dcn201_dpp_registers tf_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
469
tf_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
470
tf_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
471
tf_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
472
tf_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
638
&tf_regs[inst], &tf_shift, &tf_mask))
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
435
static const struct dcn2_dpp_registers tf_regs[] = {
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
436
tf_regs(0),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
437
tf_regs(1),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
438
tf_regs(2),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
439
tf_regs(3),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
510
&tf_regs[inst], &tf_shift, &tf_mask))
