bin/csh/extern.h

264

void shift(Char **, struct command *);

bin/csh/init.c

84

{ "shift", shift, 0, 1 },

games/random/random.c

116

int shift;

games/random/random.c

143

shift = clz64(significand);

games/random/random.c

144

if (shift != 0) {

games/random/random.c

145

exponent -= shift;

games/random/random.c

146

significand <<= shift;

games/random/random.c

147

significand |= (random64() >> (64 - shift));

lib/libc/quad/ashldi3.c

42

__ashldi3(quad_t a, qshift_t shift)

lib/libc/quad/ashldi3.c

46

if (shift == 0)

lib/libc/quad/ashldi3.c

49

if (shift >= INT_BITS) {

lib/libc/quad/ashldi3.c

50

aa.ul[H] = aa.ul[L] << (shift - INT_BITS);

lib/libc/quad/ashldi3.c

53

aa.ul[H] = (aa.ul[H] << shift) |

lib/libc/quad/ashldi3.c

54

(aa.ul[L] >> (INT_BITS - shift));

lib/libc/quad/ashldi3.c

55

aa.ul[L] <<= shift;

lib/libc/quad/ashrdi3.c

41

__ashrdi3(quad_t a, qshift_t shift)

lib/libc/quad/ashrdi3.c

45

if (shift == 0)

lib/libc/quad/ashrdi3.c

48

if (shift >= INT_BITS) {

lib/libc/quad/ashrdi3.c

59

aa.ul[L] = aa.sl[H] >> (shift - INT_BITS);

lib/libc/quad/ashrdi3.c

62

aa.ul[L] = (aa.ul[L] >> shift) |

lib/libc/quad/ashrdi3.c

63

(aa.ul[H] << (INT_BITS - shift));

lib/libc/quad/ashrdi3.c

64

aa.sl[H] >>= shift;

lib/libc/quad/lshldi3.c

42

__lshldi3(quad_t a, qshift_t shift)

lib/libc/quad/lshldi3.c

46

if (shift == 0)

lib/libc/quad/lshldi3.c

49

if (shift >= INT_BITS) {

lib/libc/quad/lshldi3.c

50

aa.ul[H] = aa.ul[L] << (shift - INT_BITS);

lib/libc/quad/lshldi3.c

53

aa.ul[H] = (aa.ul[H] << shift) |

lib/libc/quad/lshldi3.c

54

(aa.ul[L] >> (INT_BITS - shift));

lib/libc/quad/lshldi3.c

55

aa.ul[L] <<= shift;

lib/libc/quad/lshrdi3.c

41

__lshrdi3(quad_t a, qshift_t shift)

lib/libc/quad/lshrdi3.c

45

if (shift == 0)

lib/libc/quad/lshrdi3.c

48

if (shift >= INT_BITS) {

lib/libc/quad/lshrdi3.c

49

aa.ul[L] = aa.ul[H] >> (shift - INT_BITS);

lib/libc/quad/lshrdi3.c

52

aa.ul[L] = (aa.ul[L] >> shift) |

lib/libc/quad/lshrdi3.c

53

(aa.ul[H] << (INT_BITS - shift));

lib/libc/quad/lshrdi3.c

54

aa.ul[H] >>= shift;

lib/libc/stdlib/a64l.c

13

long value, digit, shift;

lib/libc/stdlib/a64l.c

22

shift = 0;

lib/libc/stdlib/a64l.c

37

value |= digit << shift;

lib/libc/stdlib/a64l.c

38

shift += 6;

lib/libc/stdlib/malloc.c

1111

unsigned int n_bits, shift;

lib/libc/stdlib/malloc.c

1114

shift = n_bits - subbin;

lib/libc/stdlib/malloc.c

1115

mask = (1ULL << shift) - 1;

lib/libc/string/memmem.c

134

k = l-shift[h[l-1]];

lib/libc/string/memmem.c

74

size_t shift[256];

lib/libc/string/memmem.c

78

BITOP(byteset, n[i], |=), shift[n[i]] = i+1;

lib/libc/string/strstr.c

143

k = l-shift[h[l-1]];

lib/libc/string/strstr.c

71

size_t shift[256];

lib/libc/string/strstr.c

75

BITOP(byteset, n[l], |=), shift[n[l]] = l+1;

lib/libcrypto/bn/bn_gcd.c

573

int shift;

lib/libcrypto/bn/bn_gcd.c

586

shift = 0;

lib/libcrypto/bn/bn_gcd.c

587

while (!BN_is_bit_set(B, shift)) /* note that 0 < B */

lib/libcrypto/bn/bn_gcd.c

589

shift++;

lib/libcrypto/bn/bn_gcd.c

599

if (shift > 0) {

lib/libcrypto/bn/bn_gcd.c

600

if (!BN_rshift(B, B, shift))

lib/libcrypto/bn/bn_gcd.c

605

shift = 0;

lib/libcrypto/bn/bn_gcd.c

606

while (!BN_is_bit_set(A, shift)) /* note that 0 < A */

lib/libcrypto/bn/bn_gcd.c

608

shift++;

lib/libcrypto/bn/bn_gcd.c

618

if (shift > 0) {

lib/libcrypto/bn/bn_gcd.c

619

if (!BN_rshift(A, A, shift))

lib/libcrypto/bn/bn_primitives.c

29

BN_ULONG bits, mask, shift;

lib/libcrypto/bn/bn_primitives.c

31

bits = shift = BN_BITS2;

lib/libcrypto/bn/bn_primitives.c

34

while ((shift >>= 1) != 0) {

lib/libcrypto/bn/bn_primitives.c

35

bits += (shift & mask) - (shift & ~mask);

lib/libcrypto/bn/bn_recp.c

149

if (i != recp->shift) {

lib/libcrypto/bn/bn_recp.c

155

recp->shift = i;

lib/libcrypto/bn/bn_recp.c

68

int shift;

lib/libcrypto/crypto_internal.h

271

crypto_rol_u32(uint32_t v, size_t shift)

lib/libcrypto/crypto_internal.h

273

return (v << shift) | (v >> (32 - shift));

lib/libcrypto/crypto_internal.h

279

crypto_ror_u32(uint32_t v, size_t shift)

lib/libcrypto/crypto_internal.h

281

return (v << (32 - shift)) | (v >> shift);

lib/libcrypto/crypto_internal.h

287

crypto_rol_u64(uint64_t v, size_t shift)

lib/libcrypto/crypto_internal.h

289

return (v << shift) | (v >> (64 - shift));

lib/libcrypto/crypto_internal.h

295

crypto_ror_u64(uint64_t v, size_t shift)

lib/libcrypto/crypto_internal.h

297

return (v << (64 - shift)) | (v >> shift);

lib/libcurses/curses.h

1121

#define NCURSES_BITS(mask,shift) (NCURSES_CAST(chtype,(mask)) << ((shift) + NCURSES_ATTR_SHIFT))

lib/libcurses/tinfo/obsolete.c

229

int shift = 0;

lib/libcurses/tinfo/obsolete.c

232

*target |= (unsigned) (source[rc - j] & 0x3f) << shift;

lib/libcurses/tinfo/obsolete.c

233

shift += 6;

lib/libcurses/tinfo/obsolete.c

235

*target |= mask << shift;

lib/libcurses/tty/hardscroll.c

192

int start, end, shift;

lib/libcurses/tty/hardscroll.c

240

shift = OLDNUM(SP_PARM, i) - i; /* shift > 0 */

lib/libcurses/tty/hardscroll.c

246

&& OLDNUM(SP_PARM, i) - i == shift)

lib/libcurses/tty/hardscroll.c

248

end = i - 1 + shift;

lib/libcurses/tty/hardscroll.c

250

TR(TRACE_UPDATE | TRACE_MOVE, ("scroll [%d, %d] by %d", start, end, shift));

lib/libcurses/tty/hardscroll.c

253

shift,

lib/libcurses/tty/hardscroll.c

273

shift = OLDNUM(SP_PARM, i) - i; /* shift < 0 */

lib/libcurses/tty/hardscroll.c

279

&& OLDNUM(SP_PARM, i) - i == shift) {

lib/libcurses/tty/hardscroll.c

282

start = i + 1 - (-shift);

lib/libcurses/tty/hardscroll.c

284

TR(TRACE_UPDATE | TRACE_MOVE, ("scroll [%d, %d] by %d", start, end, shift));

lib/libcurses/tty/hardscroll.c

287

shift,

lib/libcurses/tty/hashmap.c

224

int shift = OLDNUM(sp, i) - i;

lib/libcurses/tty/hashmap.c

230

&& OLDNUM(sp, i) - i == shift)

lib/libcurses/tty/hashmap.c

244

if (shift < 0)

lib/libcurses/tty/hashmap.c

245

back_limit = back_ref_limit + (-shift);

lib/libcurses/tty/hashmap.c

247

if (newhash(sp)[i] == oldhash(sp)[i + shift]

lib/libcurses/tty/hashmap.c

248

|| cost_effective(sp, i + shift, i, shift < 0)) {

lib/libcurses/tty/hashmap.c

249

OLDNUM(sp, i) = i + shift;

lib/libcurses/tty/hashmap.c

252

i, i + shift));

lib/libcurses/tty/hashmap.c

256

i, i + shift));

lib/libcurses/tty/hashmap.c

264

if (shift > 0)

lib/libcurses/tty/hashmap.c

265

forward_limit = forward_ref_limit - shift;

lib/libcurses/tty/hashmap.c

267

if (newhash(sp)[i] == oldhash(sp)[i + shift]

lib/libcurses/tty/hashmap.c

268

|| cost_effective(sp, i + shift, i, shift > 0)) {

lib/libcurses/tty/hashmap.c

269

OLDNUM(sp, i) = i + shift;

lib/libcurses/tty/hashmap.c

272

i, i + shift));

lib/libcurses/tty/hashmap.c

276

i, i + shift));

lib/libcurses/tty/hashmap.c

283

if (shift > 0)

lib/libcurses/tty/hashmap.c

284

back_ref_limit += shift;

lib/libcurses/tty/hashmap.c

397

int start, shift, size;

lib/libcurses/tty/hashmap.c

404

shift = OLDNUM(SP_PARM, i) - i;

lib/libcurses/tty/hashmap.c

408

&& OLDNUM(SP_PARM, i) - i == shift)

lib/libcurses/tty/hashmap.c

411

if (size < 3 || size + min(size / 8, 2) < abs(shift)) {

lib/libedit/refresh.c

157

re_putc(EditLine *el, wint_t c, int shift)

lib/libedit/refresh.c

164

while (shift && (el->el_refresh.r_cursor.h + w > el->el_terminal.t_size.h))

lib/libedit/refresh.c

175

if (!shift)

lib/libevent/event_tagging.c

127

int count = 0, shift = 0, done = 0;

lib/libevent/event_tagging.c

131

number |= (lower & 0x7f) << shift;

lib/libevent/event_tagging.c

132

shift += 7;

lib/libm/src/s_lround.c

51

int e, s, shift;

lib/libm/src/s_lround.c

77

shift = e - DBL_FRACBITS;

lib/libm/src/s_lround.c

78

if (shift >=0)

lib/libm/src/s_lround.c

79

res = (shift < RESTYPE_BITS ? (RESTYPE)i1 << shift : 0);

lib/libm/src/s_lround.c

81

res = (shift > -RESTYPE_BITS ? (RESTYPE)i1 >> -shift : 0);

lib/libm/src/s_lround.c

82

shift += 32;

lib/libm/src/s_lround.c

83

if (shift >=0)

lib/libm/src/s_lround.c

84

res |= (shift < RESTYPE_BITS ? (RESTYPE)i0 << shift : 0);

lib/libm/src/s_lround.c

86

res |= (shift > -RESTYPE_BITS ? (RESTYPE)i0 >> -shift : 0);

lib/libm/src/s_lroundf.c

50

int e, s, shift;

lib/libm/src/s_lroundf.c

76

shift = e - SNG_FRACBITS;

lib/libm/src/s_lroundf.c

77

if (shift >=0)

lib/libm/src/s_lroundf.c

78

res = (shift < RESTYPE_BITS ? (RESTYPE)i0 << shift : 0);

lib/libm/src/s_lroundf.c

80

res = (shift > -RESTYPE_BITS ? (RESTYPE)i0 >> -shift : 0);

lib/libm/src/s_rintl.c

41

shift[2] = {

lib/libm/src/s_rintl.c

80

x += shift[sign];

lib/libm/src/s_rintl.c

81

x -= shift[sign];

lib/libskey/put.c

467

int shift;

lib/libskey/put.c

474

shift = ((8 - ((start + length) % 8)) % 8);

lib/libskey/put.c

475

y = x << shift;

lib/libskey/put.c

479

if (shift + length > 16) {

lib/libskey/put.c

483

} else if (shift + length > 8) {

lib/libssl/d1_pkt.c

1058

unsigned int shift;

lib/libssl/d1_pkt.c

1064

shift = -cmp;

lib/libssl/d1_pkt.c

1065

if (shift >= sizeof(bitmap->map)*8)

lib/libssl/d1_pkt.c

1067

else if (bitmap->map & (1UL << shift))

lib/libssl/d1_pkt.c

1077

unsigned int shift;

lib/libssl/d1_pkt.c

1082

shift = cmp;

lib/libssl/d1_pkt.c

1083

if (shift < sizeof(bitmap->map)*8)

lib/libssl/d1_pkt.c

1084

bitmap->map <<= shift, bitmap->map |= 1UL;

lib/libssl/d1_pkt.c

1089

shift = -cmp;

lib/libssl/d1_pkt.c

1090

if (shift < sizeof(bitmap->map) * 8)

lib/libssl/d1_pkt.c

1091

bitmap->map |= 1UL << shift;

libexec/ld.so/malloc.c

119

u_short shift; /* how far to shift for this size */

libexec/ld.so/malloc.c

504

p->shift = MALLOC_MINSHIFT;

libexec/ld.so/malloc.c

505

p->total = p->free = MALLOC_PAGESIZE >> p->shift;

libexec/ld.so/malloc.c

509

p->shift = bits;

libexec/ld.so/malloc.c

510

p->total = p->free = MALLOC_PAGESIZE >> p->shift;

libexec/ld.so/malloc.c

554

if (p->shift == 0)

libexec/ld.so/malloc.c

688

k <<= bp->shift;

libexec/ld.so/malloc.c

727

chunknum = ((uintptr_t)ptr & MALLOC_PAGEMASK) >> info->shift;

libexec/ld.so/malloc.c

733

if ((uintptr_t)ptr & ((1U << (info->shift)) - 1)) {

libexec/ld.so/malloc.c

764

mp = &d->chunk_dir[info->shift][listnum];

libexec/ld.so/malloc.c

783

mp = &d->chunk_info_list[info->shift];

regress/lib/libcrypto/bn/bn_gcd.c

3544

int shift, signs;

regress/lib/libcrypto/bn/bn_gcd.c

3552

for (shift = 0; shift < 16; shift++) {

regress/lib/libcrypto/bn/bn_gcd.c

3563

test->name, k, shift, signs);

regress/lib/libcrypto/bn/bn_gcd.c

3569

test->name, k, shift, signs);

regress/lib/libcrypto/bn/bn_gcd.c

3576

test->name, k, shift, signs);

regress/sys/arch/amd64/dump_tables/dump_tables.c

223

pent(level, i, (i << shift[level]) + va, pt[level][i],

regress/sys/arch/amd64/dump_tables/dump_tables.c

94

const int shift[] = {

sbin/newfs_ext2fs/newfs_ext2fs.c

379

int shift = 0;

sbin/newfs_ext2fs/newfs_ext2fs.c

396

shift += 10;

sbin/newfs_ext2fs/newfs_ext2fs.c

400

shift += 10;

sbin/newfs_ext2fs/newfs_ext2fs.c

404

shift += 10;

sbin/newfs_ext2fs/newfs_ext2fs.c

415

result = r1 << shift;

sbin/newfs_ext2fs/newfs_ext2fs.c

416

if (errno == ERANGE || result >> shift != r1)

sbin/scsi/libscsi.c

169

int shift = 0; /* Bits already shifted out */

sbin/scsi/libscsi.c

218

if (shift <= 0) {

sbin/scsi/libscsi.c

220

shift = 8;

sbin/scsi/libscsi.c

222

value = (bits >> (shift - width)) & mask[width];

sbin/scsi/libscsi.c

226

shift, bits, value, width, mask[width]);

sbin/scsi/libscsi.c

231

shift -= width;

sbin/scsi/libscsi.c

237

shift = 0;

sbin/scsi/libscsi.c

276

shift = 0;

sbin/scsi/libscsi.c

302

shift = 0;

sbin/scsi/libscsi.c

566

int shift;

sbin/scsi/libscsi.c

575

shift = 0;

sbin/scsi/libscsi.c

610

shift += width;

sbin/scsi/libscsi.c

612

val |= (value << (8 - shift));

sbin/scsi/libscsi.c

614

if (shift == 8) {

sbin/scsi/libscsi.c

619

shift = 0;

sbin/scsi/libscsi.c

622

if (shift) {

sbin/scsi/libscsi.c

627

shift = 0;

sbin/scsi/libscsi.c

668

if (shift && ind < vec_max) {

sbin/unwind/libunbound/util/storage/slabhash.c

113

return ((hash & sl->mask) >> sl->shift);

sbin/unwind/libunbound/util/storage/slabhash.c

138

id, (unsigned)sl->size, (unsigned)sl->mask, sl->shift);

sbin/unwind/libunbound/util/storage/slabhash.c

66

sl->shift = 0;

sbin/unwind/libunbound/util/storage/slabhash.c

70

sl->shift = 0;

sbin/unwind/libunbound/util/storage/slabhash.c

73

sl->shift ++;

sbin/unwind/libunbound/util/storage/slabhash.h

63

unsigned int shift;

sys/arch/alpha/tc/tc_bus_mem.c

419

u_int64_t shift, msk;

sys/arch/alpha/tc/tc_bus_mem.c

421

shift = off & 0x3;

sys/arch/alpha/tc/tc_bus_mem.c

426

msk = ~(0x1 << shift) & 0xf;

sys/arch/alpha/tc/tc_bus_mem.c

427

v = (msk << 32) | (((u_int64_t)val) << (shift * 8));

sys/arch/alpha/tc/tc_bus_mem.c

445

u_int64_t shift, msk;

sys/arch/alpha/tc/tc_bus_mem.c

447

shift = off & 0x2;

sys/arch/alpha/tc/tc_bus_mem.c

452

msk = ~(0x3 << shift) & 0xf;

sys/arch/alpha/tc/tc_bus_mem.c

453

v = (msk << 32) | (((u_int64_t)val) << (shift * 8));

sys/arch/amd64/amd64/pmap.c

463

u_long mask, shift;

sys/arch/amd64/amd64/pmap.c

469

shift = L4_SHIFT;

sys/arch/amd64/amd64/pmap.c

473

*offs = (VA_SIGN_POS(va) & mask) >> shift;

sys/arch/amd64/amd64/pmap.c

482

shift -= 9;

sys/arch/amd64/amd64/vmm_machdep.c

3509

int level, shift, pdidx;

sys/arch/amd64/amd64/vmm_machdep.c

3548

shift = L4_SHIFT;

sys/arch/amd64/amd64/vmm_machdep.c

3552

shift = L3_SHIFT;

sys/arch/amd64/amd64/vmm_machdep.c

3558

shift = 22;

sys/arch/amd64/amd64/vmm_machdep.c

3566

"shift_width=%lld\n", __func__, pte_size, level, mask, shift,

sys/arch/amd64/amd64/vmm_machdep.c

3572

pdidx = (va & mask) >> shift;

sys/arch/amd64/amd64/vmm_machdep.c

3618

shift -= shift_width;

sys/arch/amd64/amd64/vmm_machdep.c

3623

low_mask = ((uint64_t)1ULL << shift) - 1;

sys/arch/arm64/arm64/disasm.c

1055

OP5FUNC(op_add_imm, sf, shift, imm12, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1057

if (shift & 2) {

sys/arch/arm64/arm64/disasm.c

1072

SHIFTOP2(shift, "", ", lsl #12"));

sys/arch/arm64/arm64/disasm.c

1076

OP6FUNC(op_add_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1078

if (shift == 3) {

sys/arch/arm64/arm64/disasm.c

1082

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1093

OP5FUNC(op_adds_imm, sf, shift, imm12, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1096

addsub_imm_common(di, pc, insn, sf, shift, imm12, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1100

OP6FUNC(op_adds_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1102

if (shift == 3) {

sys/arch/arm64/arm64/disasm.c

1107

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1142

OP6FUNC(op_and_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1144

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1168

OP6FUNC(op_ands_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1171

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1361

OP6FUNC(op_bic_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1363

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1367

OP6FUNC(op_bics_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1369

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1489

OP5FUNC(op_subs_imm, sf, shift, imm12, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1492

addsub_imm_common(di, pc, insn, sf, shift, imm12, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1496

OP6FUNC(op_subs_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1498

if (shift == 3) {

sys/arch/arm64/arm64/disasm.c

1504

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1592

OP6FUNC(op_eon_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1594

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1611

OP6FUNC(op_eor_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

1613

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

1898

OP6FUNC(op_ldr_reg, size, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

1900

regoffset_x_common(di, pc, insn, size, Rm, option, shift, Rn, Rt,

sys/arch/arm64/arm64/disasm.c

1934

OP5FUNC(op_ldrb_reg, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

1936

regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrb");

sys/arch/arm64/arm64/disasm.c

1969

OP5FUNC(op_ldrh_reg, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

1971

regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrh");

sys/arch/arm64/arm64/disasm.c

2004

OP6FUNC(op_ldrsb_reg, opc, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

2006

regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsb");

sys/arch/arm64/arm64/disasm.c

2039

OP6FUNC(op_ldrsh_reg, opc, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

2041

regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsh");

sys/arch/arm64/arm64/disasm.c

2081

OP5FUNC(op_ldrsw_reg, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

2083

regoffset_w_common(di, pc, insn, Rm, option, shift, Rn, Rt, "ldrsw");

sys/arch/arm64/arm64/disasm.c

2420

const uint64_t shift = hw * 16;

sys/arch/arm64/arm64/disasm.c

2423

~(ZeroExtend(16, imm16, 1) << shift) & mask);

sys/arch/arm64/arm64/disasm.c

2427

OP6FUNC(op_orr_reg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

2435

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

2448

const int shift = hw * 16;

sys/arch/arm64/arm64/disasm.c

2452

ZeroExtend(16, imm16, 1), shift);

sys/arch/arm64/arm64/disasm.c

2457

ZeroExtend(16, imm16, 1) << shift);

sys/arch/arm64/arm64/disasm.c

2464

const int shift = hw * 16;

sys/arch/arm64/arm64/disasm.c

2473

ZeroExtend(16, imm16, 1), shift);

sys/arch/arm64/arm64/disasm.c

2520

OP6FUNC(op_orn, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

2523

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

2527

OP6FUNC(op_sub_shiftreg, sf, shift, Rm, imm6, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

2530

shiftreg_common(di, pc, insn, sf, shift, Rm, imm6, Rn, Rd,

sys/arch/arm64/arm64/disasm.c

2585

OP5FUNC(op_prfm_reg, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

2594

if (shift == 0) {

sys/arch/arm64/arm64/disasm.c

2860

OP6FUNC(op_str_reg, size, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

2862

regoffset_x_common(di, pc, insn, size, Rm, option, shift, Rn, Rt,

sys/arch/arm64/arm64/disasm.c

2896

OP5FUNC(op_strb_reg, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

2898

regoffset_b_common(di, pc, insn, Rm, option, shift, Rn, Rt, "strb");

sys/arch/arm64/arm64/disasm.c

2931

OP5FUNC(op_strh_reg, Rm, option, shift, Rn, Rt)

sys/arch/arm64/arm64/disasm.c

2933

regoffset_h_common(di, pc, insn, Rm, option, shift, Rn, Rt, "strh");

sys/arch/arm64/arm64/disasm.c

3058

OP5FUNC(op_sub_imm, sf, shift, imm12, Rn, Rd)

sys/arch/arm64/arm64/disasm.c

3060

if (shift & 2) {

sys/arch/arm64/arm64/disasm.c

3069

SHIFTOP2(shift, "", ", lsl #12"));

sys/arch/arm64/arm64/disasm.c

730

DecodeShift(uint64_t shift)

sys/arch/arm64/arm64/disasm.c

732

return SHIFTOP4(shift, "lsl", "lsr", "asr", "ror");

sys/arch/arm64/arm64/disasm.c

788

uint64_t sf, uint64_t shift, uint64_t Rm, uint64_t imm6,

sys/arch/arm64/arm64/disasm.c

815

PRINTF(", %s #%u", DecodeShift(shift), (u_int)imm6);

sys/arch/arm64/arm64/disasm.c

836

uint64_t Rm, uint64_t option, uint64_t shift, uint64_t Rn, uint64_t Rt,

sys/arch/arm64/arm64/disasm.c

846

if (shift == 0) {

sys/arch/arm64/arm64/disasm.c

868

uint64_t Rm, uint64_t option, uint64_t shift, uint64_t Rn, uint64_t Rt,

sys/arch/arm64/arm64/disasm.c

878

if ((shift == 0) && (option == 3)) {

sys/arch/arm64/arm64/disasm.c

884

} else if (shift == 0) {

sys/arch/arm64/arm64/disasm.c

900

(u_int)shift);

sys/arch/arm64/arm64/disasm.c

906

uint64_t Rm, uint64_t option, uint64_t shift, uint64_t Rn, uint64_t Rt,

sys/arch/arm64/arm64/disasm.c

916

if ((shift == 0) && (option == 3)) {

sys/arch/arm64/arm64/disasm.c

922

} else if (shift == 0) {

sys/arch/arm64/arm64/disasm.c

938

(u_int)shift * 2);

sys/arch/arm64/arm64/disasm.c

944

uint64_t size, uint64_t Rm, uint64_t option, uint64_t shift,

sys/arch/arm64/arm64/disasm.c

955

if (shift == 0) {

sys/arch/arm64/arm64/disasm.c

978

uint64_t sf, uint64_t shift, uint64_t imm12, uint64_t Rn, uint64_t Rd,

sys/arch/arm64/arm64/disasm.c

981

if (shift & 2) {

sys/arch/arm64/arm64/disasm.c

991

SHIFTOP4(shift, "", ", lsl #12", "", ""));

sys/arch/arm64/arm64/disasm.c

998

SHIFTOP4(shift, "", ", lsl #12", "", ""));

sys/arch/arm64/dev/apldc.c

449

int shift = 0;

sys/arch/arm64/dev/apldc.c

456

*checksum += (DC_DATA_RX8_DATA(data) << shift);

sys/arch/arm64/dev/apldc.c

457

shift += 8;

sys/arch/arm64/dev/apldc.c

458

if (shift > 24)

sys/arch/arm64/dev/apldc.c

459

shift = 0;

sys/arch/arm64/dev/apldc.c

475

int shift = 0;

sys/arch/arm64/dev/apldc.c

482

*checksum -= *src << shift;

sys/arch/arm64/dev/apldc.c

485

shift += 8;

sys/arch/arm64/dev/apldc.c

486

if (shift > 24)

sys/arch/arm64/dev/apldc.c

487

shift = 0;

sys/arch/armv7/omap/prcm.c

294

int shift = (clock-2);

sys/arch/armv7/omap/prcm.c

296

mask = 1 << (shift);

sys/arch/armv7/omap/prcm.c

297

reg = (oreg & ~mask) | ( (speed << shift) & mask);

sys/arch/hppa/spmath/dbl_float.h

343

#define Dbl_right_align(srcdstA,srcdstB,shift,extent) \

sys/arch/hppa/spmath/dbl_float.h

344

if( shift >= 32 ) \

sys/arch/hppa/spmath/dbl_float.h

348

if(shift < 64) \

sys/arch/hppa/spmath/dbl_float.h

350

if(shift > 32) \

sys/arch/hppa/spmath/dbl_float.h

353

shift-32, Extall(extent)); \

sys/arch/hppa/spmath/dbl_float.h

354

if(Dallp2(srcdstB) << (64 - (shift))) Ext_setone_low(extent); \

sys/arch/hppa/spmath/dbl_float.h

357

Dallp2(srcdstB) = Dallp1(srcdstA) >> (shift - 32); \

sys/arch/hppa/spmath/dbl_float.h

370

if (shift > 0) \

sys/arch/hppa/spmath/dbl_float.h

372

Extall(extent) = Dallp2(srcdstB) << (32 - (shift)); \

sys/arch/hppa/spmath/dbl_float.h

373

Variable_shift_double(Dallp1(srcdstA),Dallp2(srcdstB),shift, \

sys/arch/hppa/spmath/dbl_float.h

375

Dallp1(srcdstA) >>= shift; \

sys/arch/hppa/spmath/dbl_float.h

384

#define Dbl_fix_overshift(srcdstA,srcdstB,shift,extent) \

sys/arch/hppa/spmath/dbl_float.h

385

Extall(extent) = Dallp2(srcdstB) << (32 - (shift)); \

sys/arch/hppa/spmath/dbl_float.h

386

Dallp2(srcdstB) = (Dallp1(srcdstA) << (32 - (shift))) | \

sys/arch/hppa/spmath/dbl_float.h

387

(Dallp2(srcdstB) >> (shift)); \

sys/arch/hppa/spmath/dbl_float.h

388

Dallp1(srcdstA) = Dallp1(srcdstA) >> shift

sys/arch/hppa/spmath/sgl_float.h

214

#define Sgl_right_align(srcdst,shift,extent) \

sys/arch/hppa/spmath/sgl_float.h

216

if (shift < 32) { \

sys/arch/hppa/spmath/sgl_float.h

217

Extall(extent) = Sall(srcdst) << (32-(shift)); \

sys/arch/hppa/spmath/sgl_float.h

218

Sall(srcdst) >>= shift; \

sys/arch/i386/i386/pctr.c

121

int msr, shift;

sys/arch/i386/i386/pctr.c

127

shift = cmd ? 0x10 : 0;

sys/arch/i386/i386/pctr.c

135

msr11 &= ~(0x1ffLL << shift);

sys/arch/i386/i386/pctr.c

136

msr11 |= fn << shift;

sys/arch/i386/pci/ali1543.c

201

int shift, val;

sys/arch/i386/pci/ali1543.c

209

shift = ALI1543_INTR_PIRQ_SHIFT(clink);

sys/arch/i386/pci/ali1543.c

210

reg &= ~(0x0f << shift);

sys/arch/i386/pci/ali1543.c

211

reg |= (ali1543_intr_shuffle_set[irq] << shift);

sys/arch/i386/pci/gscpcib.c

155

int reg, shift;

sys/arch/i386/pci/gscpcib.c

159

shift = pin % 32;

sys/arch/i386/pci/gscpcib.c

162

return ((data >> shift) & 0x1);

sys/arch/i386/pci/gscpcib.c

169

int reg, shift;

sys/arch/i386/pci/gscpcib.c

173

shift = pin % 32;

sys/arch/i386/pci/gscpcib.c

176

data &= ~(1 << shift);

sys/arch/i386/pci/gscpcib.c

178

data |= (1 << shift);

sys/arch/i386/pci/opti82c558.c

168

int shift;

sys/arch/i386/pci/opti82c558.c

175

shift = VIPER_PIRQ_SELECT_SHIFT * clink;

sys/arch/i386/pci/opti82c558.c

176

reg &= ~(VIPER_PIRQ_SELECT_MASK << shift);

sys/arch/i386/pci/opti82c558.c

177

reg |= (viper_pirq_encode[irq] << shift);

sys/arch/i386/pci/opti82c558.c

208

int shift;

sys/arch/i386/pci/opti82c558.c

217

shift = (VIPER_CFG_TRIGGER_SHIFT + viper_pirq_encode[irq]);

sys/arch/i386/pci/opti82c558.c

219

reg |= (1 << shift);

sys/arch/i386/pci/opti82c558.c

221

reg &= ~(1 << shift);

sys/arch/i386/pci/piix.c

159

int shift, off;

sys/arch/i386/pci/piix.c

172

shift = clink << 3;

sys/arch/i386/pci/piix.c

173

if ((reg >> shift) & PIIX_CFG_PIRQ_NONE)

sys/arch/i386/pci/piix.c

185

int shift, off;

sys/arch/i386/pci/piix.c

198

shift = clink << 3;

sys/arch/i386/pci/piix.c

199

reg &= ~((PIIX_CFG_PIRQ_NONE | PIIX_CFG_PIRQ_MASK) << shift);

sys/arch/i386/pci/piix.c

200

reg |= irq << shift;

sys/arch/i386/pci/sis85c503.c

145

int shift;

sys/arch/i386/pci/sis85c503.c

153

shift = SIS85C503_CFG_PIRQ_SHIFT(clink);

sys/arch/i386/pci/sis85c503.c

155

SIS85C503_CFG_PIRQ_INTR_MASK) << shift);

sys/arch/i386/pci/sis85c503.c

156

reg |= (irq << shift);

sys/arch/i386/pci/via82c586.c

169

int shift, val;

sys/arch/i386/pci/via82c586.c

177

shift = vp3_cfg_intr_shift[clink];

sys/arch/i386/pci/via82c586.c

178

reg &= ~(VP3_CFG_INTR_MASK << shift);

sys/arch/i386/pci/via82c586.c

179

reg |= (irq << shift);

sys/arch/i386/pci/via82c586.c

223

int i, pciirq, shift, testtrig;

sys/arch/i386/pci/via82c586.c

234

shift = vp3_cfg_trigger_shift[i];

sys/arch/i386/pci/via82c586.c

237

reg &= ~(VP3_CFG_TRIGGER_MASK << shift);

sys/arch/m88k/m88k/db_interface.c

119

static const u_int shift[16] = {

sys/arch/m88k/m88k/db_interface.c

156

(d & mask[DMT_ENBITS(t)]) >> shift[DMT_ENBITS(t)],

sys/arch/riscv64/dev/mpfclock.c

163

uint32_t div, shift;

sys/arch/riscv64/dev/mpfclock.c

174

shift = CLOCK_CONFIG_CR_CPU_DIV_SHIFT;

sys/arch/riscv64/dev/mpfclock.c

177

shift = CLOCK_CONFIG_CR_AXI_DIV_SHIFT;

sys/arch/riscv64/dev/mpfclock.c

180

shift = CLOCK_CONFIG_CR_AHB_DIV_SHIFT;

sys/arch/riscv64/dev/mpfclock.c

186

div = 1U << ((sc->sc_clkcfg >> shift) & CLOCK_CONFIG_CR_DIV_MASK);

sys/arch/sparc64/sparc64/ipifuncs.c

109

if ((ldxa(0, ASR_IDSR) & (IDSR_NACK << shift)) == 0)

sys/arch/sparc64/sparc64/ipifuncs.c

73

int i, j, shift = 0;

sys/arch/sparc64/sparc64/ipifuncs.c

82

shift = (itid & 0x3) * 2;

sys/arch/sparc64/sparc64/ipifuncs.c

84

if (ldxa(0, ASR_IDSR) & (IDSR_BUSY << shift)) {

sys/arch/sparc64/sparc64/ipifuncs.c

99

if (ldxa(0, ASR_IDSR) & (IDSR_BUSY << shift))

sys/crypto/blake2s.c

28

ror32(uint32_t word, unsigned int shift)

sys/crypto/blake2s.c

30

return (word >> shift) | (word << (32 - shift));

sys/ddb/db_dwarf.c

106

unsigned int shift = 0;

sys/ddb/db_dwarf.c

109

while (shift < 64 && read_u8(d, &x)) {

sys/ddb/db_dwarf.c

110

res |= (uint64_t)(x & 0x7f) << shift;

sys/ddb/db_dwarf.c

111

shift += 7;

sys/ddb/db_dwarf.c

113

if (signextend && shift < 64 && (x & 0x40) != 0)

sys/ddb/db_dwarf.c

114

res |= ~(uint64_t)0 << shift;

sys/dev/acpi/acpidmar.c

603

int shift, uint64_t flags, int nowait, int create, int *error)

sys/dev/acpi/acpidmar.c

611

idx = (va >> shift) & VTD_STRIDE_MASK;

sys/dev/acpi/acpidmar.h

234

iommu_rmw32(void *ov, uint32_t mask, uint32_t shift, uint32_t nv)

sys/dev/acpi/acpidmar.h

236

*(uint32_t *)ov &= ~(mask << shift);

sys/dev/acpi/acpidmar.h

237

*(uint32_t *)ov |= (nv & mask) << shift;

sys/dev/acpi/acpidmar.h

241

iommu_rmw64(void *ov, uint32_t mask, uint32_t shift, uint64_t nv)

sys/dev/acpi/acpidmar.h

243

*(uint64_t *)ov &= ~(mask << shift);

sys/dev/acpi/acpidmar.h

244

*(uint64_t *)ov |= (nv & mask) << shift;

sys/dev/fdt/bcm2711_pcie.c

736

u_int shift;

sys/dev/fdt/bcm2711_pcie.c

742

shift = 0;

sys/dev/fdt/bcm2711_pcie.c

743

while ((1ULL << shift) < size)

sys/dev/fdt/bcm2711_pcie.c

744

shift++;

sys/dev/fdt/bcm2711_pcie.c

745

if (shift >= 12 && shift <= 15)

sys/dev/fdt/bcm2711_pcie.c

746

size = 0x1c + (shift - 12);

sys/dev/fdt/bcm2711_pcie.c

747

else if (shift >= 16 && shift <= 36)

sys/dev/fdt/bcm2711_pcie.c

748

size = (shift - 15);

sys/dev/fdt/bcm2711_pcie.c

769

u_int shift;

sys/dev/fdt/bcm2711_pcie.c

771

shift = 0;

sys/dev/fdt/bcm2711_pcie.c

773

while ((1ULL << shift) < size)

sys/dev/fdt/bcm2711_pcie.c

774

shift++;

sys/dev/fdt/bcm2711_pcie.c

775

size = size ? (shift - 15) : 0xf;

sys/dev/fdt/bcm2835_gpio.c

152

int shift = (pin % 10) * 3;

sys/dev/fdt/bcm2835_gpio.c

156

val &= ~(GPFSEL_MASK << shift);

sys/dev/fdt/bcm2835_gpio.c

158

val |= ((func & GPFSEL_MASK) << shift);

sys/dev/fdt/bcm2835_gpio.c

166

int shift = (pin % 16) * 2;

sys/dev/fdt/bcm2835_gpio.c

170

val &= ~(GPPULL_MASK << shift);

sys/dev/fdt/bcm2835_gpio.c

172

val |= (pull << shift);

sys/dev/fdt/bcm2835_gpio.c

180

int shift = (pin % 32);

sys/dev/fdt/bcm2835_gpio.c

184

HWRITE4(sc, GPPUDCLK(reg), 1 << shift);

sys/dev/fdt/com_fdt.c

115

uint32_t freq, width, shift;

sys/dev/fdt/com_fdt.c

139

shift = 0;

sys/dev/fdt/com_fdt.c

142

shift = 2;

sys/dev/fdt/com_fdt.c

146

sc->sc_reg_shift = OF_getpropint(faa->fa_node, "reg-shift", shift);

sys/dev/fdt/com_fdt.c

53

uint32_t width, shift;

sys/dev/fdt/com_fdt.c

78

shift = 0;

sys/dev/fdt/com_fdt.c

81

shift = 2;

sys/dev/fdt/com_fdt.c

85

comcons_reg_shift = OF_getpropint(stdout_node, "reg-shift", shift);

sys/dev/fdt/es8316ac.c

397

uint8_t shift[2];

sys/dev/fdt/es8316ac.c

429

.shift = {

sys/dev/fdt/es8316ac.c

466

.shift = {

sys/dev/fdt/es8316ac.c

489

.shift = {

sys/dev/fdt/es8316ac.c

528

int nvol, shift, ch;

sys/dev/fdt/es8316ac.c

540

shift = 8 - fls(mix->mask[ch]);

sys/dev/fdt/es8316ac.c

541

nvol = mc->un.value.level[ch] >> shift;

sys/dev/fdt/es8316ac.c

547

val &= ~(mix->mask[ch] << mix->shift[ch]);

sys/dev/fdt/es8316ac.c

548

val |= (nvol & mix->mask[ch]) << mix->shift[ch];

sys/dev/fdt/es8316ac.c

577

int nvol, shift, ch;

sys/dev/fdt/es8316ac.c

589

shift = 8 - fls(mix->mask[ch]);

sys/dev/fdt/es8316ac.c

590

nvol = (val >> mix->shift[ch]) & mix->mask[ch];

sys/dev/fdt/es8316ac.c

593

nvol <<= shift;

sys/dev/fdt/if_dwqe_fdt.c

426

uint32_t phandle, offset, reg, shift;

sys/dev/fdt/if_dwqe_fdt.c

437

shift = cells[2];

sys/dev/fdt/if_dwqe_fdt.c

458

reg &= ~(((1U << 3) - 1) << shift);

sys/dev/fdt/if_dwqe_fdt.c

459

reg |= iface << shift;

sys/dev/fdt/if_mvpp.c

3648

mvpp2_prs_sram_shift_set(struct mvpp2_prs_entry *pe, int shift, uint32_t op)

sys/dev/fdt/if_mvpp.c

3650

if (shift < 0) {

sys/dev/fdt/if_mvpp.c

3652

shift = -shift;

sys/dev/fdt/if_mvpp.c

3658

shift & MVPP2_PRS_SRAM_SHIFT_MASK;

sys/dev/fdt/if_mvpp.c

3875

int32_t tid, shift;

sys/dev/fdt/if_mvpp.c

3879

shift = 8;

sys/dev/fdt/if_mvpp.c

3882

shift = 4;

sys/dev/fdt/if_mvpp.c

3891

mvpp2_prs_sram_shift_set(&pe, shift,

sys/dev/fdt/if_mvpp.c

3917

int32_t tid, shift, port_mask;

sys/dev/fdt/if_mvpp.c

3922

shift = 8;

sys/dev/fdt/if_mvpp.c

3926

shift = 4;

sys/dev/fdt/if_mvpp.c

3939

mvpp2_prs_sram_shift_set(&pe, 2 * ETHER_ADDR_LEN + shift,

sys/dev/fdt/imxccm.c

1012

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

1041

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

1062

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

1089

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

1110

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

1133

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

1323

reg &= ~(sc->sc_divs[idx].mask << sc->sc_divs[idx].shift);

sys/dev/fdt/imxccm.c

1324

reg |= (div << sc->sc_divs[idx].shift);

sys/dev/fdt/imxccm.c

1327

sc->sc_predivs[idx].mask << sc->sc_predivs[idx].shift);

sys/dev/fdt/imxccm.c

1511

div = div >> sc->sc_divs[idx].shift;

sys/dev/fdt/imxccm.c

1560

div = reg >> sc->sc_divs[idx].shift;

sys/dev/fdt/imxccm.c

1562

pre = reg >> sc->sc_predivs[idx].shift;

sys/dev/fdt/imxccm.c

1612

div = reg >> sc->sc_divs[idx].shift;

sys/dev/fdt/imxccm.c

1614

pre = reg >> sc->sc_predivs[idx].shift;

sys/dev/fdt/imxccm.c

1676

div = reg >> sc->sc_divs[idx].shift;

sys/dev/fdt/imxccm.c

1678

pre = reg >> sc->sc_predivs[idx].shift;

sys/dev/fdt/imxccm.c

1836

reg &= ~(sc->sc_divs[idx].mask << sc->sc_divs[idx].shift);

sys/dev/fdt/imxccm.c

1837

reg |= (div << sc->sc_divs[idx].shift);

sys/dev/fdt/imxccm.c

1869

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1871

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1873

mux |= (0x4 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1880

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1881

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1889

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1890

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1898

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1899

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1907

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1908

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1918

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1919

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1926

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1927

mux |= (0x0 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

193

uint16_t shift;

sys/dev/fdt/imxccm.c

1934

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1935

mux |= (0x2 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1942

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1943

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1950

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1951

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1958

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1959

mux |= (0x0 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1966

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1967

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1978

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1980

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1982

mux |= (0x4 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1989

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1990

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1998

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

1999

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

2007

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

2008

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

201

uint16_t shift;

sys/dev/fdt/imxccm.c

2016

mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

2017

mux |= (0x1 << sc->sc_muxs[idx].shift);

sys/dev/fdt/imxccm.c

570

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

593

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

616

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

637

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

780

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

803

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

832

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

853

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

874

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

897

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

920

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

943

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

966

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxccm.c

989

mux >>= sc->sc_muxs[idx].shift;

sys/dev/fdt/imxgpio.c

240

int s, val, reg, shift;

sys/dev/fdt/imxgpio.c

297

shift = irqno << 1;

sys/dev/fdt/imxgpio.c

300

shift = (irqno - 16) << 1;

sys/dev/fdt/imxgpio.c

304

bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg) & ~(0x3 << shift));

sys/dev/fdt/imxgpio.c

306

bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg) | val << shift);

sys/dev/fdt/imxiomuxc.c

148

uint8_t shift = (input_val >> 16) & 0xff;

sys/dev/fdt/imxiomuxc.c

150

uint32_t clr = ((1 << width) - 1) << shift;

sys/dev/fdt/imxiomuxc.c

151

uint32_t set = (input_val & 0xff) << shift;

sys/dev/fdt/mvpinctrl.c

251

uint32_t off, shift;

sys/dev/fdt/mvpinctrl.c

259

shift = (sc->sc_pins[i].pid % 8) * 4;

sys/dev/fdt/mvpinctrl.c

261

HWRITE4(sc, off, (HREAD4(sc, off) & ~(0xf << shift)) |

sys/dev/fdt/mvpinctrl.c

262

(sc->sc_pins[i].value << shift));

sys/dev/fdt/rkclock.c

576

int shift;

sys/dev/fdt/rkclock.c

585

shift = ffs(clk->sel_mask) - 1;

sys/dev/fdt/rkclock.c

586

if (shift == -1)

sys/dev/fdt/rkclock.c

589

mux = (reg & clk->sel_mask) >> shift;

sys/dev/fdt/rkclock.c

590

shift = ffs(clk->div_mask) - 1;

sys/dev/fdt/rkclock.c

591

if (shift == -1)

sys/dev/fdt/rkclock.c

594

div_con = (reg & clk->div_mask) >> shift;

sys/dev/fdt/rkclock.c

707

int shift;

sys/dev/fdt/rkclock.c

724

shift = ffs(clk->sel_mask) - 1;

sys/dev/fdt/rkclock.c

725

HWRITE4(sc, clk->reg, clk->sel_mask << 16 | mux << shift);

sys/dev/fdt/rkclock.c

787

int shift = 4 * (base / RK3288_CRU_CPLL_CON(0));

sys/dev/fdt/rkclock.c

835

RK3288_CRU_MODE_PLL_WORK_MODE_SLOW) << shift);

sys/dev/fdt/rkclock.c

859

RK3288_CRU_MODE_PLL_WORK_MODE_NORMAL) << shift);

sys/dev/fdt/rkpinctrl.c

763

int pull, strength, type, shift;

sys/dev/fdt/rkpinctrl.c

807

shift = (type > 2) ? 3 : 2;

sys/dev/fdt/rkpinctrl.c

808

mask = (((1 << shift) - 1) << ((idx % 8) * shift));

sys/dev/fdt/rkpinctrl.c

809

bits = (strength << ((idx % 8) * shift));

sys/dev/ic/ac97.c

357

u_int8_t shift; /* no use yet */

sys/dev/ic/ar5xxx.c

1274

u_int32_t mask, entry, last, data, shift, position;

sys/dev/ic/ar5xxx.c

1294

for (i = shift = 0, left = bits; left > 0; position = 0, entry++, i++) {

sys/dev/ic/ar5xxx.c

1305

position) << shift;

sys/dev/ic/ar5xxx.c

1306

shift += last - position;

sys/dev/ic/lm78.c

927

int reg, shift, data, divisor = 1;

sys/dev/ic/lm78.c

931

reg = 0x47; shift = 0;

sys/dev/ic/lm78.c

934

reg = 0x47; shift = 4;

sys/dev/ic/lm78.c

937

reg = 0x5b; shift = 0;

sys/dev/ic/lm78.c

940

reg = 0x5b; shift = 4;

sys/dev/ic/lm78.c

943

reg = 0x5c; shift = 0;

sys/dev/ic/lm78.c

946

reg = 0x5c; shift = 4;

sys/dev/ic/lm78.c

949

reg = 0x9e; shift = 0;

sys/dev/ic/lm78.c

962

divisor = (sc->lm_readreg(sc, reg) >> shift) & 0x7;

sys/dev/isa/nsclpcsio_isa.c

502

int port, shift;

sys/dev/isa/nsclpcsio_isa.c

506

shift = pin % 8;

sys/dev/isa/nsclpcsio_isa.c

507

data = (port << 4) | shift;

sys/dev/isa/nsclpcsio_isa.c

541

int port, shift, reg;

sys/dev/isa/nsclpcsio_isa.c

545

shift = pin % 8;

sys/dev/isa/nsclpcsio_isa.c

564

return ((data >> shift) & 0x1);

sys/dev/isa/nsclpcsio_isa.c

571

int port, shift, reg;

sys/dev/isa/nsclpcsio_isa.c

575

shift = pin % 8;

sys/dev/isa/nsclpcsio_isa.c

594

data &= ~(1 << shift);

sys/dev/isa/nsclpcsio_isa.c

596

data |= (1 << shift);

sys/dev/pci/cmpci.c

194

cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,

sys/dev/pci/cmpci.c

198

(val<<shift) |

sys/dev/pci/cmpci.c

199

(bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));

sys/dev/pci/cmpci.c

204

cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,

sys/dev/pci/cmpci.c

208

(val<<shift) |

sys/dev/pci/cmpci.c

209

(bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));

sys/dev/pci/drm/amd/amdgpu/amdgpu_atombios.c

205

gpio.shift = pin->ucGpioPinBitShift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_mode.h

569

u32 shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1503

uint32_t shift = (pos & 0x3) * 8;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1504

uint32_t mask = 0xffffffff << shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1516

value |= (*(uint32_t *)buf << shift) & mask;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ttm.c

1519

value = (value & mask) >> shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

180

unsigned int mask, shift, idx;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

187

shift = amdgpu_vm_pt_level_shift(adev, cursor->level);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

190

idx = (cursor->pfn >> shift) & mask;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

210

unsigned int shift, num_entries;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

218

shift = amdgpu_vm_pt_level_shift(adev, cursor->level - 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

225

cursor->pfn += 1ULL << shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

226

cursor->pfn &= ~((1ULL << shift) - 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

78

unsigned int shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

80

shift = amdgpu_vm_pt_level_shift(adev, adev->vm_manager.root_level);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

814

unsigned int shift, parent_shift, mask;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

828

shift = amdgpu_vm_pt_level_shift(adev, cursor.level);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

83

return round_up(adev->vm_manager.max_pfn, 1ULL << shift)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

84

>> shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

842

} else if (frag < shift) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

871

shift = parent_shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

873

1ULL << shift));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

877

incr = (uint64_t)AMDGPU_GPU_PAGE_SIZE << shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

879

pe_start = ((cursor.pfn >> shift) & mask) * 8;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

886

entry_end = 1ULL << shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

888

entry_end = ((uint64_t)mask + 1) << shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

895

unsigned int nptes = (upd_end - frag_start) >> shift;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

920

if (frag < shift)

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_pt.c

941

} else if (frag >= shift) {

sys/dev/pci/drm/amd/amdgpu/atom.c

1000

dst >>= shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

250

val = gctx->shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

253

val = 1 << gctx->shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

256

val = ~(1 << gctx->shift);

sys/dev/pci/drm/amd/amdgpu/atom.c

526

gctx->shift = val;

sys/dev/pci/drm/amd/amdgpu/atom.c

939

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

946

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

sys/dev/pci/drm/amd/amdgpu/atom.c

947

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/amd/amdgpu/atom.c

948

dst <<= shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

955

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

962

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

sys/dev/pci/drm/amd/amdgpu/atom.c

963

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/amd/amdgpu/atom.c

964

dst >>= shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

971

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

979

shift = atom_get_src(ctx, attr, ptr);

sys/dev/pci/drm/amd/amdgpu/atom.c

980

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/amd/amdgpu/atom.c

981

dst <<= shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

990

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/amd/amdgpu/atom.c

998

shift = atom_get_src(ctx, attr, ptr);

sys/dev/pci/drm/amd/amdgpu/atom.c

999

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/amd/amdgpu/atom.h

144

uint8_t shift;

sys/dev/pci/drm/amd/amdgpu/soc15.h

105

#define SOC15_REG_FIELD_VAL(val, mask, shift) (((val) & mask) >> shift)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

166

int shift = (k % 2) ? 0 : 4;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

167

int port_num = (rad[k / 2] >> shift) & 0xf;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

168

int next_port_num = (next_rad[k / 2] >> shift) & 0xf;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

262

int shift = (idx_2 % 2) ? 0 : 4;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

263

int port_num = (aconnector->mst_output_port->parent->rad[idx_2 / 2] >> shift) & 0xf;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

264

int port_num2 = (dm->secure_display_ctx.phy_id_mapping[idx].rad[idx_2 / 2] >> shift) & 0xf;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3250

u8 shift = 0;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3258

res = (val & mask) >> shift;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3281

shift += 16;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3292

u8 shift = 0;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3310

res |= (raw << shift);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3311

shift += 16;

sys/dev/pci/drm/amd/display/dc/dc_helper.c

102

field_value_mask->value = (field_value_mask->value & ~mask) | (mask & (value << shift));

sys/dev/pci/drm/amd/display/dc/dc_helper.c

111

uint32_t shift, mask, field_value;

sys/dev/pci/drm/amd/display/dc/dc_helper.c

119

shift = va_arg(ap, uint32_t);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

124

field_value, mask, shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

208

uint32_t mask, uint32_t shift, uint32_t condition_value, uint32_t time_out_us)

sys/dev/pci/drm/amd/display/dc/dc_helper.c

216

cmd_buf->reg_wait.condition_field_value = mask & (condition_value << shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

278

uint8_t shift, uint32_t mask, uint32_t *field_value)

sys/dev/pci/drm/amd/display/dc/dc_helper.c

281

*field_value = get_reg_field_value_ex(reg_val, mask, shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

428

uint32_t addr, uint32_t shift, uint32_t mask, uint32_t condition_value,

sys/dev/pci/drm/amd/display/dc/dc_helper.c

438

dmub_reg_wait_done_pack(ctx, addr, mask, shift, condition_value,

sys/dev/pci/drm/amd/display/dc/dc_helper.c

461

field_value = get_reg_field_value_ex(reg_val, mask, shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

511

uint32_t shift, mask, *field_value;

sys/dev/pci/drm/amd/display/dc/dc_helper.c

523

shift = va_arg(ap, uint32_t);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

527

*field_value = get_reg_field_value_ex(value, mask, shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

542

uint32_t shift, mask, field_value;

sys/dev/pci/drm/amd/display/dc/dc_helper.c

552

shift = va_arg(ap, uint32_t);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

556

reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

572

uint32_t shift, mask, field_value;

sys/dev/pci/drm/amd/display/dc/dc_helper.c

582

shift = va_arg(ap, uint32_t);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

586

reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

601

uint32_t shift, mask, *field_value;

sys/dev/pci/drm/amd/display/dc/dc_helper.c

613

shift = va_arg(ap, uint32_t);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

617

*field_value = get_reg_field_value_ex(value, mask, shift);

sys/dev/pci/drm/amd/display/dc/dc_helper.c

98

uint8_t shift)

sys/dev/pci/drm/amd/display/dc/dce/dce_aux.c

51

aux110->shift->field_name, aux110->mask->field_name

sys/dev/pci/drm/amd/display/dc/dce/dce_aux.c

513

const struct dce110_aux_registers_shift *shift,

sys/dev/pci/drm/amd/display/dc/dce/dce_aux.c

525

aux_engine110->shift = shift;

sys/dev/pci/drm/amd/display/dc/dce/dce_aux.h

266

const struct dce110_aux_registers_shift *shift;

sys/dev/pci/drm/amd/display/dc/dce/dce_aux.h

294

const struct dce110_aux_registers_shift *shift,

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

101

int32_t shift = 7;

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

109

write_bit_to_ddc(ddc_handle, SDA, (byte >> shift) & 1);

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

120

--shift;

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

121

} while (shift >= 0);

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

159

int32_t shift = 7;

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

174

data |= (1 << shift);

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

180

--shift;

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_sw.c

181

} while (shift >= 0);

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.c

276

const struct dce_panel_cntl_shift *shift,

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.c

287

dce_panel_cntl->shift = shift;

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.c

47

dce_panel_cntl->shift->field_name, dce_panel_cntl->mask->field_name

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h

118

const struct dce_panel_cntl_shift *shift;

sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h

126

const struct dce_panel_cntl_shift *shift,

sys/dev/pci/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c

208

const struct dcn301_panel_cntl_shift *shift,

sys/dev/pci/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c

212

dcn301_panel_cntl->shift = shift;

sys/dev/pci/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c

46

dcn301_panel_cntl->shift->field_name, dcn301_panel_cntl->mask->field_name

sys/dev/pci/drm/amd/display/dc/dcn301/dcn301_panel_cntl.h

86

const struct dcn301_panel_cntl_shift *shift;

sys/dev/pci/drm/amd/display/dc/dcn301/dcn301_panel_cntl.h

94

const struct dcn301_panel_cntl_shift *shift,

sys/dev/pci/drm/amd/display/dc/dm_services.h

106

uint8_t shift)

sys/dev/pci/drm/amd/display/dc/dm_services.h

109

return (reg_value & ~mask) | (mask & (value << shift));

sys/dev/pci/drm/amd/display/dc/dm_services.h

142

uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value,

sys/dev/pci/drm/amd/display/dc/dm_services.h

91

uint8_t shift)

sys/dev/pci/drm/amd/display/dc/dm_services.h

93

return (mask & reg_value) >> shift;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

331

static bool calculate_first_second_splitting(const int *mcache_boundaries, int num_boundaries, int shift,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

351

range_end = mcache_boundaries[left_cache_id] - shift - 1;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

362

range_start = mcache_boundaries[right_cache_id] - shift;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

396

int *pipe_vp_startx, int *pipe_vp_endx, unsigned int pipe_count, int shift_granularity, int *shift)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

414

for (*shift = 0; *shift <= max_shift; *shift += shift_granularity) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c

417

if (!calculate_first_second_splitting(mcache_boundaries, num_boundaries, *shift,

sys/dev/pci/drm/amd/display/dc/inc/reg_helper.h

392

uint8_t shift, uint32_t mask, uint32_t *field_value);

sys/dev/pci/drm/amd/display/dc/sspl/spl_fixpt31_32.h

192

static inline struct spl_fixed31_32 spl_fixpt_shl(struct spl_fixed31_32 arg, unsigned int shift)

sys/dev/pci/drm/amd/display/dc/sspl/spl_fixpt31_32.h

194

SPL_ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) ||

sys/dev/pci/drm/amd/display/dc/sspl/spl_fixpt31_32.h

195

((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift))));

sys/dev/pci/drm/amd/display/dc/sspl/spl_fixpt31_32.h

197

arg.value = arg.value << shift;

sys/dev/pci/drm/amd/display/dc/sspl/spl_fixpt31_32.h

206

static inline struct spl_fixed31_32 spl_fixpt_shr(struct spl_fixed31_32 arg, unsigned int shift)

sys/dev/pci/drm/amd/display/dc/sspl/spl_fixpt31_32.h

212

arg.value = arg.value >> shift;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn20.h

178

const struct dmub_srv_common_reg_shift shift;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.h

179

const struct dmub_srv_dcn31_reg_shift shift;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c

55

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.h

195

struct dmub_srv_dcn32_reg_shift shift;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c

53

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.h

197

struct dmub_srv_dcn35_reg_shift shift;

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn351.c

30

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn36.c

30

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.h

197

const struct dmub_srv_dcn401_reg_shift shift;

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

104

void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

108

*field_value = get_reg_field_value_ex(reg_val, mask, shift);

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

36

uint32_t value, uint32_t mask, uint8_t shift)

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

39

(field_value_mask->value & ~mask) | (mask & (value << shift));

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

48

uint32_t shift, mask, field_value;

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

56

shift = va_arg(ap, uint32_t);

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

61

shift);

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

67

uint8_t shift)

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.c

69

return (mask & reg_value) >> shift;

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.h

120

void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,

sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.h

45

#define FD(reg_field) (REGS)->shift.reg_field, (REGS)->mask.reg_field

sys/dev/pci/drm/amd/display/include/fixed31_32.h

210

static inline struct fixed31_32 dc_fixpt_shl(struct fixed31_32 arg, unsigned char shift)

sys/dev/pci/drm/amd/display/include/fixed31_32.h

212

ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) ||

sys/dev/pci/drm/amd/display/include/fixed31_32.h

213

((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift))));

sys/dev/pci/drm/amd/display/include/fixed31_32.h

215

arg.value = arg.value << shift;

sys/dev/pci/drm/amd/display/include/fixed31_32.h

224

static inline struct fixed31_32 dc_fixpt_shr(struct fixed31_32 arg, unsigned char shift)

sys/dev/pci/drm/amd/display/include/fixed31_32.h

230

arg.value = arg.value >> shift;

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

412

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c

427

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.h

73

u32 shift;

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c

2869

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.h

863

u32 shift;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/common_baco.c

115

entry[i].shift, entry[i].val, entry[i].timeout))

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/common_baco.c

45

u32 shift, u32 value, u32 timeout)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/common_baco.c

53

WREG32(reg, value << shift);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/common_baco.c

57

data = (data & (~mask)) | (value << shift);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/common_baco.c

94

entry[i].shift, entry[i].val, entry[i].timeout))

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/common_baco.h

40

uint32_t shift;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/common_baco.h

52

uint32_t shift;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h

49

uint32_t shift;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

908

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

929

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

102

original_data |= (field << shift);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

93

u32 shift = 0;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

95

shift = (offset % 4) << 3;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

97

mask = 0xFF << shift;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

99

mask = 0xFFFF << shift;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

760

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

766

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

772

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

792

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.h

48

uint32_t shift;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.h

56

uint32_t shift;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

179

int shift = (lct % 2) ? 0 : 4;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

186

ufp_num = (rad[idx] >> shift) & 0xf;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2039

int shift = 4;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2044

shift = (parent_lct % 2) ? 4 : 0;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2048

rad[idx] |= port->port_num << shift;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2222

int shift = (i % 2) ? 0 : 4;

sys/dev/pci/drm/display/drm_dp_mst_topology.c

2223

int port_num = (mstb->rad[i / 2] >> shift) & 0xf;

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

150

const int shift = gen8_pd_shift(lvl);

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

156

*idx = i915_pde_index(start, shift);

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

160

return i915_pde_index(end, shift) - *idx;

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

182

unsigned int shift = __gen8_pte_shift(vm->top);

sys/dev/pci/drm/i915/gt/gen8_ppgtt.c

184

return (vm->total + (1ull << shift) - 1) >> shift;

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3498

unsigned int shift = 0;

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3509

shift = irq_shifts[engine->id];

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3512

engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT << shift;

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3513

engine->irq_keep_mask = GT_CONTEXT_SWITCH_INTERRUPT << shift;

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3514

engine->irq_keep_mask |= GT_CS_MASTER_ERROR_INTERRUPT << shift;

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3515

engine->irq_keep_mask |= GT_WAIT_SEMAPHORE_INTERRUPT << shift;

sys/dev/pci/drm/i915/gt/intel_gtt.h

561

static inline u32 i915_pde_index(u64 addr, u32 shift)

sys/dev/pci/drm/i915/gt/intel_gtt.h

563

return (addr >> shift) & I915_PDE_MASK;

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

217

static unsigned long pd_count(u64 size, int shift)

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

220

return (size + 2 * (BIT_ULL(shift) - 1)) >> shift;

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

228

int shift, n, pt_sz;

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

230

shift = vm->pd_shift;

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

231

if (!shift)

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

242

count = pd_count(size, shift);

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

257

shift += ilog2(I915_PDES); /* Each PD holds 512 entries */

sys/dev/pci/drm/i915/gt/intel_ppgtt.c

258

count = pd_count(size, shift);

sys/dev/pci/drm/i915/gt/uc/intel_guc.h

278

u32 shift;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

1306

MISC_STATUS1) >> guc->timestamp.shift;

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2175

guc->timestamp.shift = gpm_timestamp_shift(gt);

sys/dev/pci/drm/i915/i915_perf.c

3229

u32 reg, shift;

sys/dev/pci/drm/i915/i915_perf.c

3234

shift = REG_FIELD_GET(GEN10_RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK,

sys/dev/pci/drm/i915/i915_perf.c

3237

return to_gt(i915)->clock_frequency << (3 - shift);

sys/dev/pci/drm/include/drm/drm_fixed.h

106

unsigned shift, sign = (a >> 63) & 1;

sys/dev/pci/drm/include/drm/drm_fixed.h

108

for (shift = 62; shift > 0; --shift)

sys/dev/pci/drm/include/drm/drm_fixed.h

109

if (((a >> shift) & 1) != sign)

sys/dev/pci/drm/include/drm/drm_fixed.h

110

return shift;

sys/dev/pci/drm/include/drm/drm_fixed.h

117

unsigned shift = drm_fixp_msbset(a) + drm_fixp_msbset(b);

sys/dev/pci/drm/include/drm/drm_fixed.h

120

if (shift > 61) {

sys/dev/pci/drm/include/drm/drm_fixed.h

121

shift = shift - 61;

sys/dev/pci/drm/include/drm/drm_fixed.h

122

a >>= (shift >> 1) + (shift & 1);

sys/dev/pci/drm/include/drm/drm_fixed.h

123

b >>= shift >> 1;

sys/dev/pci/drm/include/drm/drm_fixed.h

125

shift = 0;

sys/dev/pci/drm/include/drm/drm_fixed.h

129

if (shift > DRM_FIXED_POINT)

sys/dev/pci/drm/include/drm/drm_fixed.h

130

return result << (shift - DRM_FIXED_POINT);

sys/dev/pci/drm/include/drm/drm_fixed.h

132

if (shift < DRM_FIXED_POINT)

sys/dev/pci/drm/include/drm/drm_fixed.h

133

return result >> (DRM_FIXED_POINT - shift);

sys/dev/pci/drm/include/drm/drm_fixed.h

140

unsigned shift = 62 - drm_fixp_msbset(a);

sys/dev/pci/drm/include/drm/drm_fixed.h

143

a <<= shift;

sys/dev/pci/drm/include/drm/drm_fixed.h

145

if (shift < DRM_FIXED_POINT)

sys/dev/pci/drm/include/drm/drm_fixed.h

146

b >>= (DRM_FIXED_POINT - shift);

sys/dev/pci/drm/include/drm/drm_fixed.h

150

if (shift > DRM_FIXED_POINT)

sys/dev/pci/drm/include/drm/drm_fixed.h

151

return result >> (shift - DRM_FIXED_POINT);

sys/dev/pci/drm/include/linux/average.h

23

u_long shift = fls(recip) - 1; \

sys/dev/pci/drm/include/linux/average.h

28

p->value = ((((p->value << shift) - p->value) + \

sys/dev/pci/drm/include/linux/average.h

29

(value << (precision))) >> shift); \

sys/dev/pci/drm/include/linux/bitops.h

100

return (int64_t)(value << shift) >> shift;

sys/dev/pci/drm/include/linux/bitops.h

122

ror32(uint32_t word, unsigned int shift)

sys/dev/pci/drm/include/linux/bitops.h

124

return (word >> shift) | (word << (32 - shift));

sys/dev/pci/drm/include/linux/bitops.h

99

uint8_t shift = 63 - index;

sys/dev/pci/drm/include/linux/math64.h

78

mul_u64_u32_shr(uint64_t x, uint32_t y, unsigned int shift)

sys/dev/pci/drm/include/linux/math64.h

84

return (mul_u32_u32(lo, y) >> shift) +

sys/dev/pci/drm/include/linux/math64.h

85

(mul_u32_u32(hi, y) << (32 - shift));

sys/dev/pci/drm/radeon/atom.c

252

val = gctx->shift;

sys/dev/pci/drm/radeon/atom.c

255

val = 1 << gctx->shift;

sys/dev/pci/drm/radeon/atom.c

258

val = ~(1 << gctx->shift);

sys/dev/pci/drm/radeon/atom.c

529

gctx->shift = val;

sys/dev/pci/drm/radeon/atom.c

906

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/radeon/atom.c

913

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

sys/dev/pci/drm/radeon/atom.c

914

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/radeon/atom.c

915

dst <<= shift;

sys/dev/pci/drm/radeon/atom.c

922

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/radeon/atom.c

929

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

sys/dev/pci/drm/radeon/atom.c

930

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/radeon/atom.c

931

dst >>= shift;

sys/dev/pci/drm/radeon/atom.c

938

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/radeon/atom.c

946

shift = atom_get_src(ctx, attr, ptr);

sys/dev/pci/drm/radeon/atom.c

947

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/radeon/atom.c

948

dst <<= shift;

sys/dev/pci/drm/radeon/atom.c

957

uint8_t attr = U8((*ptr)++), shift;

sys/dev/pci/drm/radeon/atom.c

965

shift = atom_get_src(ctx, attr, ptr);

sys/dev/pci/drm/radeon/atom.c

966

SDEBUG(" shift: %d\n", shift);

sys/dev/pci/drm/radeon/atom.c

967

dst >>= shift;

sys/dev/pci/drm/radeon/atom.h

138

uint8_t shift;

sys/dev/pci/drm/radeon/ci_dpm.c

550

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/radeon/ci_dpm.c

565

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/radeon/ci_dpm.c

5786

dpm_table->VRHotGpio = gpio.shift;

sys/dev/pci/drm/radeon/ci_dpm.c

5795

dpm_table->AcDcGpio = gpio.shift;

sys/dev/pci/drm/radeon/ci_dpm.c

5806

switch (gpio.shift) {

sys/dev/pci/drm/radeon/ci_dpm.c

5825

DRM_DEBUG("Invalid PCC GPIO: %u!\n", gpio.shift);

sys/dev/pci/drm/radeon/ci_dpm.h

169

u32 shift;

sys/dev/pci/drm/radeon/kv_dpm.c

169

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/radeon/kv_dpm.c

184

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/radeon/kv_dpm.h

47

u32 shift;

sys/dev/pci/drm/radeon/radeon_atombios.c

223

gpio.shift = pin->ucGpioPinBitShift;

sys/dev/pci/drm/radeon/radeon_combios.c

3099

uint32_t val, shift, tmp;

sys/dev/pci/drm/radeon/radeon_combios.c

3110

shift = RBIOS8(offset) * 8;

sys/dev/pci/drm/radeon/radeon_combios.c

3112

and_mask = RBIOS8(offset) << shift;

sys/dev/pci/drm/radeon/radeon_combios.c

3113

and_mask |= ~(0xff << shift);

sys/dev/pci/drm/radeon/radeon_combios.c

3115

or_mask = RBIOS8(offset) << shift;

sys/dev/pci/drm/radeon/radeon_mode.h

482

u32 shift;

sys/dev/pci/drm/radeon/si_dpm.c

2694

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

sys/dev/pci/drm/radeon/si_dpm.h

38

u32 shift;

sys/dev/pci/drm/radeon/sumo_smc.c

166

u32 shift = 0;

sys/dev/pci/drm/radeon/sumo_smc.c

173

shift = 16;

sys/dev/pci/drm/radeon/sumo_smc.c

177

shift = 0;

sys/dev/pci/drm/radeon/sumo_smc.c

181

shift = 16;

sys/dev/pci/drm/radeon/sumo_smc.c

185

shift = 0;

sys/dev/pci/drm/radeon/sumo_smc.c

189

shift = 16;

sys/dev/pci/drm/radeon/sumo_smc.c

193

shift = 0;

sys/dev/pci/drm/radeon/sumo_smc.c

200

sclk_dpm_tdp_limit &= ~(mask << shift);

sys/dev/pci/drm/radeon/sumo_smc.c

201

sclk_dpm_tdp_limit |= (tdp_limit << shift);

sys/dev/pci/envy.c

1511

int reg, shift, src;

sys/dev/pci/envy.c

1516

shift = 3 * (out / 2) + ((out & 1) ? 20 : 8);

sys/dev/pci/envy.c

1517

src = (reg >> shift) & ENVY_MT_HTSRC_MASK;

sys/dev/pci/envy.c

1528

shift = (out & 1) ? (out & ~1) + 8 : out;

sys/dev/pci/envy.c

1529

src = (reg >> shift) & 3;

sys/dev/pci/envy.c

1547

int reg, shift, mask, sel;

sys/dev/pci/envy.c

1559

shift = 3 * (out / 2) + ((out & 1) ? 20 : 8);

sys/dev/pci/envy.c

1560

mask = ENVY_MT_HTSRC_MASK << shift;

sys/dev/pci/envy.c

1562

reg = (reg & ~mask) | (sel << shift);

sys/dev/pci/envy.c

1578

shift = out * ENVY_MT_INSEL_BITS;

sys/dev/pci/envy.c

1579

mask = ENVY_MT_INSEL_MASK << shift;

sys/dev/pci/envy.c

1581

reg = (reg & ~mask) | (sel << shift);

sys/dev/pci/envy.c

1598

shift = (out & 1) ? (out & ~1) + 8 : out;

sys/dev/pci/envy.c

1599

mask = ENVY_MT_OUTSRC_MASK << shift;

sys/dev/pci/envy.c

1601

reg = (reg & ~mask) | (sel << shift);

sys/dev/pci/envy.c

1633

int reg, shift, mask, sel;

sys/dev/pci/envy.c

1646

shift = 8 + out * ENVY_MT_SPDSEL_BITS;

sys/dev/pci/envy.c

1647

mask = ENVY_MT_SPDSEL_MASK << shift;

sys/dev/pci/envy.c

1648

reg = (reg & ~mask) | (sel << shift);

sys/dev/pci/envy.c

1663

shift = out * 2;

sys/dev/pci/envy.c

1664

mask = ENVY_MT_SPDSRC_MASK << shift;

sys/dev/pci/envy.c

1665

reg = (reg & ~mask) | (sel << shift);

sys/dev/pci/if_iavf.c

96

#define I40E_MASK(mask, shift) ((mask) << (shift))

sys/dev/pci/if_igc.c

2400

uint32_t rss_key[10], mrqc, reta, shift = 0;

sys/dev/pci/if_igc.c

2421

queue_id = queue_id << shift;

sys/dev/pci/if_ixl.c

103

#define I40E_MASK(mask, shift) ((mask) << (shift))

sys/dev/pci/if_rtwn.c

824

int infosz, pktlen, shift, error;

sys/dev/pci/if_rtwn.c

872

shift = MS(rxdw0, R92C_RXDW0_SHIFT);

sys/dev/pci/if_rtwn.c

883

pktlen, rate, infosz, shift, rssi));

sys/dev/pci/if_rtwn.c

913

m->m_pkthdr.len = m->m_len = pktlen + infosz + shift;

sys/dev/pci/if_rtwn.c

921

m_adj(m, infosz + shift);

sys/dev/pci/if_rtwn.c

923

m_adj(m, shift);

sys/dev/pv/pvclock.c

292

pvclock_scale_delta(uint64_t delta, uint32_t mul_frac, int shift)

sys/dev/pv/pvclock.c

296

if (shift < 0)

sys/dev/pv/pvclock.c

297

delta >>= -shift;

sys/dev/pv/pvclock.c

299

delta <<= shift;

sys/dev/pv/pvclock.c

326

int8_t shift;

sys/dev/pv/pvclock.c

337

shift = ti->ti_tsc_shift;

sys/dev/pv/pvclock.c

351

ctr = pvclock_scale_delta(delta, mul_frac, shift) + system_time;

sys/dev/pv/viornd.c

103

shift = VIORND_INTERVAL_SHIFT(sc->sc_dev.dv_cfdata->cf_flags);

sys/dev/pv/viornd.c

104

if (shift == 0)

sys/dev/pv/viornd.c

105

shift = VIORND_INTERVAL_SHIFT_DEFAULT;

sys/dev/pv/viornd.c

106

sc->sc_interval = 15 * (1 << shift);

sys/dev/pv/viornd.c

87

unsigned int shift;

sys/dev/sdmmc/sdmmcreg.h

300

int shift, bs, bc;

sys/dev/sdmmc/sdmmcreg.h

307

shift = 0;

sys/dev/sdmmc/sdmmcreg.h

315

dst |= (*sp++ >> bs) << shift;

sys/dev/sdmmc/sdmmcreg.h

316

shift += bc;

sys/dev/usb/if_mtw.c

1079

int error, ntries, shift;

sys/dev/usb/if_mtw.c

1091

shift = MT7601_BANK_SHIFT;

sys/dev/usb/if_mtw.c

1093

shift = MT7610_BANK_SHIFT;

sys/dev/usb/if_mtw.c

1095

tmp = MTW_RF_CSR_KICK | (bank & 0xf) << shift | reg << 8;

sys/dev/usb/if_mtw.c

1116

int error, ntries, shift;

sys/dev/usb/if_mtw.c

1128

shift = MT7601_BANK_SHIFT;

sys/dev/usb/if_mtw.c

1130

shift = MT7610_BANK_SHIFT;

sys/dev/usb/if_mtw.c

1132

tmp = MTW_RF_CSR_WRITE | MTW_RF_CSR_KICK | (bank & 0xf) << shift |

sys/dev/usb/if_ure.c

285

uint8_t shift;

sys/dev/usb/if_ure.c

287

shift = (reg & 3) << 3;

sys/dev/usb/if_ure.c

292

val >>= shift;

sys/dev/usb/if_ure.c

302

uint8_t shift;

sys/dev/usb/if_ure.c

304

shift = (reg & 2) << 3;

sys/dev/usb/if_ure.c

309

val >>= shift;

sys/dev/usb/if_ure.c

328

uint8_t shift;

sys/dev/usb/if_ure.c

331

shift = reg & 3;

sys/dev/usb/if_ure.c

335

byen <<= shift;

sys/dev/usb/if_ure.c

336

val <<= (shift << 3);

sys/dev/usb/if_ure.c

349

uint8_t shift;

sys/dev/usb/if_ure.c

352

shift = reg & 2;

sys/dev/usb/if_ure.c

356

byen <<= shift;

sys/dev/usb/if_ure.c

357

val <<= (shift << 3);

sys/dev/x86emu/x86emu.c

5166

uint8_t shift;

sys/dev/x86emu/x86emu.c

5173

shift = emu->x86.R_CL;

sys/dev/x86emu/x86emu.c

5175

destval = decode_and_fetch_long_imm8(emu, &shift);

sys/dev/x86emu/x86emu.c

5178

destval = shld_long(emu, destval, *shiftreg, shift);

sys/dev/x86emu/x86emu.c

5180

destval = shrd_long(emu, destval, *shiftreg, shift);

sys/dev/x86emu/x86emu.c

5187

uint8_t shift;

sys/dev/x86emu/x86emu.c

5194

shift = emu->x86.R_CL;

sys/dev/x86emu/x86emu.c

5196

destval = decode_and_fetch_word_imm8(emu, &shift);

sys/dev/x86emu/x86emu.c

5199

destval = shld_word(emu, destval, *shiftreg, shift);

sys/dev/x86emu/x86emu.c

5201

destval = shrd_word(emu, destval, *shiftreg, shift);

sys/dev/x86emu/x86emu.c

5528

uint8_t shift;

sys/dev/x86emu/x86emu.c

5534

srcval = decode_and_fetch_long_imm8(emu, &shift);

sys/dev/x86emu/x86emu.c

5535

bit = shift & 0x1F;

sys/dev/x86emu/x86emu.c

5558

uint8_t shift;

sys/dev/x86emu/x86emu.c

5564

srcval = decode_and_fetch_word_imm8(emu, &shift);

sys/dev/x86emu/x86emu.c

5565

bit = shift & 0xF;

sys/lib/libkern/ashldi3.c

41

__ashldi3(quad_t a, qshift_t shift)

sys/lib/libkern/ashldi3.c

45

if (shift == 0)

sys/lib/libkern/ashldi3.c

48

if (shift >= INT_BITS) {

sys/lib/libkern/ashldi3.c

49

aa.ul[H] = aa.ul[L] << (shift - INT_BITS);

sys/lib/libkern/ashldi3.c

52

aa.ul[H] = (aa.ul[H] << shift) |

sys/lib/libkern/ashldi3.c

53

(aa.ul[L] >> (INT_BITS - shift));

sys/lib/libkern/ashldi3.c

54

aa.ul[L] <<= shift;

sys/lib/libkern/ashrdi3.c

40

__ashrdi3(quad_t a, qshift_t shift)

sys/lib/libkern/ashrdi3.c

44

if (shift == 0)

sys/lib/libkern/ashrdi3.c

47

if (shift >= INT_BITS) {

sys/lib/libkern/ashrdi3.c

58

aa.ul[L] = aa.sl[H] >> (shift - INT_BITS);

sys/lib/libkern/ashrdi3.c

61

aa.ul[L] = (aa.ul[L] >> shift) |

sys/lib/libkern/ashrdi3.c

62

(aa.ul[H] << (INT_BITS - shift));

sys/lib/libkern/ashrdi3.c

63

aa.sl[H] >>= shift;

sys/lib/libkern/lshldi3.c

41

__lshldi3(quad_t a, qshift_t shift)

sys/lib/libkern/lshldi3.c

45

if (shift == 0)

sys/lib/libkern/lshldi3.c

48

if (shift >= INT_BITS) {

sys/lib/libkern/lshldi3.c

49

aa.ul[H] = aa.ul[L] << (shift - INT_BITS);

sys/lib/libkern/lshldi3.c

52

aa.ul[H] = (aa.ul[H] << shift) |

sys/lib/libkern/lshldi3.c

53

(aa.ul[L] >> (INT_BITS - shift));

sys/lib/libkern/lshldi3.c

54

aa.ul[L] <<= shift;

sys/lib/libkern/lshrdi3.c

40

__lshrdi3(quad_t a, qshift_t shift)

sys/lib/libkern/lshrdi3.c

44

if (shift == 0)

sys/lib/libkern/lshrdi3.c

47

if (shift >= INT_BITS) {

sys/lib/libkern/lshrdi3.c

48

aa.ul[L] = aa.ul[H] >> (shift - INT_BITS);

sys/lib/libkern/lshrdi3.c

51

aa.ul[L] = (aa.ul[L] >> shift) |

sys/lib/libkern/lshrdi3.c

52

(aa.ul[H] << (INT_BITS - shift));

sys/lib/libkern/lshrdi3.c

53

aa.ul[H] >>= shift;

sys/net/art.c

327

unsigned int shift;

sys/net/art.c

353

shift = 8 - plen;

sys/net/art.c

355

return ((an->an_addr[i] >> shift) == (addr[i] >> shift));

sys/net/if_gre.c

3303

unsigned int shift = GRE_KEY_SHIFT;

sys/net/if_gre.c

3309

shift = GRE_KEY_ENTROPY_SHIFT;

sys/net/if_gre.c

3316

key = htonl(ifr->ifr_vnetid << shift);

sys/net/if_gre.c

3328

int shift;

sys/net/if_gre.c

3334

shift = GRE_KEY_ENTROPY_SHIFT;

sys/net/if_gre.c

3337

shift = GRE_KEY_SHIFT;

sys/net/if_gre.c

3341

ifr->ifr_vnetid = ntohl(tunnel->t_key) >> shift;

sys/net/toeplitz.c

122

unsigned int b, shift, val;

sys/net/toeplitz.c

135

shift = NBBY - b - 1;

sys/net/toeplitz.c

136

if (val & (1 << shift))

usr.bin/aucat/dsp.c

568

oshift = p->shift;

usr.bin/aucat/dsp.c

621

oshift = p->shift;

usr.bin/aucat/dsp.c

655

p->shift = 32 - par->bps * 8;

usr.bin/aucat/dsp.c

657

p->shift = 32 - par->bits;

usr.bin/aucat/dsp.c

660

p->bias = (1U << 31) >> p->shift;

usr.bin/aucat/dsp.c

709

ishift = p->shift;

usr.bin/aucat/dsp.c

838

p->shift = 32 - par->bps * 8;

usr.bin/aucat/dsp.c

840

p->shift = 32 - par->bits;

usr.bin/aucat/dsp.c

843

p->bias = (1U << 31) >> p->shift;

usr.bin/aucat/dsp.h

95

unsigned int shift; /* shift to get 32bit MSB */

usr.bin/cal/cal.c

250

int shift;

usr.bin/cal/cal.c

261

shift = 1;

usr.bin/cal/cal.c

265

shift = 2;

usr.bin/cal/cal.c

266

return ((((yearday + 1) - (weekday - 1)) / 7) + shift);

usr.bin/ctfconv/dw.c

100

unsigned int shift = 0;

usr.bin/ctfconv/dw.c

104

while (shift < 64 && !dw_read_u8(d, &x)) {

usr.bin/ctfconv/dw.c

105

res |= (uint64_t)(x & 0x7f) << shift;

usr.bin/ctfconv/dw.c

106

shift += 7;

usr.bin/ctfconv/dw.c

108

if (signextend && shift < 64 && (x & 0x40) != 0)

usr.bin/ctfconv/dw.c

109

res |= ~(uint64_t)0 << shift;

usr.bin/less/input.c

329

goto shift;

usr.bin/less/input.c

346

shift:

usr.bin/less/line.c

209

pshift(int shift)

usr.bin/less/line.c

220

if (shift > column - lmargin)

usr.bin/less/line.c

221

shift = column - lmargin;

usr.bin/less/line.c

222

if (shift > curr - lmargin)

usr.bin/less/line.c

223

shift = curr - lmargin;

usr.bin/less/line.c

230

while (shifted <= shift && from < curr) {

usr.bin/less/line.c

267

if (width == 2 && shift - shifted == 1) {

usr.bin/less/line.c

296

if (shift - shifted < width)

usr.bin/sndiod/dsp.c

499

oshift = p->shift;

usr.bin/sndiod/dsp.c

552

oshift = p->shift;

usr.bin/sndiod/dsp.c

586

p->shift = 32 - par->bps * 8;

usr.bin/sndiod/dsp.c

588

p->shift = 32 - par->bits;

usr.bin/sndiod/dsp.c

591

p->bias = (1U << 31) >> p->shift;

usr.bin/sndiod/dsp.c

640

ishift = p->shift;

usr.bin/sndiod/dsp.c

674

p->shift = 32 - par->bps * 8;

usr.bin/sndiod/dsp.c

676

p->shift = 32 - par->bits;

usr.bin/sndiod/dsp.c

679

p->bias = (1U << 31) >> p->shift;

usr.bin/sndiod/dsp.h

95

unsigned int shift; /* shift to get 32bit MSB */

usr.bin/ssh/bitmap.c

190

size_t i, offset, shift;

usr.bin/ssh/bitmap.c

201

shift = ((l + (BITMAP_BYTES - 1)) % BITMAP_BYTES) * 8;

usr.bin/ssh/bitmap.c

203

b->d[offset] |= (BITMAP_WTYPE)s[i] << shift;

usr.bin/ssh/bitmap.c

204

if (shift == 0) {

usr.bin/ssh/bitmap.c

206

shift = BITMAP_BITS - 8;

usr.bin/ssh/bitmap.c

208

shift -= 8;

usr.bin/vi/common/key.c

231

int cnt, shift;

usr.bin/vi/common/key.c

277

shift = SHIFT - 3;

usr.bin/vi/common/key.c

279

cnt = BITS / 3; cnt-- > 0; mask >>= 3, shift -= 3)

usr.bin/vi/common/key.c

280

sp->cname[len++] = octdigit[(ch & mask) >> shift];

usr.bin/vi/ex/ex_shift.c

25

static int shift(SCR *, EXCMD *, enum which);

usr.bin/vi/ex/ex_shift.c

36

return (shift(sp, cmdp, LEFT));

usr.bin/vi/ex/ex_shift.c

47

return (shift(sp, cmdp, RIGHT));

usr.bin/vi/ex/ex_shift.c

59

return (shift(sp, cmdp, RETAB));

usr.bin/yacc/defs.h

179

short shift[1];

usr.bin/yacc/lalr.c

217

symbol = accessing_symbol[sp->shift[i]];

usr.bin/yacc/lalr.c

247

state2 = sp->shift[i];

usr.bin/yacc/lalr.c

312

symbol = accessing_symbol[sp->shift[j]];

usr.bin/yacc/lalr.c

319

symbol = accessing_symbol[sp->shift[j]];

usr.bin/yacc/lalr.c

380

stateno = sp->shift[j];

usr.bin/yacc/lr0.c

341

sp2 = p->shift;

usr.bin/yacc/mkpar.c

108

tto_state = sp->shift;

usr.bin/yacc/mkpar.c

194

tto_state = p->shift;

usr.bin/yacc/verbose.c

271

as = accessing_symbol[sp->shift[sp->nshifts - 1]];

usr.bin/yacc/verbose.c

342

tto_state = sp->shift;

usr.sbin/bgpd/chash.c

923

ch_rotate(uint64_t val, int shift)

usr.sbin/bgpd/chash.c

925

return shift == 0 ? val : ((val >> shift) | (val << (64 - shift)));

usr.sbin/bgpd/rde_attr.c

786

int l, overflow = 0, shift = 0, size, wpos = 0;

usr.sbin/bgpd/rde_attr.c

845

shift = 2;

usr.sbin/bgpd/rde_attr.c

854

if (asp->len > shift)

usr.sbin/bgpd/rde_attr.c

855

memcpy(p + wpos, asp->data + shift, asp->len - shift);

usr.sbin/bgpd/util.c

1318

unsigned int n_bits, shift;

usr.sbin/bgpd/util.c

1321

shift = n_bits - subbin;

usr.sbin/bgpd/util.c

1322

mask = (1U << shift) - 1;

usr.sbin/hostapd/handle.c

100

else if (flags & (HOSTAPD_ACTION_F_REF_RANDOM << shift)) {

usr.sbin/hostapd/handle.c

91

hostapd_handle_ref(u_int flags, u_int shift, u_int8_t *wfrom, u_int8_t *wto,

usr.sbin/hostapd/handle.c

94

if (flags & (HOSTAPD_ACTION_F_REF_FROM << shift))

usr.sbin/hostapd/handle.c

96

else if (flags & (HOSTAPD_ACTION_F_REF_TO << shift))

usr.sbin/hostapd/handle.c

98

else if (flags & (HOSTAPD_ACTION_F_REF_BSSID << shift))

usr.sbin/ntpd/client.c

116

p->shift = 0;

usr.sbin/ntpd/client.c

386

p->reply[p->shift].offset = ((T2 - T1) + (T3 - T4)) / 2 - getoffset();

usr.sbin/ntpd/client.c

387

p->reply[p->shift].delay = (T4 - T1) - (T3 - T2);

usr.sbin/ntpd/client.c

388

p->reply[p->shift].status.stratum = msg.stratum;

usr.sbin/ntpd/client.c

389

if (p->reply[p->shift].delay < 0) {

usr.sbin/ntpd/client.c

395

p->reply[p->shift].delay, (long long)interval);

usr.sbin/ntpd/client.c

398

p->reply[p->shift].error = (T2 - T1) - (T3 - T4);

usr.sbin/ntpd/client.c

399

p->reply[p->shift].rcvd = getmonotime();

usr.sbin/ntpd/client.c

400

p->reply[p->shift].good = 1;

usr.sbin/ntpd/client.c

402

p->reply[p->shift].status.leap = (msg.status & LIMASK);

usr.sbin/ntpd/client.c

403

p->reply[p->shift].status.precision = msg.precision;

usr.sbin/ntpd/client.c

404

p->reply[p->shift].status.rootdelay = sfp_to_d(msg.rootdelay);

usr.sbin/ntpd/client.c

405

p->reply[p->shift].status.rootdispersion = sfp_to_d(msg.dispersion);

usr.sbin/ntpd/client.c

406

p->reply[p->shift].status.refid = msg.refid;

usr.sbin/ntpd/client.c

407

p->reply[p->shift].status.reftime = lfp_to_d(msg.reftime);

usr.sbin/ntpd/client.c

408

p->reply[p->shift].status.poll = msg.ppoll;

usr.sbin/ntpd/client.c

411

p->reply[p->shift].status.send_refid =

usr.sbin/ntpd/client.c

421

memcpy((char *)&p->reply[p->shift].status.send_refid, digest,

usr.sbin/ntpd/client.c

424

p->reply[p->shift].status.send_refid = msg.xmttime.fractionl;

usr.sbin/ntpd/client.c

437

offset = p->reply[p->shift].offset;

usr.sbin/ntpd/client.c

438

delay = p->reply[p->shift].delay;

usr.sbin/ntpd/client.c

443

handle_auto(p->trusted, p->reply[p->shift].offset);

usr.sbin/ntpd/client.c

445

priv_settime(p->reply[p->shift].offset, "");

usr.sbin/ntpd/client.c

463

if (++p->shift >= OFFSET_ARRAY_SIZE)

usr.sbin/ntpd/client.c

464

p->shift = 0;

usr.sbin/ntpd/client.c

472

int shift, best = -1, good = 0;

usr.sbin/ntpd/client.c

481

for (shift = 0; shift < OFFSET_ARRAY_SIZE; shift++)

usr.sbin/ntpd/client.c

482

if (p->reply[shift].good) {

usr.sbin/ntpd/client.c

485

p->reply[shift].delay < p->reply[best].delay)

usr.sbin/ntpd/client.c

486

best = shift;

usr.sbin/ntpd/client.c

494

for (shift = 0; shift < OFFSET_ARRAY_SIZE; shift++)

usr.sbin/ntpd/client.c

495

if (p->reply[shift].rcvd <= p->reply[best].rcvd)

usr.sbin/ntpd/client.c

496

p->reply[shift].good = 0;

usr.sbin/ntpd/client.c

58

p->shift = 0;

usr.sbin/ntpd/control.c

349

int shift, best = -1, validdelaycnt = 0, jittercnt = 0;

usr.sbin/ntpd/control.c

369

for (shift = 0; shift < OFFSET_ARRAY_SIZE; shift++) {

usr.sbin/ntpd/control.c

370

if (p->reply[shift].delay > 0.0) {

usr.sbin/ntpd/control.c

371

cp->offset += p->reply[shift].offset;

usr.sbin/ntpd/control.c

372

cp->delay += p->reply[shift].delay;

usr.sbin/ntpd/control.c

375

p->reply[shift].delay < p->reply[best].delay)

usr.sbin/ntpd/control.c

376

best = shift;

usr.sbin/ntpd/control.c

389

for (shift = 0; shift < OFFSET_ARRAY_SIZE; shift++) {

usr.sbin/ntpd/control.c

390

if (p->reply[shift].delay > 0.0 && shift != best) {

usr.sbin/ntpd/control.c

391

cp->jitter += square(p->reply[shift].delay -

usr.sbin/ntpd/control.c

401

if (p->shift == 0)

usr.sbin/ntpd/control.c

402

shift = OFFSET_ARRAY_SIZE - 1;

usr.sbin/ntpd/control.c

404

shift = p->shift - 1;

usr.sbin/ntpd/control.c

407

p->reply[shift].status.send_refid == conf->status.refid)

usr.sbin/ntpd/control.c

419

cp->stratum = p->reply[shift].status.stratum;

usr.sbin/ntpd/control.c

428

u_int8_t shift;

usr.sbin/ntpd/control.c

439

if (s->shift == 0)

usr.sbin/ntpd/control.c

440

shift = SENSOR_OFFSETS - 1;

usr.sbin/ntpd/control.c

442

shift = s->shift - 1;

usr.sbin/ntpd/control.c

445

s->offsets[shift].status.send_refid == conf->status.refid)

usr.sbin/ntpd/control.c

452

cs->stratum = s->offsets[shift].status.stratum;

usr.sbin/ntpd/control.c

455

cs->offset = s->offsets[shift].offset * 1000.0;

usr.sbin/ntpd/ntpd.h

172

u_int8_t shift;

usr.sbin/ntpd/ntpd.h

192

u_int8_t shift;

usr.sbin/ntpd/sensors.c

216

s->offsets[s->shift].offset = (sensor.value / -1e9) - getoffset() +

usr.sbin/ntpd/sensors.c

218

s->offsets[s->shift].rcvd = sensor.tv.tv_sec;

usr.sbin/ntpd/sensors.c

219

s->offsets[s->shift].good = 1;

usr.sbin/ntpd/sensors.c

221

s->offsets[s->shift].status.send_refid = s->refid;

usr.sbin/ntpd/sensors.c

223

s->offsets[s->shift].status.stratum = s->stratum;

usr.sbin/ntpd/sensors.c

224

s->offsets[s->shift].status.rootdelay = 0;

usr.sbin/ntpd/sensors.c

225

s->offsets[s->shift].status.rootdispersion = 0;

usr.sbin/ntpd/sensors.c

226

s->offsets[s->shift].status.reftime = sensor.tv.tv_sec;

usr.sbin/ntpd/sensors.c

227

s->offsets[s->shift].status.synced = 1;

usr.sbin/ntpd/sensors.c

230

s->offsets[s->shift].offset);

usr.sbin/ntpd/sensors.c

232

if (++s->shift >= SENSOR_OFFSETS) {

usr.sbin/ntpd/sensors.c

233

s->shift = 0;

usr.sbin/pcidump/pcidump.c

510

uint32_t shift = dcap & 0x7;

usr.sbin/pcidump/pcidump.c

511

return (128 << shift);

usr.sbin/pcidump/pcidump.c

517

uint32_t shift = (dcsr >> 5) & 0x7;

usr.sbin/pcidump/pcidump.c

518

return (128 << shift);

usr.sbin/pcidump/pcidump.c

524

uint32_t shift = (dcsr >> 12) & 0x7;

usr.sbin/pcidump/pcidump.c

525

return (128 << shift);

usr.sbin/unbound/util/storage/slabhash.c

113

return ((hash & sl->mask) >> sl->shift);

usr.sbin/unbound/util/storage/slabhash.c

138

id, (unsigned)sl->size, (unsigned)sl->mask, sl->shift);

usr.sbin/unbound/util/storage/slabhash.c

66

sl->shift = 0;

usr.sbin/unbound/util/storage/slabhash.c

70

sl->shift = 0;

usr.sbin/unbound/util/storage/slabhash.c

73

sl->shift ++;

usr.sbin/unbound/util/storage/slabhash.h

63

unsigned int shift;

usr.sbin/vmd/x86_vm.c

1019

int level, shift, pdidx;

usr.sbin/vmd/x86_vm.c

1049

shift = L4_SHIFT;

usr.sbin/vmd/x86_vm.c

1054

shift = L3_SHIFT;

usr.sbin/vmd/x86_vm.c

1061

shift = 22;

usr.sbin/vmd/x86_vm.c

1070

pdidx = (va & mask) >> shift;

usr.sbin/vmd/x86_vm.c

1109

shift -= shift_width;

usr.sbin/vmd/x86_vm.c

1114

low_mask = (1 << shift) - 1;

usr.sbin/zic/zic.c

1280

int shift;

usr.sbin/zic/zic.c

1282

for (i = 0, shift = 24; i < 4; ++i, shift -= 8)

usr.sbin/zic/zic.c

1283

buf[i] = val >> shift;

usr.sbin/zic/zic.c

1290

int shift;

usr.sbin/zic/zic.c

1292

for (i = 0, shift = 56; i < 8; ++i, shift -= 8)

usr.sbin/zic/zic.c

1293

buf[i] = val >> shift;