sys/dev/ic/qwx.c

20604

set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, sc->sc_flags);

sys/dev/ic/qwx.c

20605

set_bit(ATH11K_FLAG_RAW_MODE, sc->sc_flags);

sys/dev/ic/qwx.c

20618

set_bit(ATH11K_FLAG_RAW_MODE, sc->sc_flags);

sys/dev/ic/qwx.c

20678

set_bit(ATH11K_FLAG_QMI_FAIL, sc->sc_flags);

sys/dev/ic/qwx.c

23604

set_bit(ATH11K_CAC_RUNNING, &ar->dev_flags);

sys/dev/ic/qwx.c

23903

set_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);

sys/dev/ic/qwx.c

410

set_bit(ATH11K_FLAG_CRASH_FLUSH, sc->sc_flags);

sys/dev/ic/qwz.c

17845

set_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, sc->sc_flags);

sys/dev/ic/qwz.c

17846

set_bit(ATH12K_FLAG_RAW_MODE, sc->sc_flags);

sys/dev/ic/qwz.c

17859

set_bit(ATH12K_FLAG_RAW_MODE, sc->sc_flags);

sys/dev/ic/qwz.c

17919

set_bit(ATH12K_FLAG_QMI_FAIL, sc->sc_flags);

sys/dev/ic/qwz.c

20798

set_bit(ATH12K_CAC_RUNNING, &ar->dev_flags);

sys/dev/ic/qwz.c

21085

set_bit(ATH12K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);

sys/dev/ic/qwz.c

327

set_bit(ATH12K_FLAG_CRASH_FLUSH, sc->sc_flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

6040

set_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

6259

set_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

6535

set_bit(AMDGPU_HOST_FLR, &reset_context->flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

7300

set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

7301

set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

7308

set_bit(AMDGPU_SKIP_HW_RESET, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

1074

set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

1075

set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

223

set_bit(pipe * adev->gfx.mec.num_queue_per_pipe + queue,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

231

set_bit(i, adev->gfx.mec_bitmap[j].queue_bitmap);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

256

set_bit(pipe * num_queue_per_pipe + queue,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

261

set_bit(i, adev->gfx.me.queue_bitmap);

sys/dev/pci/drm/amd/amdgpu/amdgpu_job.c

166

set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_mes.c

57

set_bit(i, mes->doorbell_bitmap);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2792

set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2796

set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

2810

set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4579

set_bit(AMDGPU_RAS_BLOCK__LAST, &ras->ras_err_state);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

4603

set_bit(block, &ras->ras_err_state);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm_sdma.c

141

set_bit(DRM_SCHED_FENCE_DONT_PIPELINE, &f->flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1691

set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1692

set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c

825

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c

826

set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

796

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

797

set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

791

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

792

set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

819

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

989

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1099

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1921

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1922

set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1938

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1939

set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1952

set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1953

set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1954

set_bit(AMDGPU_MMHUB1(0), adev->vmhubs_mask);

sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c

289

set_bit(AMDGPU_HOST_FLR, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/mxgpu_nv.c

356

set_bit(AMDGPU_HOST_FLR, &reset_context.flags);

sys/dev/pci/drm/amd/amdgpu/mxgpu_vi.c

526

set_bit(AMDGPU_HOST_FLR, &reset_context.flags);

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

1688

set_bit(q->sdma_id, dqm->sdma_bitmap);

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

1692

set_bit(q->sdma_id, dqm->xgmi_sdma_bitmap);

sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c

490

set_bit(found, qpd->doorbell_bitmap);

sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c

77

set_bit(found, pqm->queue_slot_bitmap);

sys/dev/pci/drm/amd/pm/swsmu/amdgpu_smu.c

1325

set_bit(fea_id, fea_cap->cap_map);

sys/dev/pci/drm/apple/dcp.c

876

set_bit(0, dcp->memdesc_map);

sys/dev/pci/drm/apple/iomfb_template.c

352

set_bit(id, dcp->memdesc_map);

sys/dev/pci/drm/apple/iomfb_template.c

437

set_bit(id, dcp->memdesc_map);

sys/dev/pci/drm/drm_linux.c

1806

set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);

sys/dev/pci/drm/drm_linux.c

1973

set_bit(DMA_FENCE_FLAG_SEQ64_BIT, &fence->flags);

sys/dev/pci/drm/i915/display/intel_display.c

1960

set_bit(POWER_DOMAIN_PIPE(pipe), mask->bits);

sys/dev/pci/drm/i915/display/intel_display.c

1961

set_bit(POWER_DOMAIN_TRANSCODER(cpu_transcoder), mask->bits);

sys/dev/pci/drm/i915/display/intel_display.c

1964

set_bit(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe), mask->bits);

sys/dev/pci/drm/i915/display/intel_display.c

1970

set_bit(intel_encoder->power_domain, mask->bits);

sys/dev/pci/drm/i915/display/intel_display.c

1974

set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits);

sys/dev/pci/drm/i915/display/intel_display.c

1977

set_bit(POWER_DOMAIN_DISPLAY_CORE, mask->bits);

sys/dev/pci/drm/i915/display/intel_display.c

1980

set_bit(intel_dsc_power_domain(crtc, cpu_transcoder), mask->bits);

sys/dev/pci/drm/i915/display/intel_display_power.c

764

set_bit(domain, power_domains->async_put_domains[1].bits);

sys/dev/pci/drm/i915/display/intel_display_power.c

768

set_bit(domain, power_domains->async_put_domains[0].bits);

sys/dev/pci/drm/i915/display/intel_display_power.c

895

set_bit(domain, power_domain_set->mask.bits);

sys/dev/pci/drm/i915/display/intel_display_power.c

914

set_bit(domain, power_domain_set->mask.bits);

sys/dev/pci/drm/i915/display/intel_display_power_map.c

1788

set_bit(inst->domain_list->list[j], power_well->domains.bits);

sys/dev/pci/drm/i915/display/intel_pmdemand.c

148

bool set_bit)

sys/dev/pci/drm/i915/display/intel_pmdemand.c

163

if (set_bit)

sys/dev/pci/drm/i915/display/intel_pmdemand.c

205

bool set_bit,

sys/dev/pci/drm/i915/display/intel_pmdemand.c

215

if (set_bit)

sys/dev/pci/drm/i915/display/intel_pmdemand.c

224

set_bit);

sys/dev/pci/drm/i915/gem/i915_gem_context.c

1190

set_bit(CONTEXT_PERMA_PIN, &ce->flags);

sys/dev/pci/drm/i915/gem/i915_gem_context.h

101

set_bit(CONTEXT_USER_ENGINES, &ctx->flags);

sys/dev/pci/drm/i915/gem/i915_gem_context.h

29

set_bit(CONTEXT_CLOSED, &ctx->flags);

sys/dev/pci/drm/i915/gem/i915_gem_context.h

39

set_bit(UCONTEXT_NO_ERROR_CAPTURE, &ctx->user_flags);

sys/dev/pci/drm/i915/gem/i915_gem_context.h

54

set_bit(UCONTEXT_BANNABLE, &ctx->user_flags);

sys/dev/pci/drm/i915/gem/i915_gem_context.h

69

set_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags);

sys/dev/pci/drm/i915/gem/i915_gem_context.h

84

set_bit(UCONTEXT_PERSISTENCE, &ctx->user_flags);

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

3120

set_bit(I915_FENCE_FLAG_SKIP_PARALLEL,

sys/dev/pci/drm/i915/gem/i915_gem_execbuffer.c

3124

set_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL,

sys/dev/pci/drm/i915/gem/i915_gem_object.h

258

set_bit(I915_TILING_QUIRK_BIT, &obj->flags);

sys/dev/pci/drm/i915/gt/intel_breadcrumbs.c

141

set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);

sys/dev/pci/drm/i915/gt/intel_breadcrumbs.c

401

set_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/intel_context.c

366

set_bit(CONTEXT_VALID_BIT, &ce->flags);

sys/dev/pci/drm/i915/gt/intel_context.c

80

set_bit(CONTEXT_ALLOC_BIT, &ce->flags);

sys/dev/pci/drm/i915/gt/intel_context.h

287

set_bit(CONTEXT_CLOSED_BIT, &ce->flags);

sys/dev/pci/drm/i915/gt/intel_context.h

310

set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);

sys/dev/pci/drm/i915/gt/intel_context.h

369

set_bit(CONTEXT_NOPREEMPT, &ce->flags);

sys/dev/pci/drm/i915/gt/intel_engine_pm.c

209

set_bit(CONTEXT_IS_PARKING, &ce->flags);

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

2168

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

2557

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3309

set_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

398

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/intel_reset.c

1010

set_bit(I915_WEDGED, &gt->reset.flags);

sys/dev/pci/drm/i915/gt/intel_reset.c

1650

set_bit(I915_WEDGED_ON_INIT, &gt->reset.flags);

sys/dev/pci/drm/i915/gt/intel_reset.c

1660

set_bit(I915_WEDGED_ON_FINI, &gt->reset.flags);

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

1152

set_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/intel_rps.h

108

set_bit(INTEL_RPS_INTERRUPTS, &rps->flags);

sys/dev/pci/drm/i915/gt/intel_rps.h

123

set_bit(INTEL_RPS_TIMER, &rps->flags);

sys/dev/pci/drm/i915/gt/intel_rps.h

78

set_bit(INTEL_RPS_ENABLED, &rps->flags);

sys/dev/pci/drm/i915/gt/intel_rps.h

93

set_bit(INTEL_RPS_ACTIVE, &rps->flags);

sys/dev/pci/drm/i915/gt/selftest_execlists.c

1463

set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

1851

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

2208

set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3007

set_bit(CONTEXT_LRCA_DIRTY, &ce->flags);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3770

set_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

3874

set_bit(CONTEXT_GUC_INIT, &ce->flags);

sys/dev/pci/drm/i915/gt/uc/selftest_guc_multi_lrc.c

98

set_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL,

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1230

set_bit(cmd_interrupt_events[s->engine->id].pipe_control_notify,

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1237

set_bit(cmd_interrupt_events[s->engine->id].mi_user_interrupt,

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1449

set_bit(info->event, vgpu->irq.flip_done_event[info->pipe]);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1753

set_bit(cmd_interrupt_events[s->engine->id].mi_flush_dw,

sys/dev/pci/drm/i915/gvt/gtt.c

1580

set_bit(index, spt->post_shadow_bitmap);

sys/dev/pci/drm/i915/gvt/gvt.h

385

set_bit(service, (void *)&gvt->service_request);

sys/dev/pci/drm/i915/gvt/handlers.c

1040

set_bit(event, vgpu->irq.flip_done_event[pipe]);

sys/dev/pci/drm/i915/gvt/handlers.c

1060

set_bit(event, vgpu->irq.flip_done_event[pipe]);

sys/dev/pci/drm/i915/gvt/handlers.c

1086

set_bit(event, vgpu->irq.flip_done_event[pipe]);

sys/dev/pci/drm/i915/gvt/handlers.c

2121

set_bit(id, (void *)vgpu->submission.tlb_handle_pending);

sys/dev/pci/drm/i915/gvt/interrupt.c

409

set_bit(up_bit, up_info->downstream_irq_bitmap);

sys/dev/pci/drm/i915/gvt/interrupt.c

476

set_bit(bit, (void *)&vgpu_vreg(vgpu,

sys/dev/pci/drm/i915/gvt/interrupt.c

566

set_bit(g, s->irq_info_bitmap); \

sys/dev/pci/drm/i915/gvt/kvmgt.c

679

set_bit(INTEL_VGPU_STATUS_ATTACHED, vgpu->status);

sys/dev/pci/drm/i915/gvt/vgpu.c

170

set_bit(INTEL_VGPU_STATUS_ACTIVE, vgpu->status);

sys/dev/pci/drm/i915/i915_request.c

728

set_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags);

sys/dev/pci/drm/i915/i915_request.c

818

set_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags);

sys/dev/pci/drm/i915/i915_request.h

661

set_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);

sys/dev/pci/drm/i915/i915_vma.c

745

set_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));

sys/dev/pci/drm/i915/i915_vma.h

425

set_bit(I915_VMA_SCANOUT_BIT, __i915_vma_flags(vma));

sys/dev/pci/drm/i915/i915_vma.h

95

set_bit(I915_VMA_GGTT_WRITE_BIT, __i915_vma_flags(vma));

sys/dev/pci/drm/i915/selftests/intel_uncore.c

309

set_bit(offset, valid);

sys/dev/pci/drm/include/linux/interrupt.h

120

set_bit(TASKLET_STATE_SCHED, &ts->state);

sys/dev/pci/drm/include/linux/interrupt.h

127

set_bit(TASKLET_STATE_SCHED, &ts->state);

sys/dev/pci/drm/scheduler/sched_fence.c

190

set_bit(DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT, &f->flags);

sys/dev/pci/if_qwx_pci.c

1561

set_bit(ATH11K_FLAG_EXT_IRQ_ENABLED, sc->sc_flags);

sys/dev/pci/if_qwx_pci.c

1740

set_bit(ATH11K_FLAG_CE_IRQ_ENABLED, sc->sc_flags);

sys/dev/pci/if_qwx_pci.c

1775

set_bit(ATH11K_FLAG_DEVICE_INIT_DONE, sc->sc_flags);

sys/dev/pci/if_qwx_pci.c

4112

set_bit(ATH11K_FLAG_CRASH_FLUSH, sc->sc_flags);

sys/dev/pci/if_qwx_pci.c

836

set_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, sc->sc_flags);

sys/dev/pci/if_qwz_pci.c

1401

set_bit(ATH12K_FLAG_EXT_IRQ_ENABLED, sc->sc_flags);

sys/dev/pci/if_qwz_pci.c

1581

set_bit(ATH12K_FLAG_CE_IRQ_ENABLED, sc->sc_flags);

sys/dev/pci/if_qwz_pci.c

1616

set_bit(ATH12K_FLAG_DEVICE_INIT_DONE, sc->sc_flags);

sys/dev/pci/if_qwz_pci.c

3976

set_bit(ATH12K_FLAG_CRASH_FLUSH, sc->sc_flags);

sys/dev/pci/if_qwz_pci.c

761

set_bit(ATH12K_FLAG_MULTI_MSI_VECTORS, sc->sc_flags);

sys/dev/pv/hyperv.c

1247

set_bit(ch->ch_id, sc->sc_wevents);

sys/dev/pv/hyperv.c

1250

set_bit(ch->ch_mindex, &mtg->mt_pending);

sys/dev/pv/xen.c

638

set_bit(xi->xi_port, &sc->sc_ipg->evtchn_mask[0]);

sys/dev/pv/xen.c

834

set_bit(xi->xi_port, &sc->sc_ipg->evtchn_mask[0]);

sys/dev/pv/xen.c

877

set_bit(xi->xi_port, &sc->sc_ipg->evtchn_mask[0]);

sys/dev/usb/dwc2/dwc2_hcd.c

4421

set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);

sys/dev/usb/dwc2/dwc2_hcd.c

4605

set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);

sys/dev/usb/dwc2/dwc2_hcd.c

4616

set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);

sys/dev/usb/dwc2/dwc2_hcd.c

4639

set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);

usr.sbin/nsd/dname.c

125

set_bit(visited, buffer_position(packet));

usr.sbin/nsd/util.h

124

void set_bit(uint8_t bits[], size_t index);

usr.sbin/nsd/zparser.y

460

set_bit(nxtbits, type);

usr.sbin/nsd/zparser.y

469

set_bit(nxtbits, type);