Symbol: seq_printf
sys/dev/pci/drm/amd/amdgpu/amdgpu.h
1530
#define DREG32_SYS(sqf, adev, reg) seq_printf((sqf), #reg " : 0x%08X\n", amdgpu_device_rreg((adev), (reg), false))
sys/dev/pci/drm/amd/amdgpu/amdgpu_aca.c
908
seq_printf(m, "aca entry[%d].type: %s\n", idx, type == ACA_SMU_TYPE_UE ? "UE" : "CE");
sys/dev/pci/drm/amd/amdgpu/amdgpu_aca.c
909
seq_printf(m, "aca entry[%d].info: socketid:%d aid:%d hwid:0x%03x mcatype:0x%04x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_aca.c
913
seq_printf(m, "aca entry[%d].regs[%d]: 0x%016llx\n", idx, aca_regs[i].reg_idx, bank->regs[aca_regs[i].reg_idx]);
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
3235
seq_printf(m, "System mem used %lldM out of %lluM\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
3238
seq_printf(m, "TTM mem used %lldM out of %lluM\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
1689
seq_printf(m, "ib ring tests failed (%d).\n", r);
sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
1789
seq_printf(m, "pid:%d\tProcess:%s ----------\n", ti->task.pid, ti->process_name);
sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
2158
seq_printf(m, "pd_address: 0x%llx\n", amdgpu_gmc_pd_addr(fpriv->vm.root.bo));
sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
2159
seq_printf(m, "max_pfn: 0x%llx\n", adev->vm_manager.max_pfn);
sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
2160
seq_printf(m, "num_level: 0x%x\n", adev->vm_manager.num_level);
sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
2161
seq_printf(m, "block_size: 0x%x\n", adev->vm_manager.block_size);
sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
2162
seq_printf(m, "fragment_size: 0x%x\n", adev->vm_manager.fragment_size);
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1000
seq_printf(m, "--- ring %d (%s) ---\n", i, ring->name);
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1001
seq_printf(m, "Last signaled fence 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1003
seq_printf(m, "Last emitted 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1008
seq_printf(m, "Last signaled trailing fence 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1010
seq_printf(m, "Last emitted 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1018
seq_printf(m, "Last preempted 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1021
seq_printf(m, "Last reset 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c
1024
seq_printf(m, "Last both 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_gem.c
1421
seq_printf(m, "pid %8d command %s:\n", pid_nr(pid),
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1697
seq_printf(m, "VCE feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1705
seq_printf(m, "UVD feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1713
seq_printf(m, "MC feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1721
seq_printf(m, "ME feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1729
seq_printf(m, "PFP feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1737
seq_printf(m, "CE feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1745
seq_printf(m, "RLC feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1753
seq_printf(m, "RLC SRLC feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1761
seq_printf(m, "RLC SRLG feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1769
seq_printf(m, "RLC SRLS feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1777
seq_printf(m, "RLCP feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1785
seq_printf(m, "RLCV feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1794
seq_printf(m, "MEC feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1803
seq_printf(m, "MEC2 feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1813
seq_printf(m, "IMU feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1821
seq_printf(m, "SOS feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1830
seq_printf(m, "ASD feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1840
seq_printf(m, "TA %s feature version: 0x%08x, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1853
seq_printf(m, "SMC feature version: %u, program: %d, firmware version: 0x%08x (%d.%d.%d)\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1863
seq_printf(m, "SDMA%d feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1872
seq_printf(m, "VCN feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1880
seq_printf(m, "DMCU feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1888
seq_printf(m, "DMCUB feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1896
seq_printf(m, "TOC feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1905
seq_printf(m, "CAP feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1914
seq_printf(m, "MES_KIQ feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1922
seq_printf(m, "MES feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1930
seq_printf(m, "VPE feature version: %u, firmware version: 0x%08x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c
1933
seq_printf(m, "VBIOS version: %s\n", ctx->vbios_pn);
sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c
541
seq_printf(m, "mca entry[%d].type: %s\n", idx, entry->type == AMDGPU_MCA_ERROR_TYPE_UE ? "UE" : "CE");
sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c
542
seq_printf(m, "mca entry[%d].ip: %d\n", idx, entry->ip);
sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c
543
seq_printf(m, "mca entry[%d].info: socketid:%d aid:%d hwid:0x%03x mcatype:0x%04x\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c
547
seq_printf(m, "mca entry[%d].regs[%d]: 0x%016llx\n", idx, reg_idx_array[i], entry->regs[reg_idx_array[i]]);
sys/dev/pci/drm/amd/amdgpu/amdgpu_mca.c
565
seq_printf(m, "amdgpu smu %s valid mca count: %d\n",
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c
1608
seq_printf((m), " " #flag); \
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c
1677
seq_printf(m, "\t\t0x%08x: %12lld byte %s",
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c
1682
seq_printf(m, " pin count %d", pin_count);
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c
1688
seq_printf(m, " imported from ino:%lu", file_inode(dma_buf->file)->i_ino);
sys/dev/pci/drm/amd/amdgpu/amdgpu_object.c
1690
seq_printf(m, " exported as ino:%lu", file_inode(dma_buf->file)->i_ino);
sys/dev/pci/drm/amd/amdgpu/amdgpu_userq.c
453
seq_printf(m, "queue_type: %d\n", queue->queue_type);
sys/dev/pci/drm/amd/amdgpu/amdgpu_userq.c
454
seq_printf(m, "mqd_gpu_address: 0x%llx\n", amdgpu_bo_gpu_offset(queue->mqd.obj));
sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c
3199
seq_printf(m, "\tTotal idle size: %12lld\tobjs:\t%d\n", total_idle,
sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c
3201
seq_printf(m, "\tTotal evicted size: %12lld\tobjs:\t%d\n", total_evicted,
sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c
3203
seq_printf(m, "\tTotal relocated size: %12lld\tobjs:\t%d\n", total_relocated,
sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c
3205
seq_printf(m, "\tTotal moved size: %12lld\tobjs:\t%d\n", total_moved,
sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c
3207
seq_printf(m, "\tTotal invalidated size: %12lld\tobjs:\t%d\n", total_invalidated,
sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c
3209
seq_printf(m, "\tTotal done size: %12lld\tobjs:\t%d\n", total_done,
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
3647
seq_printf(m, "%s %08x: %08x",
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
3652
seq_printf(m, " %08x", dump[i][1]);
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
3680
seq_printf(
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
3707
seq_printf(m,
sys/dev/pci/drm/amd/amdkfd/kfd_device_queue_manager.c
3729
seq_printf(m, " SDMA Engine %d, RLC %d\n",
sys/dev/pci/drm/amd/amdkfd/kfd_process.c
2323
seq_printf(m, "Process %d PASID %d:\n",
sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c
1123
seq_printf(m, " SDMA queue on device %x\n",
sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c
1128
seq_printf(m, " Compute queue on device %x\n",
sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c
1134
seq_printf(m,
sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c
1147
seq_printf(m, " DIQ on device %x\n",
sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c
1151
seq_printf(m,
sys/dev/pci/drm/amd/amdkfd/kfd_process_queue_manager.c
1158
seq_printf(m,
sys/dev/pci/drm/amd/amdkfd/kfd_topology.c
2374
seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id);
sys/dev/pci/drm/amd/amdkfd/kfd_topology.c
2399
seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1034
seq_printf(m, "Sink support: %s\n", str_yes_no(sink_support_replay));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1035
seq_printf(m, "Driver support: %s\n", str_yes_no(driver_support_replay));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1036
seq_printf(m, "Config support: %s\n", str_yes_no(link->replay_settings.config.replay_supported));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1070
seq_printf(m, "Sink support: %s", str_yes_no(link->dpcd_caps.psr_info.psr_version != 0));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1072
seq_printf(m, " [0x%02x]", link->dpcd_caps.psr_info.psr_version);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1075
seq_printf(m, "Driver support: %s", str_yes_no(link->psr_settings.psr_feature_enabled));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1077
seq_printf(m, " [0x%02x]", link->psr_settings.psr_version);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1124
seq_printf(m, "Current: %u\n", bpc);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1249
seq_printf(m, "%s:%d HDCP version: ", connector->name, connector->base.id);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1256
seq_printf(m, "%s ", "HDCP1.4");
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1258
seq_printf(m, "%s ", "HDCP2.2");
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1261
seq_printf(m, "%s ", "None");
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1278
seq_printf(m, "Internal: %u\n", link->is_internal_display);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1309
seq_printf(m, "%d\n", segments);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1412
seq_printf(m, "FEC_Sink_Support: %s\n", str_yes_no(is_fec_supported));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1413
seq_printf(m, "DSC_Sink_Support: %s\n", str_yes_no(is_dsc_supported));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2679
seq_printf(m, "IPS config: %d\n", dc->config.disable_ips);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2680
seq_printf(m, "Idle optimization: %d\n", dc->idle_optimizations_allowed);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2683
seq_printf(m, "Idle workqueue - enabled: %d\n", adev->dm.idle_workqueue->enable);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2684
seq_printf(m, "Idle workqueue - running: %d\n", adev->dm.idle_workqueue->running);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2695
seq_printf(m, "entry counts: rcg=%u ips1=%u ips2=%u\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2702
seq_printf(m, "exit counts: rcg=%u ips1=%u ips2=%u",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2725
seq_printf(m, "0x%x\n", backlight);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2744
seq_printf(m, "0x%x\n", backlight);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2792
seq_printf(m, "%s\n", role);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2824
seq_printf(m, "%s:%s\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2848
seq_printf(m, "%s\n", (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA) ? "yes" :
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2866
seq_printf(m, "%s:%d\n", connector->name, connector->base.id);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
2867
seq_printf(m, "HDMI-CEC status: %d\n", aconnector->notifier ? 1 : 0);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
3411
seq_printf(m, "[%d] %d kHz\n", entry/2, link_rate_in_khz);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
3865
seq_printf(m, "\nMST topology for connector %d\n", aconnector->connector_id);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
4031
seq_printf(m, "mall supported: %s, enabled: %s\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
4033
seq_printf(m, "sub-viewport supported: %s, enabled: %s\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
583
seq_printf(m, "phy repeater count: %u (raw: 0x%x)\n",
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
600
seq_printf(m, "read error (raw: 0x%x)", caps.mode);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
934
seq_printf(m, "...\n");
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
949
seq_printf(m,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
957
seq_printf(m,
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4804
seq_printf(m, "\t%u MHz (CPU%d)\n",
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4823
seq_printf(m, "GFX Clocks and Power:\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4828
seq_printf(m, "\t%u MHz (MCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4830
seq_printf(m, "\t%u MHz (SCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4832
seq_printf(m, "\t%u MHz (PSTATE_SCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4834
seq_printf(m, "\t%u MHz (PSTATE_MCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4836
seq_printf(m, "\t%u mV (VDDGFX)\n", value);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4838
seq_printf(m, "\t%u mV (VDDNB)\n", value);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4842
seq_printf(m, "\t%u.%02u W (average SoC including CPU)\n", query >> 8, query & 0xff);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4844
seq_printf(m, "\t%u.%02u W (average SoC)\n", query >> 8, query & 0xff);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4849
seq_printf(m, "\t%u.%02u W (current SoC including CPU)\n", query >> 8, query & 0xff);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4851
seq_printf(m, "\t%u.%02u W (current SoC)\n", query >> 8, query & 0xff);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4854
seq_printf(m, "\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4858
seq_printf(m, "GPU Temperature: %u C\n", value/1000);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4862
seq_printf(m, "GPU Load: %u %%\n", value);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4865
seq_printf(m, "MEM Load: %u %%\n", value);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4868
seq_printf(m, "VCN Load: %u %%\n", value);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4870
seq_printf(m, "\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4874
seq_printf(m, "SMC Feature Mask: 0x%016llx\n", value64);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4881
seq_printf(m, "VCN: Powered down\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4883
seq_printf(m, "VCN: Powered up\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4885
seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4887
seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4890
seq_printf(m, "\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4895
seq_printf(m, "UVD: Powered down\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4897
seq_printf(m, "UVD: Powered up\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4899
seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4901
seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4904
seq_printf(m, "\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4909
seq_printf(m, "VCE: Powered down\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4911
seq_printf(m, "VCE: Powered up\n");
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4913
seq_printf(m, "\t%u MHz (ECCLK)\n", value/100);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4964
seq_printf(m, "\t%s: %s\n", clocks[i].name,
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4986
seq_printf(m, "Clock Gating Flags Mask: 0x%llx\n", flags);
sys/dev/pci/drm/amd/pm/amdgpu_pm.c
4988
seq_printf(m, "\n");
sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c
2867
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c
2874
seq_printf(m, "uvd %sabled\n", pi->uvd_power_gated ? "dis" : "en");
sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c
2875
seq_printf(m, "vce %sabled\n", pi->vce_power_gated ? "dis" : "en");
sys/dev/pci/drm/amd/pm/legacy-dpm/kv_dpm.c
2876
seq_printf(m, "power level %d sclk: %u vddc: %u\n",
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
7589
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
7592
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/amd/pm/legacy-dpm/si_dpm.c
7593
seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
sys/dev/pci/drm/display/drm_dp_helper.c
1677
seq_printf(m, "\tDP branch device present: %s\n",
sys/dev/pci/drm/display/drm_dp_helper.c
1711
seq_printf(m, "\t\tID: %s\n", id);
sys/dev/pci/drm/display/drm_dp_helper.c
1715
seq_printf(m, "\t\tHW: %d.%d\n",
sys/dev/pci/drm/display/drm_dp_helper.c
1720
seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]);
sys/dev/pci/drm/display/drm_dp_helper.c
1725
seq_printf(m, "\t\tMax dot clock: %d kHz\n", clk);
sys/dev/pci/drm/display/drm_dp_helper.c
1729
seq_printf(m, "\t\tMax TMDS clock: %d kHz\n", clk);
sys/dev/pci/drm/display/drm_dp_helper.c
1733
seq_printf(m, "\t\tMin TMDS clock: %d kHz\n", clk);
sys/dev/pci/drm/display/drm_dp_helper.c
1738
seq_printf(m, "\t\tMax bpc: %d\n", bpc);
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4864
seq_printf(m, "%smstb - [%p]: num_ports: %d\n", prefix, mstb, mstb->num_ports);
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4866
seq_printf(m, "%sport %d - [%p] (%s - %s): ddps: %d, ldps: %d, sdp: %d/%d, fec: %s, conn: %p\n",
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4943
seq_printf(m, "\n*** Atomic state info ***\n");
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4944
seq_printf(m, "payload_mask: %x, max_payloads: %d, start_slot: %u, pbn_div: %d\n",
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4948
seq_printf(m, "\n| idx | port | vcpi | slots | pbn | dsc | status | sink name |\n");
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4957
seq_printf(m, " %5d %6d %6d %02d - %02d %5d %5s %8s %19s\n",
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4970
seq_printf(m, "\n*** DPCD Info ***\n");
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4977
seq_printf(m, "dpcd read failed\n");
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4980
seq_printf(m, "dpcd: %*ph\n", DP_RECEIVER_CAP_SIZE, buf);
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4984
seq_printf(m, "faux/mst read failed\n");
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4987
seq_printf(m, "faux/mst: %*ph\n", 2, buf);
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4991
seq_printf(m, "mst ctrl read failed\n");
sys/dev/pci/drm/display/drm_dp_mst_topology.c
4994
seq_printf(m, "mst ctrl: %*ph\n", 1, buf);
sys/dev/pci/drm/display/drm_dp_mst_topology.c
5000
seq_printf(m, "branch oui read failed\n");
sys/dev/pci/drm/display/drm_dp_mst_topology.c
5003
seq_printf(m, "branch oui: %*phN devid: ", 3, buf);
sys/dev/pci/drm/display/drm_dp_mst_topology.c
5007
seq_printf(m, " revision: hw: %x.%x sw: %x.%x\n",
sys/dev/pci/drm/display/drm_dp_mst_topology.c
5010
seq_printf(m, "payload table: %*ph\n", DP_PAYLOAD_TABLE_SIZE, buf);
sys/dev/pci/drm/dma-resv.c
782
seq_printf(seq, "\t%s fence:",
sys/dev/pci/drm/drm_debugfs.c
107
seq_printf(m, "%20s %5d %3d %c %c %5d %10u %*s %20llu\n",
sys/dev/pci/drm/drm_debugfs.c
130
seq_printf(m, "%6d %8zd %7d %8d\n",
sys/dev/pci/drm/drm_debugfs.c
142
seq_printf(m, " name size handles refcount\n");
sys/dev/pci/drm/drm_debugfs.c
217
seq_printf(m, "DRM GPU VA space (%s) [0x%016llx;0x%016llx]\n",
sys/dev/pci/drm/drm_debugfs.c
219
seq_printf(m, "Kernel reserved node [0x%016llx;0x%016llx]\n",
sys/dev/pci/drm/drm_debugfs.c
228
seq_printf(m, " | 0x%016llx | 0x%016llx | 0x%016llx | 0x%016llx | 0x%016llx\n",
sys/dev/pci/drm/drm_debugfs.c
327
seq_printf(m, "pid: %d\n", task ? task->pid : 0);
sys/dev/pci/drm/drm_debugfs.c
328
seq_printf(m, "comm: %s\n", task ? task->comm : "Unset");
sys/dev/pci/drm/drm_debugfs.c
507
seq_printf(m, "%s\n", drm_get_connector_force_name(connector->force));
sys/dev/pci/drm/drm_debugfs.c
593
seq_printf(m, "Min: %u\n", connector->display_info.monitor_range.min_vfreq);
sys/dev/pci/drm/drm_debugfs.c
594
seq_printf(m, "Max: %u\n", connector->display_info.monitor_range.max_vfreq);
sys/dev/pci/drm/drm_debugfs.c
611
seq_printf(m, "Maximum: %u\n", connector->display_info.bpc);
sys/dev/pci/drm/drm_debugfs.c
62
seq_printf(m, "%s", dev->driver->name);
sys/dev/pci/drm/drm_debugfs.c
64
seq_printf(m, " dev=%s", dev_name(dev->dev));
sys/dev/pci/drm/drm_debugfs.c
66
seq_printf(m, " master=%s", master->unique);
sys/dev/pci/drm/drm_debugfs.c
68
seq_printf(m, " unique=%s", dev->unique);
sys/dev/pci/drm/drm_debugfs.c
69
seq_printf(m, "\n");
sys/dev/pci/drm/drm_debugfs.c
82
seq_printf(m,
sys/dev/pci/drm/drm_debugfs_crc.c
102
seq_printf(m, "%s\n", sources[i]);
sys/dev/pci/drm/drm_debugfs_crc.c
104
seq_printf(m, "%s*\n", sources[i]);
sys/dev/pci/drm/drm_debugfs_crc.c
110
seq_printf(m, "%s*\n", crtc->crc.source);
sys/dev/pci/drm/drm_print.c
183
seq_printf(p->arg, "%pV", vaf);
sys/dev/pci/drm/i915/display/hsw_ips.c
350
seq_printf(m, "Enabled by kernel parameter: %s\n",
sys/dev/pci/drm/i915/display/intel_alpm.c
514
seq_printf(m, "LOBF status: %s\n", str_enabled_disabled(alpm_ctl & ALPM_CTL_LOBF_ENABLE));
sys/dev/pci/drm/i915/display/intel_alpm.c
515
seq_printf(m, "Aux-wake alpm status: %s\n",
sys/dev/pci/drm/i915/display/intel_alpm.c
517
seq_printf(m, "Aux-less alpm status: %s\n",
sys/dev/pci/drm/i915/display/intel_cdclk.c
3622
seq_printf(m, "Current CD clock frequency: %d kHz\n", display->cdclk.hw.cdclk);
sys/dev/pci/drm/i915/display/intel_cdclk.c
3623
seq_printf(m, "Max CD clock frequency: %d kHz\n", display->cdclk.max_cdclk_freq);
sys/dev/pci/drm/i915/display/intel_cdclk.c
3624
seq_printf(m, "Max pixel clock frequency: %d kHz\n", display->cdclk.max_dotclk_freq);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
1023
seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
1089
seq_printf(m, "DSC_Output_Format: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
111
seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
1156
seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
1226
seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
1239
seq_printf(m, "%c\n", pipe_name(crtc->pipe));
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
124
seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
1249
seq_printf(m, "%d\n", connector->force_joined_pipes);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
141
seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
173
seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
184
seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
195
seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
220
seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
221
seq_printf(m, "\taudio support: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
233
seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
241
seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
250
seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
257
seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
260
seq_printf(m, "\tsubpixel order: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
262
seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
281
seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
285
seq_printf(m, "\tmodes:\n");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
352
seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
357
seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
362
seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
380
seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
396
seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
413
seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
423
seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
443
seq_printf(m, "%sUpdates: %llu\n", hdr, count);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
472
seq_printf(m, "%s%s\n", hdr, columns);
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
475
seq_printf(m, "%sMin update: %lluns\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
477
seq_printf(m, "%sMax update: %lluns\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
479
seq_printf(m, "%sAverage update: %lluns\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
481
seq_printf(m, "%sOverruns > %uus: %u\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
544
seq_printf(m, "[CRTC:%d:%s]:\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
547
seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
552
seq_printf(m, "\thw: enable=%s, active=%s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
554
seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
556
seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
559
seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
562
seq_printf(m, "\tport_clock=%d, lane_count=%d\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
568
seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
580
seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
599
seq_printf(m, "CRTC info\n");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
600
seq_printf(m, "---------\n");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
604
seq_printf(m, "\n");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
605
seq_printf(m, "Connector info\n");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
606
seq_printf(m, "--------------\n");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
657
seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
665
seq_printf(m, "Pipe %c\n", pipe_name(pipe));
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
669
seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
675
seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start,
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
713
seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
739
seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
76
seq_printf(m, "FB tracking busy bits: 0x%08x\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
79
seq_printf(m, "FB tracking flip bits: 0x%08x\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
878
seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
926
seq_printf(m, "DSC_Enabled: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
928
seq_printf(m, "DSC_Sink_Support: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
930
seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
937
seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
939
seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
941
seq_printf(m, "Force_DSC_Enable: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs.c
944
seq_printf(m, "FEC_Sink_Support: %s\n",
sys/dev/pci/drm/i915/display/intel_display_debugfs_params.c
20
seq_printf(m, "%d\n", *value);
sys/dev/pci/drm/i915/display/intel_display_debugfs_params.c
73
seq_printf(m, "%u\n", *value);
sys/dev/pci/drm/i915/display/intel_display_power.c
2341
seq_printf(m, "Runtime power status: %s\n",
sys/dev/pci/drm/i915/display/intel_display_power.c
2344
seq_printf(m, "%-25s %s\n", "Power well/domain", "Use count");
sys/dev/pci/drm/i915/display/intel_display_power.c
2350
seq_printf(m, "%-25s %d\n", intel_power_well_name(power_well),
sys/dev/pci/drm/i915/display/intel_display_power.c
2354
seq_printf(m, " %-23s %d\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1599
seq_printf(m, "DMC initialized: %s\n", str_yes_no(dmc));
sys/dev/pci/drm/i915/display/intel_dmc.c
1600
seq_printf(m, "fw loaded: %s\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1602
seq_printf(m, "path: %s\n", dmc ? dmc->fw_path : "N/A");
sys/dev/pci/drm/i915/display/intel_dmc.c
1603
seq_printf(m, "Pipe A fw needed: %s\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1605
seq_printf(m, "Pipe A fw loaded: %s\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1607
seq_printf(m, "Pipe B fw needed: %s\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1610
seq_printf(m, "Pipe B fw loaded: %s\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1616
seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version),
sys/dev/pci/drm/i915/display/intel_dmc.c
1631
seq_printf(m, "DC3CO count: %d\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1640
seq_printf(m, "DC3 -> DC5 count: %d\n", intel_de_read(display, dc5_reg));
sys/dev/pci/drm/i915/display/intel_dmc.c
1643
seq_printf(m, "DC5 -> DC6 allowed count: %d\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1646
seq_printf(m, "DC5 -> DC6 count: %d\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1649
seq_printf(m, "program base: 0x%08x\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1653
seq_printf(m, "ssp base: 0x%08x\n",
sys/dev/pci/drm/i915/display/intel_dmc.c
1655
seq_printf(m, "htp: 0x%08x\n", intel_de_read(display, DMC_HTP_SKL));
sys/dev/pci/drm/i915/display/intel_dp_link_training.c
1748
seq_printf(m, "%sauto%s",
sys/dev/pci/drm/i915/display/intel_dp_link_training.c
1753
seq_printf(m, " %s%d%s%s",
sys/dev/pci/drm/i915/display/intel_dp_link_training.c
1848
seq_printf(m, "%sauto%s",
sys/dev/pci/drm/i915/display/intel_dp_link_training.c
1853
seq_printf(m, " %s%d%s%s",
sys/dev/pci/drm/i915/display/intel_dp_link_training.c
2064
seq_printf(m, "%s\n", str_yes_no(intel_dp->link.retrain_disabled));
sys/dev/pci/drm/i915/display/intel_dp_test.c
683
seq_printf(m, "%lx",
sys/dev/pci/drm/i915/display/intel_dp_test.c
687
seq_printf(m, "hdisplay: %d\n",
sys/dev/pci/drm/i915/display/intel_dp_test.c
689
seq_printf(m, "vdisplay: %d\n",
sys/dev/pci/drm/i915/display/intel_dp_test.c
691
seq_printf(m, "bpc: %u\n",
sys/dev/pci/drm/i915/display/intel_dp_test.c
695
seq_printf(m, "pattern: %d\n",
sys/dev/pci/drm/i915/display/intel_dp_test.c
697
seq_printf(m, "Number of lanes: %d\n",
sys/dev/pci/drm/i915/display/intel_dp_test.c
699
seq_printf(m, "Link Rate: %d\n",
sys/dev/pci/drm/i915/display/intel_dp_test.c
701
seq_printf(m, "level: %02x\n",
sys/dev/pci/drm/i915/display/intel_dp_test.c
735
seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
sys/dev/pci/drm/i915/display/intel_drrs.c
326
seq_printf(m, "DRRS capable: %s\n",
sys/dev/pci/drm/i915/display/intel_drrs.c
330
seq_printf(m, "DRRS enabled: %s\n",
sys/dev/pci/drm/i915/display/intel_drrs.c
333
seq_printf(m, "DRRS active: %s\n",
sys/dev/pci/drm/i915/display/intel_drrs.c
336
seq_printf(m, "DRRS refresh rate: %s\n",
sys/dev/pci/drm/i915/display/intel_drrs.c
340
seq_printf(m, "DRRS busy frontbuffer bits: 0x%x\n",
sys/dev/pci/drm/i915/display/intel_drrs.c
406
seq_printf(m, "DRRS type: %s\n",
sys/dev/pci/drm/i915/display/intel_fbc.c
2160
seq_printf(m, "Compressing: %s\n",
sys/dev/pci/drm/i915/display/intel_fbc.c
2163
seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
sys/dev/pci/drm/i915/display/intel_fbc.c
2173
seq_printf(m, "%c [PLANE:%d:%s]: %s\n",
sys/dev/pci/drm/i915/display/intel_hdcp.c
2810
seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
sys/dev/pci/drm/i915/display/intel_hdcp.c
2866
seq_printf(m, "%s\n",
sys/dev/pci/drm/i915/display/intel_hotplug.c
1189
seq_printf(m, "Threshold: %d\n", hotplug->hpd_storm_threshold);
sys/dev/pci/drm/i915/display/intel_hotplug.c
1190
seq_printf(m, "Detected: %s\n",
sys/dev/pci/drm/i915/display/intel_hotplug.c
1266
seq_printf(m, "Enabled: %s\n",
sys/dev/pci/drm/i915/display/intel_link_bw.c
333
seq_printf(m, FXP_Q4_FMT "\n", FXP_Q4_ARGS(connector->link.force_bpp_x16));
sys/dev/pci/drm/i915/display/intel_pps.c
1815
seq_printf(m, "Panel power up delay: %d\n",
sys/dev/pci/drm/i915/display/intel_pps.c
1817
seq_printf(m, "Panel power down delay: %d\n",
sys/dev/pci/drm/i915/display/intel_pps.c
1819
seq_printf(m, "Panel power cycle delay: %d\n",
sys/dev/pci/drm/i915/display/intel_pps.c
1821
seq_printf(m, "Backlight on delay: %d\n",
sys/dev/pci/drm/i915/display/intel_pps.c
1823
seq_printf(m, "Backlight off delay: %d\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4018
seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status, val);
sys/dev/pci/drm/i915/display/intel_psr.c
4026
seq_printf(m, "Sink support: PSR = %s",
sys/dev/pci/drm/i915/display/intel_psr.c
4030
seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
sys/dev/pci/drm/i915/display/intel_psr.c
4032
seq_printf(m, " (Early Transport)");
sys/dev/pci/drm/i915/display/intel_psr.c
4033
seq_printf(m, ", Panel Replay = %s", str_yes_no(psr->sink_panel_replay_support));
sys/dev/pci/drm/i915/display/intel_psr.c
4034
seq_printf(m, ", Panel Replay Selective Update = %s",
sys/dev/pci/drm/i915/display/intel_psr.c
4038
seq_printf(m, " (Early Transport)");
sys/dev/pci/drm/i915/display/intel_psr.c
4039
seq_printf(m, "\n");
sys/dev/pci/drm/i915/display/intel_psr.c
4069
seq_printf(m, "PSR mode: %s%s%s\n", mode, status, region_et);
sys/dev/pci/drm/i915/display/intel_psr.c
4092
seq_printf(m, "PSR sink not reliable: %s\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4115
seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4118
seq_printf(m, "PSR2_CTL: 0x%08x\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4121
seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4128
seq_printf(m, "Performance counter: %u\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4132
seq_printf(m, "Last attempted entry at: %lld\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4134
seq_printf(m, "Last exit at: %lld\n", psr->last_exit);
sys/dev/pci/drm/i915/display/intel_psr.c
4164
seq_printf(m, "%d\t%d\n", frame, su_blocks);
sys/dev/pci/drm/i915/display/intel_psr.c
4168
seq_printf(m, "PSR2 selective fetch: %s\n",
sys/dev/pci/drm/i915/display/intel_psr.c
4305
seq_printf(m, "Sink %s status: 0x%x [%s]\n", psr_mode_str(intel_dp), status, str);
sys/dev/pci/drm/i915/display/intel_psr.c
4307
seq_printf(m, "Sink %s error status: 0x%x", psr_mode_str(intel_dp), error_status);
sys/dev/pci/drm/i915/display/intel_psr.c
4316
seq_printf(m, "\t%s RFB storage error\n", psr_mode_str(intel_dp));
sys/dev/pci/drm/i915/display/intel_psr.c
4318
seq_printf(m, "\t%s VSC SDP uncorrectable error\n", psr_mode_str(intel_dp));
sys/dev/pci/drm/i915/display/intel_psr.c
4320
seq_printf(m, "\t%s Link CRC error\n", psr_mode_str(intel_dp));
sys/dev/pci/drm/i915/display/intel_wm.c
202
seq_printf(m, "WM%d %u (%u.%u usec)\n",
sys/dev/pci/drm/i915/display/skl_watermark.c
3974
seq_printf(m, "Isochronous Priority Control: %s\n",
sys/dev/pci/drm/i915/display/skl_watermark.c
4031
seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(display)));
sys/dev/pci/drm/i915/display/skl_watermark.c
4032
seq_printf(m, "SAGV modparam: %s\n",
sys/dev/pci/drm/i915/display/skl_watermark.c
4034
seq_printf(m, "SAGV status: %s\n", sagv_status[display->sagv.status]);
sys/dev/pci/drm/i915/display/skl_watermark.c
4035
seq_printf(m, "SAGV block time: %d usec\n", display->sagv.block_time_us);
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
102
seq_printf(m, "RC6 Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
105
seq_printf(m, "Multi-threaded Forcewake Request: 0x%x\n", mt_fwake_req);
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
106
seq_printf(m, "Render Power Well: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
108
seq_printf(m, "Media Power Well: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
139
seq_printf(m, "RC1e Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
141
seq_printf(m, "RC6 Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
144
seq_printf(m, "Render Well Gating Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
146
seq_printf(m, "Media Well Gating Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
149
seq_printf(m, "Deep RC6 Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
151
seq_printf(m, "Deepest RC6 Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
175
seq_printf(m, "Core Power Down: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
177
seq_printf(m, "Multi-threaded Forcewake Request: 0x%x\n", mt_fwake_req);
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
179
seq_printf(m, "Render Power Well: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
182
seq_printf(m, "Media Power Well: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
195
seq_printf(m, "RC6 voltage: %dmV\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
197
seq_printf(m, "RC6+ voltage: %dmV\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
199
seq_printf(m, "RC6++ voltage: %dmV\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
217
seq_printf(m, "HD boost: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
219
seq_printf(m, "Boost freq: %d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
222
seq_printf(m, "HW control enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
224
seq_printf(m, "SW control enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
226
seq_printf(m, "Gated voltage change: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
228
seq_printf(m, "Starting frequency: P%d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
230
seq_printf(m, "Max P-state: P%d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
232
seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
233
seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
234
seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
235
seq_printf(m, "Render standby enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
280
seq_printf(m, "RC6 Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
283
seq_printf(m, "Media Well Gating Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
286
seq_printf(m, "Render Well Gating Enabled: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
303
seq_printf(m, "Multi-threaded Forcewake Request: 0x%x\n", mt_fwake_req);
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
305
seq_printf(m, "Media Power Well: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
309
seq_printf(m, "Render Power Well: %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
424
seq_printf(m, "LLC: %s\n", str_yes_no(HAS_LLC(i915)));
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
425
seq_printf(m, "%s: %uMB\n", edram ? "eDRAM" : "eLLC",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
443
seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
486
seq_printf(m, "RPS enabled? %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
488
seq_printf(m, "RPS active? %s\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
490
seq_printf(m, "GPU busy? %s, %llums\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
493
seq_printf(m, "Boosts outstanding? %d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
495
seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive));
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
496
seq_printf(m, "Frequency requested %d, actual %d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
499
seq_printf(m, " min hard:%d, soft:%d; max soft:%d, hard:%d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
504
seq_printf(m, " idle:%d, efficient:%d, boost:%d\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
509
seq_printf(m, "Wait boosts: %d\n", READ_ONCE(rps->boosts));
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
523
seq_printf(m, "\nRPS Autotuning (current \"%s\" window):\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
525
seq_printf(m, " Avg. up: %d%% [above threshold? %d%%]\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
528
seq_printf(m, " Avg. down: %d%% [below threshold? %d%%]\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
78
seq_printf(m, "user.bypass_count = %u\n",
sys/dev/pci/drm/i915/gt/intel_gt_pm_debugfs.c
82
seq_printf(m, "%s.wake_count = %u\n",
sys/dev/pci/drm/i915/gt/intel_rc6.c
860
seq_printf(m, "%s %u (%llu us)\n", title,
sys/dev/pci/drm/i915/gt/intel_sseu.c
858
seq_printf(m, " %s Geometry DSS: %u\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu.c
861
seq_printf(m, " %s Compute DSS: %u\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu.c
866
seq_printf(m, " %s Slice%i subslices: %u\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
200
seq_printf(m, " %s Slice Mask: %04x\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
202
seq_printf(m, " %s Slice Total: %u\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
204
seq_printf(m, " %s Subslice Total: %u\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
207
seq_printf(m, " %s EU Total: %u\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
209
seq_printf(m, " %s EU Per Subslice: %u\n", type,
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
215
seq_printf(m, " Has Pooled EU: %s\n", str_yes_no(has_pooled_eu));
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
217
seq_printf(m, " Min EU in pool: %u\n", sseu->min_eu_in_pool);
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
219
seq_printf(m, " Has Slice Power Gating: %s\n",
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
221
seq_printf(m, " Has Subslice Power Gating: %s\n",
sys/dev/pci/drm/i915/gt/intel_sseu_debugfs.c
223
seq_printf(m, " Has EU Power Gating: %s\n",
sys/dev/pci/drm/i915/gvt/debugfs.c
112
seq_printf(s, "%-8s %-8s %-8s %-8s\n", "Offset", "HW", "vGPU", "Diff");
sys/dev/pci/drm/i915/gvt/debugfs.c
116
seq_printf(s, "%08x %08x %08x %*pbl\n",
sys/dev/pci/drm/i915/gvt/debugfs.c
122
seq_printf(s, "Total: %d, Diff: %d\n", param.total, param.diff);
sys/dev/pci/drm/i915/i915_debugfs.c
180
seq_printf(m, "%pK: %c%c%c %8zdKiB %02x %02x %s%s%s",
sys/dev/pci/drm/i915/i915_debugfs.c
192
seq_printf(m, " (name: %d)", obj->base.name);
sys/dev/pci/drm/i915/i915_debugfs.c
204
seq_printf(m, " (%s offset: %08llx, size: %08llx, pages: %s",
sys/dev/pci/drm/i915/i915_debugfs.c
216
seq_printf(m, ", partial [%08llx+%x]",
sys/dev/pci/drm/i915/i915_debugfs.c
222
seq_printf(m, ", rotated [(%ux%u, src_stride=%u, dst_stride=%u, offset=%u), (%ux%u, src_stride=%u, dst_stride=%u, offset=%u)]",
sys/dev/pci/drm/i915/i915_debugfs.c
236
seq_printf(m, ", remapped [(%ux%u, src_stride=%u, dst_stride=%u, offset=%u), (%ux%u, src_stride=%u, dst_stride=%u, offset=%u)]",
sys/dev/pci/drm/i915/i915_debugfs.c
255
seq_printf(m, " , fence: %d", vma->fence->id);
sys/dev/pci/drm/i915/i915_debugfs.c
262
seq_printf(m, " (pinned x %d)", pin_count);
sys/dev/pci/drm/i915/i915_debugfs.c
264
seq_printf(m, " (stolen: %08llx)", obj->stolen->start);
sys/dev/pci/drm/i915/i915_debugfs.c
266
seq_printf(m, " (fb)");
sys/dev/pci/drm/i915/i915_debugfs.c
276
seq_printf(m, "%u shrinkable [%u free] objects, %llu bytes\n",
sys/dev/pci/drm/i915/i915_debugfs.c
327
seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
sys/dev/pci/drm/i915/i915_debugfs.c
329
seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
sys/dev/pci/drm/i915/i915_debugfs.c
342
seq_printf(m, "DDC = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
344
seq_printf(m, "DDC2 = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
346
seq_printf(m, "C0DRB3 = 0x%04x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
348
seq_printf(m, "C1DRB3 = 0x%04x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
351
seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
353
seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
355
seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
357
seq_printf(m, "TILECTL = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
360
seq_printf(m, "GAMTARBMODE = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
363
seq_printf(m, "ARB_MODE = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
365
seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
sys/dev/pci/drm/i915/i915_debugfs.c
379
seq_printf(m, "RPS enabled? %s\n",
sys/dev/pci/drm/i915/i915_debugfs.c
381
seq_printf(m, "RPS active? %s\n",
sys/dev/pci/drm/i915/i915_debugfs.c
383
seq_printf(m, "GPU busy? %s\n", str_yes_no(to_gt(dev_priv)->awake));
sys/dev/pci/drm/i915/i915_debugfs.c
384
seq_printf(m, "Boosts outstanding? %d\n",
sys/dev/pci/drm/i915/i915_debugfs.c
386
seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive));
sys/dev/pci/drm/i915/i915_debugfs.c
387
seq_printf(m, "Frequency requested %d, actual %d\n",
sys/dev/pci/drm/i915/i915_debugfs.c
390
seq_printf(m, " min hard:%d, soft:%d; max soft:%d, hard:%d\n",
sys/dev/pci/drm/i915/i915_debugfs.c
395
seq_printf(m, " idle:%d, efficient:%d, boost:%d\n",
sys/dev/pci/drm/i915/i915_debugfs.c
400
seq_printf(m, "Wait boosts: %d\n", READ_ONCE(rps->boosts));
sys/dev/pci/drm/i915/i915_debugfs.c
413
seq_printf(m, "GPU idle: %s\n", str_yes_no(!to_gt(dev_priv)->awake));
sys/dev/pci/drm/i915/i915_debugfs.c
414
seq_printf(m, "IRQs disabled: %s\n",
sys/dev/pci/drm/i915/i915_debugfs.c
417
seq_printf(m, "Usage count: %d\n",
sys/dev/pci/drm/i915/i915_debugfs.c
420
seq_printf(m, "Device Power Management (CONFIG_PM) disabled\n");
sys/dev/pci/drm/i915/i915_debugfs.c
422
seq_printf(m, "PCI device power state: %s [%d]\n",
sys/dev/pci/drm/i915/i915_debugfs.c
444
seq_printf(m, "GT awake? %s [%d], %llums\n",
sys/dev/pci/drm/i915/i915_debugfs.c
448
seq_printf(m, "CS timestamp frequency: %u Hz, %d ns\n",
sys/dev/pci/drm/i915/i915_debugfs.c
477
seq_printf(m, "%s: Workarounds applied: %u\n",
sys/dev/pci/drm/i915/i915_debugfs.c
481
seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n",
sys/dev/pci/drm/i915/i915_debugfs.c
485
seq_printf(m, "\n");
sys/dev/pci/drm/i915/i915_debugfs_params.c
159
seq_printf(m, "%s\n", *s);
sys/dev/pci/drm/i915/i915_debugfs_params.c
30
seq_printf(m, "%d\n", *value);
sys/dev/pci/drm/i915/i915_debugfs_params.c
96
seq_printf(m, "%u\n", *value);
sys/dev/pci/drm/radeon/btc_dpm.c
2717
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/btc_dpm.c
2725
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/btc_dpm.c
2726
seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n",
sys/dev/pci/drm/radeon/ci_dpm.c
5905
seq_printf(m, "uvd %sabled\n", pi->uvd_enabled ? "en" : "dis");
sys/dev/pci/drm/radeon/ci_dpm.c
5906
seq_printf(m, "vce %sabled\n", rps->vce_active ? "en" : "dis");
sys/dev/pci/drm/radeon/ci_dpm.c
5907
seq_printf(m, "power level avg sclk: %u mclk: %u\n",
sys/dev/pci/drm/radeon/kv_dpm.c
2608
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/kv_dpm.c
2614
seq_printf(m, "uvd %sabled\n", pi->uvd_power_gated ? "dis" : "en");
sys/dev/pci/drm/radeon/kv_dpm.c
2615
seq_printf(m, "vce %sabled\n", pi->vce_power_gated ? "dis" : "en");
sys/dev/pci/drm/radeon/kv_dpm.c
2616
seq_printf(m, "power level %d sclk: %u vddc: %u\n",
sys/dev/pci/drm/radeon/ni_dpm.c
4316
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/ni_dpm.c
4319
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/ni_dpm.c
4320
seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n",
sys/dev/pci/drm/radeon/r100.c
2958
seq_printf(m, "RBBM_STATUS 0x%08x\n", RREG32(RADEON_RBBM_STATUS));
sys/dev/pci/drm/radeon/r100.c
2959
seq_printf(m, "RBBM_CMDFIFO_STAT 0x%08x\n", RREG32(0xE7C));
sys/dev/pci/drm/radeon/r100.c
2960
seq_printf(m, "CP_STAT 0x%08x\n", RREG32(RADEON_CP_STAT));
sys/dev/pci/drm/radeon/r100.c
2966
seq_printf(m, "[0x%03X] 0x%04X=0x%08X\n", i, reg, value);
sys/dev/pci/drm/radeon/r100.c
2982
seq_printf(m, "CP_STAT 0x%08x\n", RREG32(RADEON_CP_STAT));
sys/dev/pci/drm/radeon/r100.c
2983
seq_printf(m, "CP_RB_WPTR 0x%08x\n", wdp);
sys/dev/pci/drm/radeon/r100.c
2984
seq_printf(m, "CP_RB_RPTR 0x%08x\n", rdp);
sys/dev/pci/drm/radeon/r100.c
2985
seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
sys/dev/pci/drm/radeon/r100.c
2986
seq_printf(m, "%u dwords in ring\n", count);
sys/dev/pci/drm/radeon/r100.c
2990
seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]);
sys/dev/pci/drm/radeon/r100.c
3004
seq_printf(m, "CP_STAT 0x%08x\n", RREG32(RADEON_CP_STAT));
sys/dev/pci/drm/radeon/r100.c
3005
seq_printf(m, "CP_CSQ_MODE 0x%08x\n", RREG32(RADEON_CP_CSQ_MODE));
sys/dev/pci/drm/radeon/r100.c
3014
seq_printf(m, "CP_CSQ_STAT 0x%08x\n", csq_stat);
sys/dev/pci/drm/radeon/r100.c
3015
seq_printf(m, "CP_CSQ2_STAT 0x%08x\n", csq2_stat);
sys/dev/pci/drm/radeon/r100.c
3016
seq_printf(m, "Ring rptr %u\n", r_rptr);
sys/dev/pci/drm/radeon/r100.c
3017
seq_printf(m, "Ring wptr %u\n", r_wptr);
sys/dev/pci/drm/radeon/r100.c
3018
seq_printf(m, "Indirect1 rptr %u\n", ib1_rptr);
sys/dev/pci/drm/radeon/r100.c
3019
seq_printf(m, "Indirect1 wptr %u\n", ib1_wptr);
sys/dev/pci/drm/radeon/r100.c
3020
seq_printf(m, "Indirect2 rptr %u\n", ib2_rptr);
sys/dev/pci/drm/radeon/r100.c
3021
seq_printf(m, "Indirect2 wptr %u\n", ib2_wptr);
sys/dev/pci/drm/radeon/r100.c
3024
seq_printf(m, "Ring fifo:\n");
sys/dev/pci/drm/radeon/r100.c
3028
seq_printf(m, "rfifo[%04d]=0x%08X\n", i, tmp);
sys/dev/pci/drm/radeon/r100.c
3030
seq_printf(m, "Indirect1 fifo:\n");
sys/dev/pci/drm/radeon/r100.c
3034
seq_printf(m, "ib1fifo[%04d]=0x%08X\n", i, tmp);
sys/dev/pci/drm/radeon/r100.c
3036
seq_printf(m, "Indirect2 fifo:\n");
sys/dev/pci/drm/radeon/r100.c
3040
seq_printf(m, "ib2fifo[%04d]=0x%08X\n", i, tmp);
sys/dev/pci/drm/radeon/r100.c
3051
seq_printf(m, "CONFIG_MEMSIZE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3053
seq_printf(m, "MC_FB_LOCATION 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3055
seq_printf(m, "BUS_CNTL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3057
seq_printf(m, "MC_AGP_LOCATION 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3059
seq_printf(m, "AGP_BASE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3061
seq_printf(m, "HOST_PATH_CNTL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3063
seq_printf(m, "AIC_CTRL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3065
seq_printf(m, "AIC_LO_ADDR 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3067
seq_printf(m, "AIC_HI_ADDR 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r100.c
3069
seq_printf(m, "AIC_TLB_ADDR 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r300.c
598
seq_printf(m, "PCIE_TX_GART_CNTL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r300.c
600
seq_printf(m, "PCIE_TX_GART_BASE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r300.c
602
seq_printf(m, "PCIE_TX_GART_START_LO 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r300.c
604
seq_printf(m, "PCIE_TX_GART_START_HI 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r300.c
606
seq_printf(m, "PCIE_TX_GART_END_LO 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r300.c
608
seq_printf(m, "PCIE_TX_GART_END_HI 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r300.c
610
seq_printf(m, "PCIE_TX_GART_ERROR 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r420.c
482
seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r420.c
484
seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/r420.c
486
seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/radeon.h
2603
#define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg), false))
sys/dev/pci/drm/radeon/radeon_fence.c
909
seq_printf(m, "--- ring %d ---\n", i);
sys/dev/pci/drm/radeon/radeon_fence.c
910
seq_printf(m, "Last signaled fence 0x%016llx\n",
sys/dev/pci/drm/radeon/radeon_fence.c
912
seq_printf(m, "Last emitted 0x%016llx\n",
sys/dev/pci/drm/radeon/radeon_fence.c
917
seq_printf(m, "Last sync to ring %d 0x%016llx\n",
sys/dev/pci/drm/radeon/radeon_gem.c
982
seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
sys/dev/pci/drm/radeon/radeon_pm.c
1946
seq_printf(m, "PX asic powered off\n");
sys/dev/pci/drm/radeon/radeon_pm.c
1952
seq_printf(m, "Debugfs support not implemented for this asic\n");
sys/dev/pci/drm/radeon/radeon_pm.c
1955
seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);
sys/dev/pci/drm/radeon/radeon_pm.c
1958
seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk);
sys/dev/pci/drm/radeon/radeon_pm.c
1960
seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
sys/dev/pci/drm/radeon/radeon_pm.c
1961
seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);
sys/dev/pci/drm/radeon/radeon_pm.c
1963
seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
sys/dev/pci/drm/radeon/radeon_pm.c
1965
seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);
sys/dev/pci/drm/radeon/radeon_pm.c
1967
seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
sys/dev/pci/drm/radeon/radeon_ring.c
479
seq_printf(m, "wptr: 0x%08x [%5d]\n",
sys/dev/pci/drm/radeon/radeon_ring.c
483
seq_printf(m, "rptr: 0x%08x [%5d]\n",
sys/dev/pci/drm/radeon/radeon_ring.c
488
seq_printf(m, "rptr next(0x%04x): 0x%08x [%5d]\n",
sys/dev/pci/drm/radeon/radeon_ring.c
493
seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n",
sys/dev/pci/drm/radeon/radeon_ring.c
495
seq_printf(m, "last semaphore signal addr : 0x%016llx\n",
sys/dev/pci/drm/radeon/radeon_ring.c
497
seq_printf(m, "last semaphore wait addr : 0x%016llx\n",
sys/dev/pci/drm/radeon/radeon_ring.c
499
seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
sys/dev/pci/drm/radeon/radeon_ring.c
500
seq_printf(m, "%u dwords in ring\n", count);
sys/dev/pci/drm/radeon/radeon_ring.c
510
seq_printf(m, "r[%5d]=0x%08x", i, ring->ring[i]);
sys/dev/pci/drm/radeon/rs400.c
329
seq_printf(m, "HOST_PATH_CNTL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
331
seq_printf(m, "BUS_CNTL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
333
seq_printf(m, "AIC_CTRL_SCRATCH 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
336
seq_printf(m, "MCCFG_AGP_BASE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
338
seq_printf(m, "MCCFG_AGP_BASE_2 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
340
seq_printf(m, "MCCFG_AGP_LOCATION 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
342
seq_printf(m, "MCCFG_FB_LOCATION 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
344
seq_printf(m, "HDP_FB_LOCATION 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
347
seq_printf(m, "AGP_BASE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
349
seq_printf(m, "AGP_BASE_2 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
351
seq_printf(m, "MC_AGP_LOCATION 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
354
seq_printf(m, "GART_BASE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
356
seq_printf(m, "GART_FEATURE_ID 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
358
seq_printf(m, "AGP_MODE_CONTROL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
360
seq_printf(m, "MC_MISC_CNTL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
362
seq_printf(m, "MC_MISC_UMA_CNTL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
364
seq_printf(m, "AGP_ADDRESS_SPACE_SIZE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
366
seq_printf(m, "GART_CACHE_CNTRL 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
368
seq_printf(m, "MC_GART_ERROR_ADDRESS 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
370
seq_printf(m, "MC_GART_ERROR_ADDRESS_HI 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
372
seq_printf(m, "GART_ERROR_0 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
374
seq_printf(m, "GART_ERROR_1 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
376
seq_printf(m, "GART_ERROR_2 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
378
seq_printf(m, "GART_ERROR_3 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
380
seq_printf(m, "GART_ERROR_4 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
382
seq_printf(m, "GART_ERROR_5 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
384
seq_printf(m, "GART_ERROR_6 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs400.c
386
seq_printf(m, "GART_ERROR_7 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rs780_dpm.c
1001
seq_printf(m, "power level 1 sclk: %u vddc_index: %d\n",
sys/dev/pci/drm/radeon/rs780_dpm.c
994
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/rs780_dpm.c
998
seq_printf(m, "power level 0 sclk: %u vddc_index: %d\n",
sys/dev/pci/drm/radeon/rv515.c
228
seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rv515.c
230
seq_printf(m, "SU_REG_DEST 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rv515.c
232
seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rv515.c
234
seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rv515.c
244
seq_printf(m, "VAP_CNTL_STATUS 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rv515.c
247
seq_printf(m, "GA_IDLE 0x%08x\n", tmp);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
2039
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
2047
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/rv6xx_dpm.c
2048
seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u\n",
sys/dev/pci/drm/radeon/rv770_dpm.c
2478
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/rv770_dpm.c
2486
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/rv770_dpm.c
2488
seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n",
sys/dev/pci/drm/radeon/rv770_dpm.c
2491
seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u\n",
sys/dev/pci/drm/radeon/si_dpm.c
7047
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/si_dpm.c
7050
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/si_dpm.c
7051
seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n",
sys/dev/pci/drm/radeon/sumo_dpm.c
1827
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/sumo_dpm.c
1828
seq_printf(m, "power level %d sclk: %u vddc: %u\n",
sys/dev/pci/drm/radeon/sumo_dpm.c
1832
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/sumo_dpm.c
1835
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/sumo_dpm.c
1836
seq_printf(m, "power level %d sclk: %u vddc: %u\n",
sys/dev/pci/drm/radeon/trinity_dpm.c
1995
seq_printf(m, "invalid dpm profile %d\n", current_index);
sys/dev/pci/drm/radeon/trinity_dpm.c
1998
seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
sys/dev/pci/drm/radeon/trinity_dpm.c
1999
seq_printf(m, "power level %d sclk: %u vddc: %u\n",
sys/dev/pci/drm/ttm/ttm_pool.c
1362
seq_printf(m, " ---%2u---", i);
sys/dev/pci/drm/ttm/ttm_pool.c
1373
seq_printf(m, " %8u", ttm_pool_type_count(&pt[i]));
sys/dev/pci/drm/ttm/ttm_pool.c
1380
seq_printf(m, "\ntotal\t: %8lu of %8lu\n",
sys/dev/pci/drm/ttm/ttm_pool.c
1432
seq_printf(m, "N%d ", pool->nid);
sys/dev/pci/drm/ttm/ttm_pool.c
1464
seq_printf(m, "%lu/%lu\n", count,
sys/dev/pci/drm/ttm/ttm_tt.c
513
seq_printf(m, "%d\n", ttm_global_swapout(&ctx, GFP_KERNEL));