Symbol: intel_engine_mask_t
sys/dev/pci/drm/i915/gem/i915_gem_context.c
599
intel_engine_mask_t prev_mask;
sys/dev/pci/drm/i915/gem/i915_gem_context.c
662
intel_engine_mask_t current_mask = 0;
sys/dev/pci/drm/i915/gt/intel_breadcrumbs_types.h
50
intel_engine_mask_t engine_mask;
sys/dev/pci/drm/i915/gt/intel_engine_cs.c
856
static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)
sys/dev/pci/drm/i915/gt/intel_engine_pm.h
44
intel_engine_mask_t tmp, mask = engine->mask;
sys/dev/pci/drm/i915/gt/intel_engine_pm.h
80
intel_engine_mask_t tmp, mask = engine->mask;
sys/dev/pci/drm/i915/gt/intel_engine_types.h
376
intel_engine_mask_t mask;
sys/dev/pci/drm/i915/gt/intel_engine_types.h
384
intel_engine_mask_t logical_mask;
sys/dev/pci/drm/i915/gt/intel_engine_types.h
443
intel_engine_mask_t saturated; /* submitting semaphores too late? */
sys/dev/pci/drm/i915/gt/intel_engine_types.h
60
#define ALL_ENGINES ((intel_engine_mask_t)~0ul)
sys/dev/pci/drm/i915/gt/intel_engine_types.h
61
#define VIRTUAL_ENGINES BIT(BITS_PER_TYPE(intel_engine_mask_t) - 1)
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
3792
static intel_engine_mask_t virtual_submission_mask(struct virtual_engine *ve)
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
3795
intel_engine_mask_t mask;
sys/dev/pci/drm/i915/gt/intel_execlists_submission.c
3823
intel_engine_mask_t mask;
sys/dev/pci/drm/i915/gt/intel_gt.c
244
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gt/intel_gt.h
150
intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gt/intel_gt_types.h
215
intel_engine_mask_t cslices;
sys/dev/pci/drm/i915/gt/intel_gt_types.h
262
intel_engine_mask_t engine_mask;
sys/dev/pci/drm/i915/gt/intel_gt_types.h
308
intel_engine_mask_t engine_mask;
sys/dev/pci/drm/i915/gt/intel_reset.c
1159
static int do_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
sys/dev/pci/drm/i915/gt/intel_reset.c
1214
intel_engine_mask_t stalled_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
1218
intel_engine_mask_t awake;
sys/dev/pci/drm/i915/gt/intel_reset.c
1480
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
1486
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/gt/intel_reset.c
156
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
185
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
195
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
231
static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
319
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
328
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/gt/intel_reset.c
340
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
520
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
524
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/gt/intel_reset.c
609
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
614
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/gt/intel_reset.c
664
intel_engine_mask_t mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
671
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.c
704
static bool needs_wa_14015076503(struct intel_gt *gt, intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gt/intel_reset.c
715
static intel_engine_mask_t
sys/dev/pci/drm/i915/gt/intel_reset.c
716
wa_14015076503_start(struct intel_gt *gt, intel_engine_mask_t engine_mask, bool first)
sys/dev/pci/drm/i915/gt/intel_reset.c
754
wa_14015076503_end(struct intel_gt *gt, intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gt/intel_reset.c
764
static int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gt/intel_reset.c
781
intel_engine_mask_t reset_mask;
sys/dev/pci/drm/i915/gt/intel_reset.c
885
static intel_engine_mask_t reset_prepare(struct intel_gt *gt)
sys/dev/pci/drm/i915/gt/intel_reset.c
888
intel_engine_mask_t awake = 0;
sys/dev/pci/drm/i915/gt/intel_reset.c
917
static int gt_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
sys/dev/pci/drm/i915/gt/intel_reset.c
952
static void reset_finish(struct intel_gt *gt, intel_engine_mask_t awake)
sys/dev/pci/drm/i915/gt/intel_reset.c
982
intel_engine_mask_t awake;
sys/dev/pci/drm/i915/gt/intel_reset.h
26
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gt/intel_reset.h
34
intel_engine_mask_t stalled_mask,
sys/dev/pci/drm/i915/gt/intel_tlb.c
54
intel_engine_mask_t awake, tmp;
sys/dev/pci/drm/i915/gt/selftest_hangcheck.c
1286
static u32 fake_hangcheck(struct intel_gt *gt, intel_engine_mask_t mask)
sys/dev/pci/drm/i915/gt/selftest_reset.c
19
intel_engine_mask_t mask,
sys/dev/pci/drm/i915/gt/selftest_reset.c
277
intel_engine_mask_t awake;
sys/dev/pci/drm/i915/gt/uc/intel_gsc_uc.c
100
intel_engine_mask_t mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc.h
159
intel_engine_mask_t reset_fail_mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc.h
536
void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled);
sys/dev/pci/drm/i915/gt/uc/intel_guc_ct.c
1403
intel_klog_error_capture(guc_to_gt(guc), (intel_engine_mask_t)~0U);
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
1756
intel_engine_mask_t tmp, mask = ve->mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
1857
static void __guc_reset_context(struct intel_context *ce, intel_engine_mask_t stalled)
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
1927
void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled)
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4002
intel_engine_mask_t tmp, mask = ce->engine->mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4013
intel_engine_mask_t tmp, mask = ce->engine->mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4029
intel_engine_mask_t tmp, mask = ce->engine->mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4040
intel_engine_mask_t tmp, mask = ce->engine->mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4281
intel_engine_mask_t tmp, mask = b->engine_mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4294
intel_engine_mask_t tmp, mask = b->engine_mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
4532
intel_engine_mask_t tmp, mask = engine->mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
5188
intel_engine_mask_t engine_mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
5192
intel_engine_mask_t tmp, virtual_mask = ce->engine->mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
5319
intel_engine_mask_t reset_fail_mask;
sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c
6005
intel_engine_mask_t tmp, mask = ve->mask;
sys/dev/pci/drm/i915/gt/uc/intel_huc.c
272
intel_engine_mask_t mask = gt->info.engine_mask;
sys/dev/pci/drm/i915/gt/uc/intel_uc.c
624
void intel_uc_reset(struct intel_uc *uc, intel_engine_mask_t stalled)
sys/dev/pci/drm/i915/gt/uc/intel_uc.h
49
void intel_uc_reset(struct intel_uc *uc, intel_engine_mask_t stalled);
sys/dev/pci/drm/i915/gvt/cmd_parser.c
436
intel_engine_mask_t rings;
sys/dev/pci/drm/i915/gvt/execlist.c
523
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gvt/execlist.c
527
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/gvt/execlist.c
537
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gvt/execlist.c
540
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/gvt/execlist.c
547
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gvt/gvt.h
145
int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gvt/gvt.h
146
void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gvt/gvt.h
147
void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gvt/gvt.h
502
intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gvt/handlers.c
328
intel_engine_mask_t engine_mask = 0;
sys/dev/pci/drm/i915/gvt/scheduler.c
1049
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gvt/scheduler.c
1054
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/gvt/scheduler.c
1344
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gvt/scheduler.c
1468
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gvt/scheduler.h
148
intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gvt/scheduler.h
153
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/gvt/scheduler.h
167
intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/gvt/vgpu.c
436
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/gvt/vgpu.c
440
intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask;
sys/dev/pci/drm/i915/i915_active.c
857
intel_engine_mask_t tmp, mask = engine->mask;
sys/dev/pci/drm/i915/i915_gpu_error.c
1804
intel_engine_mask_t engine_mask,
sys/dev/pci/drm/i915/i915_gpu_error.c
2228
__i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags)
sys/dev/pci/drm/i915/i915_gpu_error.c
2281
i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags)
sys/dev/pci/drm/i915/i915_gpu_error.c
2327
intel_engine_mask_t engine_mask, u32 dump_flags)
sys/dev/pci/drm/i915/i915_gpu_error.c
2383
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/i915_gpu_error.h
267
intel_engine_mask_t engine_mask);
sys/dev/pci/drm/i915/i915_gpu_error.h
270
intel_engine_mask_t engine_mask)
sys/dev/pci/drm/i915/i915_gpu_error.h
281
intel_engine_mask_t engine_mask, u32 dump_flags);
sys/dev/pci/drm/i915/i915_gpu_error.h
343
i915_capture_error_state(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags)
sys/dev/pci/drm/i915/i915_perf.c
4975
intel_engine_mask_t tmp;
sys/dev/pci/drm/i915/i915_request.c
1208
static intel_engine_mask_t
sys/dev/pci/drm/i915/i915_request.c
1288
const intel_engine_mask_t mask = READ_ONCE(from->engine)->mask;
sys/dev/pci/drm/i915/i915_request.h
272
intel_engine_mask_t execution_mask;
sys/dev/pci/drm/i915/i915_scheduler_types.h
69
intel_engine_mask_t semaphores;
sys/dev/pci/drm/i915/intel_device_info.c
400
BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES);
sys/dev/pci/drm/i915/intel_device_info.h
233
intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */
sys/dev/pci/drm/i915/intel_uncore.c
2206
intel_engine_mask_t emask;