sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2119

intel_cx0_rmw(encoder, lane, PHY_C10_VDR_CONTROL(1),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2138

intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CONTROL(1),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2152

intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CUSTOM_WIDTH,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2155

intel_cx0_rmw(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_CONTROL(1),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2705

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_WIDTH,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2712

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2717

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2731

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2962

intel_cx0_rmw(encoder, owned_lane_mask,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2984

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_TX_CONTROL(tx, 2),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

2991

intel_cx0_rmw(encoder, owned_lane_mask,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

3263

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1), 0,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

3273

intel_cx0_rmw(encoder, lane_mask, PHY_CMN1_CONTROL(tx, 0),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

476

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

478

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CMN(3),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

482

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_TX(1),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

497

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 0),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

501

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 1),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

505

intel_cx0_rmw(encoder, lane_mask, PHY_CX0_VDROVRD_CTL(lane, tx, 2),

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

512

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_OVRD,

sys/dev/pci/drm/i915/display/intel_cx0_phy.c

517

intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1),