sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

3201

config->gb_addr_config = adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c

916

config[no_regs++] = adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.h

251

unsigned gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.h

259

struct gb_addr_config gb_addr_config_fields;

sys/dev/pci/drm/amd/amdgpu/cik.c

1157

return adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

448

adev->gfx.config.gb_addr_config & 0x70);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4582

u32 gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4593

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4608

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4610

1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4619

gb_addr_config = CYAN_SKILLFISH_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4626

adev->gfx.config.gb_addr_config = gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4629

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4636

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4639

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4642

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4645

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4693

u32 gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4695

gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4696

if (gb_addr_config == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4700

1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4702

adev->gfx.config.gb_addr_config = gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4705

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4712

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4715

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4718

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4721

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3538

u32 gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3540

gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3541

if (gb_addr_config == 0)

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3545

1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3547

adev->gfx.config.gb_addr_config = gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3550

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3557

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3560

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3563

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3566

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1581

u32 gb_addr_config = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1603

gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1620

gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1637

gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1654

gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1671

gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1697

gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1701

gb_addr_config |= 0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1704

gb_addr_config |= 1 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1707

gb_addr_config |= 2 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1710

gb_addr_config &= ~GB_ADDR_CONFIG__NUM_SHADER_ENGINES_MASK;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1712

gb_addr_config |= 1 << GB_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1713

adev->gfx.config.gb_addr_config = gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1715

WREG32(mmGB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1716

WREG32(mmDMIF_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1717

WREG32(mmDMIF_ADDR_CALC, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1718

WREG32(mmHDP_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1719

WREG32(mmDMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1720

WREG32(mmDMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1724

WREG32(mmUVD_UDEC_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1725

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1726

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

1899

WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

1900

WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

1901

WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4135

u32 gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4156

gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4173

gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4190

gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4209

gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4261

gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4265

gb_addr_config |= (0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4268

gb_addr_config |= (1 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4271

gb_addr_config |= (2 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4274

adev->gfx.config.gb_addr_config = gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1640

u32 gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1662

gb_addr_config = TOPAZ_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1679

gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1694

gb_addr_config = POLARIS11_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1709

gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1726

gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1743

gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1760

gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1777

gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1832

gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1835

gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1838

gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1841

adev->gfx.config.gb_addr_config = gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3728

WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3729

WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

3730

WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2023

u32 gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2033

gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2041

gb_addr_config = VEGA12_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2051

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2052

gb_addr_config &= ~0xf3e777ff;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2053

gb_addr_config |= 0x22014042;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2067

gb_addr_config = RAVEN2_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2069

gb_addr_config = RAVEN_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2078

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2079

gb_addr_config &= ~0xf3e777ff;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2080

gb_addr_config |= 0x22014042;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2088

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2089

gb_addr_config &= ~0xf3e777ff;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2090

gb_addr_config |= 0x22010042;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2099

gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2100

gb_addr_config &= ~0xf3e777ff;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2101

gb_addr_config |= 0x22014042;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2112

adev->gfx.config.gb_addr_config = gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2116

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2125

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2130

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2135

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2140

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

2145

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

930

adev->gfx.config.gb_addr_config = GOLDEN_GB_ADDR_CONFIG;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

934

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

943

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

948

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

953

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

958

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

963

adev->gfx.config.gb_addr_config,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

351

WREG32_SOC15(JPEG, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

353

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

355

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c

369

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c

371

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

406

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

563

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

565

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c

452

adev->gfx.config.gb_addr_config, indirect);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c

537

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c

362

adev->gfx.config.gb_addr_config, indirect);

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c

365

adev->gfx.config.gb_addr_config, 1);

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c

448

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c

380

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/nv.c

382

return adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

422

adev->gfx.config.gb_addr_config & 0x70);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

662

adev->gfx.config.gb_addr_config & 0x70);

sys/dev/pci/drm/amd/amdgpu/si.c

1211

return adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/soc15.c

429

return adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/soc21.c

302

if (reg_offset == SOC15_REG_OFFSET(GC, 0, regGB_ADDR_CONFIG) && adev->gfx.config.gb_addr_config)

sys/dev/pci/drm/amd/amdgpu/soc21.c

303

return adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/soc24.c

162

adev->gfx.config.gb_addr_config)

sys/dev/pci/drm/amd/amdgpu/soc24.c

163

return adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

270

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

271

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

272

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

604

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

605

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

606

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

307

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

308

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

309

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

633

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

634

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

635

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

722

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

724

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

726

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1123

tmp = adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

397

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

399

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

401

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

403

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

405

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

407

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

409

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

411

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

413

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

415

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

417

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

419

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

474

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

476

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

478

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

480

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

482

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

484

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

486

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

488

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

490

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

492

adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

435

WREG32_SOC15(UVD, 0, mmUVD_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

533

UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1242

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1244

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

746

VCN, 0, mmUVD_GFX8_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1276

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

668

UVD, inst_idx, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1221

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

608

adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1263

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1265

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

631

VCN, 0, regUVD_GFX8_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

633

VCN, 0, regUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1133

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

565

adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

524

adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

861

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

1027

adev->gfx.config.gb_addr_config);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

587

VCN, 0, regUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vi.c

779

return adev->gfx.config.gb_addr_config;

sys/dev/pci/drm/amd/amdkfd/kfd_chardev.c

942

args->gb_addr_config = config.gb_addr_config;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

636

u32 gb_addr_config;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

646

gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

647

ASSERT(gb_addr_config != 0);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

649

num_pkrs = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

651

num_pipes = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PIPES);

sys/dev/pci/drm/amd/include/kgd_kfd_interface.h

155

uint32_t gb_addr_config;

sys/dev/pci/drm/include/uapi/linux/kfd_ioctl.h

386

__u32 gb_addr_config; /* from KFD */

sys/dev/pci/drm/radeon/cik.c

3170

u32 gb_addr_config = RREG32(GB_ADDR_CONFIG);

sys/dev/pci/drm/radeon/cik.c

3192

gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/cik.c

3209

gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/cik.c

3226

gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/cik.c

3245

gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/cik.c

3279

gb_addr_config &= ~ROW_SIZE_MASK;

sys/dev/pci/drm/radeon/cik.c

3283

gb_addr_config |= ROW_SIZE(0);

sys/dev/pci/drm/radeon/cik.c

3286

gb_addr_config |= ROW_SIZE(1);

sys/dev/pci/drm/radeon/cik.c

3289

gb_addr_config |= ROW_SIZE(2);

sys/dev/pci/drm/radeon/cik.c

3320

((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;

sys/dev/pci/drm/radeon/cik.c

3322

((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;

sys/dev/pci/drm/radeon/cik.c

3324

WREG32(GB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/cik.c

3325

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/cik.c

3326

WREG32(DMIF_ADDR_CALC, gb_addr_config);

sys/dev/pci/drm/radeon/cik.c

3327

WREG32(SDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET, gb_addr_config & 0x70);

sys/dev/pci/drm/radeon/cik.c

3328

WREG32(SDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET, gb_addr_config & 0x70);

sys/dev/pci/drm/radeon/cik.c

3329

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/cik.c

3330

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/cik.c

3331

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3134

u32 gb_addr_config;

sys/dev/pci/drm/radeon/evergreen.c

3175

gb_addr_config = CYPRESS_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3197

gb_addr_config = JUNIPER_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3219

gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3242

gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3264

gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3292

gb_addr_config = SUMO_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3314

gb_addr_config = SUMO2_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3336

gb_addr_config = BARTS_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3358

gb_addr_config = TURKS_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3380

gb_addr_config = CAICOS_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/evergreen.c

3449

((gb_addr_config & 0x30000000) >> 28) << 12;

sys/dev/pci/drm/radeon/evergreen.c

3497

WREG32(GB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3498

WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3499

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3500

WREG32(DMA_TILING_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3501

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3502

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3503

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/evergreen.c

3515

tmp = gb_addr_config & NUM_PIPES_MASK;

sys/dev/pci/drm/radeon/ni.c

1005

tmp = (gb_addr_config & NUM_PIPES_MASK) >> NUM_PIPES_SHIFT;

sys/dev/pci/drm/radeon/ni.c

1007

tmp = (gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT;

sys/dev/pci/drm/radeon/ni.c

1009

tmp = (gb_addr_config & NUM_SHADER_ENGINES_MASK) >> NUM_SHADER_ENGINES_SHIFT;

sys/dev/pci/drm/radeon/ni.c

1011

tmp = (gb_addr_config & NUM_GPUS_MASK) >> NUM_GPUS_SHIFT;

sys/dev/pci/drm/radeon/ni.c

1013

tmp = (gb_addr_config & MULTI_GPU_TILE_SIZE_MASK) >> MULTI_GPU_TILE_SIZE_SHIFT;

sys/dev/pci/drm/radeon/ni.c

1015

tmp = (gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT;

sys/dev/pci/drm/radeon/ni.c

1061

((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;

sys/dev/pci/drm/radeon/ni.c

1063

((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;

sys/dev/pci/drm/radeon/ni.c

1101

WREG32(GB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1102

WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1104

WREG32(DMIF_ADDR_CALC, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1105

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1106

WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1107

WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1108

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1109

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1110

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/ni.c

1122

tmp = gb_addr_config & NUM_PIPES_MASK;

sys/dev/pci/drm/radeon/ni.c

867

u32 gb_addr_config = 0;

sys/dev/pci/drm/radeon/ni.c

900

gb_addr_config = CAYMAN_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/ni.c

974

gb_addr_config = ARUBA_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/si.c

3071

u32 gb_addr_config = 0;

sys/dev/pci/drm/radeon/si.c

3094

gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/si.c

3111

gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/si.c

3129

gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/si.c

3146

gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/si.c

3163

gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN;

sys/dev/pci/drm/radeon/si.c

3199

gb_addr_config &= ~ROW_SIZE_MASK;

sys/dev/pci/drm/radeon/si.c

3203

gb_addr_config |= ROW_SIZE(0);

sys/dev/pci/drm/radeon/si.c

3206

gb_addr_config |= ROW_SIZE(1);

sys/dev/pci/drm/radeon/si.c

3209

gb_addr_config |= ROW_SIZE(2);

sys/dev/pci/drm/radeon/si.c

3250

((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;

sys/dev/pci/drm/radeon/si.c

3252

((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;

sys/dev/pci/drm/radeon/si.c

3254

WREG32(GB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3255

WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3256

WREG32(DMIF_ADDR_CALC, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3257

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3258

WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3259

WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3261

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3262

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

sys/dev/pci/drm/radeon/si.c

3263

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);