sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10189

struct dc_state *dc_state)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10201

struct dc_commit_streams_params params = {dc_state->streams, dc_state->stream_count};

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10344

dm_enable_per_frame_crtc_master_sync(dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10364

status = dc_state_get_stream_status(dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10653

struct dc_state *dc_state = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10671

dc_state = dm_state->context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10672

amdgpu_dm_commit_streams(state, dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11823

dm_old_plane_state->dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11829

if (dm_old_plane_state->dc_state)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11830

dc_plane_state_release(dm_old_plane_state->dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11832

dm_new_plane_state->dc_state = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11858

WARN_ON(dm_new_plane_state->dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11903

dm_new_plane_state->dc_state = dc_new_plane_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

11910

dm_new_plane_state->dc_state->update_flags.bits.full_update = 1;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3031

struct dc_state *state, bool enable)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3075

DEFINE_FREE(state_release, struct dc_state *, if (_T) dc_state_release(_T))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3079

struct dc_state *context __free(state_release) = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3178

if (dm_new_plane_state->dc_state) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3179

WARN_ON(kref_read(&dm_new_plane_state->dc_state->refcount) > 1);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3180

dc_plane_state_release(dm_new_plane_state->dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3181

dm_new_plane_state->dc_state = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3347

static void dm_gpureset_commit_state(struct dc_state *dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3366

for (k = 0; k < dc_state->stream_count; k++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3367

bundle->stream_update.stream = dc_state->streams[k];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3369

for (m = 0; m < dc_state->stream_status[k].plane_count; m++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3371

dc_state->stream_status[k].plane_states[m];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3378

dc_state->stream_status[k].plane_count,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3379

dc_state->streams[k],

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3413

struct dc_state *dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3432

dc_state = dm->cached_dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3449

link_enc_cfg_copy(adev->dm.dc->current_state, dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3464

for (i = 0; i < dc_state->stream_count; i++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3465

dc_state->streams[i]->mode_changed = true;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3466

for (j = 0; j < dc_state->stream_status[i].plane_count; j++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3467

dc_state->stream_status[i].plane_states[j]->update_flags.raw

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3477

commit_params.streams = dc_state->streams;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

3478

commit_params.stream_count = dc_state->stream_count;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6865

static void dm_enable_per_frame_crtc_master_sync(struct dc_state *context)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7831

struct dc_state *dc_state = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7840

dc_state = dc_state_create(dc, NULL);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7841

if (!dc_state)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7867

dc_result = dc_state_add_stream(dc, dc_state, stream);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7873

dc_state))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7877

dc_result = dc_validate_global_state(dc, dc_state, DC_VALIDATE_MODE_ONLY);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7880

if (dc_state)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7881

dc_state_release(dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8300

struct dc_state *dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8326

for (j = 0; j < dc_state->stream_count; j++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8327

stream = dc_state->streams[j];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8342

for (j = 0; j < dc_state->stream_count; j++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8349

if (j == dc_state->stream_count || pbn_div == 0)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9788

dc_plane = dm_new_plane_state->dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h

570

struct dc_state *cached_dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h

878

struct dc_plane_state *dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h

992

struct dc_state *context;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1226

struct dc_state *dc_state = ctx->dc->current_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1329

dc_state->bw_ctx.bw.dcn.clk.p_state_change_support = false;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1330

dc_state->bw_ctx.bw.dcn.clk.dramclk_khz = clk_mgr->dc_mode_softmax_enabled ?

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1332

dc_state->bw_ctx.bw.dcn.clk.idle_dramclk_khz = dc_state->bw_ctx.bw.dcn.clk.dramclk_khz;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1335

dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1187

struct dc_state *dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1209

DRM_DEBUG_DRIVER("%s: MST_DSC Try to set up params from %d streams\n", __func__, dc_state->stream_count);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1210

for (i = 0; i < dc_state->stream_count; i++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1213

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1352

struct dc_state *dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1376

DRM_DEBUG_DRIVER("%s: MST_DSC check on %d streams in new dc_state\n", __func__, dc_state->stream_count);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1379

for (i = 0; i < dc_state->stream_count; i++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1383

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1483

struct dc_state *dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1495

for (i = 0; i < dc_state->stream_count; i++)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1498

for (i = 0; i < dc_state->stream_count; i++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1499

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1520

res_pool->funcs->remove_stream_from_ctx(stream->ctx->dc, dc_state, stream) != DC_OK)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1523

if (!is_dsc_need_re_compute(state, dc_state, stream->link))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1527

ret = compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars, mst_mgr,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1532

for (j = 0; j < dc_state->stream_count; j++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1533

if (dc_state->streams[j]->link == stream->link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1538

for (i = 0; i < dc_state->stream_count; i++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1539

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1542

if (dc_stream_add_dsc_to_resource(stream->ctx->dc, dc_state, stream) != DC_OK) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1553

struct dc_state *dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1564

for (i = 0; i < dc_state->stream_count; i++)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1567

for (i = 0; i < dc_state->stream_count; i++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1568

stream = dc_state->streams[i];

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1587

if (!is_dsc_need_re_compute(state, dc_state, stream->link))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1591

ret = compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars, mst_mgr,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1596

for (j = 0; j < dc_state->stream_count; j++) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1597

if (dc_state->streams[j]->link == stream->link)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1663

struct dc_state *local_dc_state = NULL;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1683

local_dc_state = vmalloc(sizeof(struct dc_state));

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

1686

memcpy(local_dc_state, dm_state->context, sizeof(struct dc_state));

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h

84

struct dc_state *dc_state,

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1001

if (dm_plane_state_new->dc_state &&

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1002

dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1004

dm_plane_state_new->dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1245

if (!dm_plane_state->dc_state)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1262

if (dc_validate_plane(dc, dm_plane_state->dc_state) == DC_OK)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1439

if (!dm_plane_state || !dm_plane_state->dc_state)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1442

dc_plane_state = dm_plane_state->dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1496

if (old_dm_plane_state->dc_state) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1497

dm_plane_state->dc_state = old_dm_plane_state->dc_state;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1498

dc_plane_state_retain(dm_plane_state->dc_state);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1603

if (dm_plane_state->dc_state)

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1604

dc_plane_state_release(dm_plane_state->dc_state);

sys/dev/pci/drm/amd/display/dc/clk_mgr/clk_mgr.c

55

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/clk_mgr.c

79

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

165

uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

196

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

390

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

401

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h

37

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h

39

uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

120

const struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

197

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

256

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

92

uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.h

34

const struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.h

40

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.h

42

uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c

192

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c

85

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce60/dce60_clk_mgr.c

110

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dce60/dce60_clk_mgr.c

99

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

188

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

105

struct dc_state *context, bool safe_to_lower)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

127

void dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

217

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

344

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

450

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h

30

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h

34

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h

37

struct dc_state *context, bool safe_to_lower);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h

49

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h

54

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c

85

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

107

struct dc_state *context, int ref_dpp_clk, bool safe_to_lower)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

132

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

55

static int rn_get_active_display_cnt_wa(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

91

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

194

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

64

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

96

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

114

static void dcn31_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disable)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

135

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

638

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

78

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.h

46

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

175

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

211

static void dcn314_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

274

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h

58

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

100

static void dcn315_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disable)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

126

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

59

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

102

static void dcn316_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

136

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

71

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

267

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

315

struct dc_state *context, bool safe_to_lower)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

350

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

508

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

622

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.h

36

struct dc_state *context, bool safe_to_lower);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1196

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1230

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

158

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

189

static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

255

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

281

struct dc_state *context, bool safe_to_lower)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

341

static void dcn35_notify_host_router_bw(struct clk_mgr *clk_mgr_base, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

378

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h

53

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1079

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1219

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1331

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

413

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

525

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

557

struct dc_state *context, bool safe_to_lower, int ref_dppclk_khz)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

615

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

766

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h

56

struct dc_state *context;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h

62

struct dc_state *context;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h

67

struct dc_state *context;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1193

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1202

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

1226

static void dc_update_visual_confirm_color(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1312

static void disable_dangling_plane(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1315

struct dc_state *dangling_context = dc_state_create_current_copy(dc);

sys/dev/pci/drm/amd/display/dc/core/dc.c

1316

struct dc_state *current_ctx;

sys/dev/pci/drm/amd/display/dc/core/dc.c

1422

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1589

struct dc_state *ctx)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1613

struct dc_state *ctx)

sys/dev/pci/drm/amd/display/dc/core/dc.c

181

static int get_seamless_boot_stream_count(struct dc_state *ctx)

sys/dev/pci/drm/amd/display/dc/core/dc.c

1987

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

1995

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

2004

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

2029

void dc_trigger_sync(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

2039

static uint8_t get_stream_mask(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

2072

static void determine_pipe_unlock_order(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

2110

static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

2117

struct dc_state *old_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

2325

struct dc_state *transition_base_context);

sys/dev/pci/drm/amd/display/dc/core/dc.c

2342

struct dc_state *context;

sys/dev/pci/drm/amd/display/dc/core/dc.c

2501

static bool is_flip_pending_in_pipes(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

2544

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

2632

const struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

2801

const struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3064

struct dc_state *ctx,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3223

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3338

struct dc_state *dsc_validate_context = dc_state_create_copy(dc->current_state);

sys/dev/pci/drm/amd/display/dc/core/dc.c

3409

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3456

struct dc_state **new_context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3458

struct dc_state *context;

sys/dev/pci/drm/amd/display/dc/core/dc.c

3591

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3757

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3811

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3893

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

3906

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

3947

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4066

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4604

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4625

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4640

struct dc_state *minimal_transition_context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4641

struct dc_state *base_context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4648

static void force_vsync_flip_in_minimal_transition_context(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4662

static struct dc_state *create_minimal_transition_state(struct dc *dc,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4663

struct dc_state *base_context, struct pipe_split_policy_backup *policy)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4665

struct dc_state *minimal_transition_context = NULL;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4691

struct dc_state *initial_state,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4692

struct dc_state *intermediate_state,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4693

struct dc_state *final_state)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4702

struct dc_state *new_context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4706

struct dc_state *old = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4745

struct dc_state *new_context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4752

struct dc_state *intermediate_context =

sys/dev/pci/drm/amd/display/dc/core/dc.c

4778

struct dc_state *new_context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4782

struct dc_state *intermediate_context;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4783

struct dc_state *old_current_state = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

4852

struct dc_state *new_context,

sys/dev/pci/drm/amd/display/dc/core/dc.c

4887

struct dc_state *transition_base_context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

4889

struct dc_state *transition_context;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5047

const struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5132

struct dc_state *context;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5251

struct dc_state *new_context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

5286

struct dc_state *new_context;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5371

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc.c

5587

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

5679

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc.c

6277

struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc.c

6300

unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_debug.c

186

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

1146

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

1166

void hwss_wait_for_odm_update_pending_complete(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

1188

void hwss_wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

1212

void hwss_wait_for_outstanding_hw_updates(struct dc *dc, struct dc_state *dc_context)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

1258

void hwss_process_outstanding_hw_updates(struct dc *dc, struct dc_state *dc_context)

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

632

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

705

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

730

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

123

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

160

const struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

187

static bool is_avail_link_enc(struct dc_state *state, enum engine_id eng_id, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

226

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

249

static void clear_enc_assignments(const struct dc *dc, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

272

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

279

void link_enc_cfg_copy(const struct dc_state *src_ctx, struct dc_state *dst_ctx)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

288

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

327

struct dc_state *prev_state = dc->current_state;

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

437

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

619

bool link_enc_cfg_validate(struct dc *dc, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

69

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

730

void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state *new_state)

sys/dev/pci/drm/amd/display/dc/core/dc_link_enc_cfg.c

88

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c

519

enum dc_status dc_link_validate_dp_tunneling_bandwidth(const struct dc *dc, const struct dc_state *new_ctx)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

1700

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2216

bool resource_is_pipe_topology_changed(const struct dc_state *state_a,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2217

const struct dc_state *state_b)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2352

static void resource_log_pipe_for_stream(struct dc *dc, struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2390

static int resource_stream_to_stream_idx(struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2410

void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2483

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2506

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2747

static void swap_dio_link_enc_to_muxable_ctx(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2770

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2828

static int get_num_of_free_pipes(const struct resource_pool *pool, const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2839

enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2848

void resource_remove_otg_master_for_stream_output(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2923

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2973

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

2974

struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3019

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3020

struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3047

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3114

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3115

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3194

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3253

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3254

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3316

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3340

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3341

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3375

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3376

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3567

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3781

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3782

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3862

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

3994

static bool planes_changed_for_existing_stream(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4036

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4077

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4312

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

4835

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5256

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5284

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5318

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5435

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5489

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5535

static bool resource_allocate_mcache(struct dc_state *context, const struct dc_mcache_params *mcache_params)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5582

int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master)

sys/dev/pci/drm/amd/display/dc/core/dc_resource.c

5609

bool resource_is_hpo_acquired(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1002

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1018

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1031

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1047

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

1067

bool dc_state_is_subvp_in_use(struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

107

static bool dc_state_untrack_phantom_plane(struct dc_state *state, struct dc_plane_state *phantom_plane)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

133

static bool dc_state_is_phantom_plane_tracked(struct dc_state *state, struct dc_plane_state *phantom_plane)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

145

static void dc_state_copy_internal(struct dc_state *dst_state, struct dc_state *src_state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

149

memcpy(dst_state, src_state, sizeof(struct dc_state));

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

184

static void init_state(struct dc *dc, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

194

struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *params)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

196

struct dc_state *state;

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

198

state = kvzalloc(sizeof(struct dc_state), GFP_KERNEL);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

226

void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

250

struct dc_state *dc_state_create_copy(struct dc_state *src_state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

252

struct dc_state *new_state;

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

254

new_state = kvmalloc(sizeof(struct dc_state),

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

283

void dc_state_copy_current(struct dc *dc, struct dc_state *dst_state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

288

struct dc_state *dc_state_create_current_copy(struct dc *dc)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

293

void dc_state_construct(struct dc *dc, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

302

void dc_state_destruct(struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

343

void dc_state_retain(struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

350

struct dc_state *state = container_of(kref, struct dc_state, refcount);

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

365

void dc_state_release(struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

375

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

404

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

451

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

452

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

467

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

47

static bool dc_state_track_phantom_stream(struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

535

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

58

static bool dc_state_untrack_phantom_stream(struct dc_state *state, struct dc_stream_state *phantom_stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

595

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

629

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

654

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

670

enum mall_stream_type dc_state_get_pipe_subvp_type(const struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

676

enum mall_stream_type dc_state_get_stream_subvp_type(const struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

693

struct dc_stream_state *dc_state_get_paired_subvp_stream(const struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

711

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

736

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

750

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

771

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

786

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

821

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

84

static bool dc_state_is_phantom_stream_tracked(struct dc_state *state, struct dc_stream_state *phantom_stream)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

848

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

865

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

873

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

911

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

918

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

940

struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

958

struct dc_stream_state *dc_state_get_stream_from_id(const struct dc_state *state, unsigned int id)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

96

static bool dc_state_track_phantom_plane(struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

975

const struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/core/dc_state.c

989

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

272

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_stream.c

804

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/core/dc_surface.c

68

uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state)

sys/dev/pci/drm/amd/display/dc/core/dc_surface.c

74

struct pipe_ctx *pipe_ctx = &dc_state->res_ctx.pipe_ctx[i];

sys/dev/pci/drm/amd/display/dc/dc.h

1717

struct dc_state *current_state;

sys/dev/pci/drm/amd/display/dc/dc.h

1896

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc.h

1904

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/dc.h

2506

enum dc_status dc_link_validate_dp_tunneling_bandwidth(const struct dc *dc, const struct dc_state *new_ctx);

sys/dev/pci/drm/amd/display/dc/dc.h

2718

struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dc.h

2720

unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dc.h

461

struct dc_state;

sys/dev/pci/drm/amd/display/dc/dc.h

467

bool (*get_subvp_en)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dc.h

929

struct dc_state;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1692

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1758

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1805

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1841

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

420

static void dc_dmub_srv_populate_fams_pipe_info(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

438

bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool should_manage_pstate, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

576

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

655

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

711

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

776

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

871

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h

197

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h

208

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h

37

struct dc_state;

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h

89

bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool enable_pstate, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h

99

void dc_dmub_setup_subvp_dmub_command(struct dc *dc, struct dc_state *context, bool enable);

sys/dev/pci/drm/amd/display/dc/dc_plane_priv.h

33

uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

31

struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *params);

sys/dev/pci/drm/amd/display/dc/dc_state.h

32

void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

33

struct dc_state *dc_state_create_copy(struct dc_state *src_state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

34

void dc_state_copy_current(struct dc *dc, struct dc_state *dst_state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

35

struct dc_state *dc_state_create_current_copy(struct dc *dc);

sys/dev/pci/drm/amd/display/dc/dc_state.h

36

void dc_state_construct(struct dc *dc, struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

37

void dc_state_destruct(struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

38

void dc_state_retain(struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

39

void dc_state_release(struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

42

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state.h

47

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state.h

54

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

60

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

65

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

72

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state.h

75

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

102

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

106

const struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

110

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

114

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

117

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

121

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

124

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

126

bool dc_state_is_subvp_in_use(struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

32

struct dc_stream_state *dc_state_get_stream_from_id(const struct dc_state *state, unsigned int id);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

37

enum mall_stream_type dc_state_get_pipe_subvp_type(const struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

39

enum mall_stream_type dc_state_get_stream_subvp_type(const struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

43

struct dc_stream_state *dc_state_get_paired_subvp_stream(const struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

48

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

51

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

56

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

59

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

64

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

68

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

75

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

81

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

86

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

94

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_state_priv.h

98

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

408

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

452

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

469

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

474

void dc_trigger_sync(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dc_stream.h

513

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dc_stream.h

602

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

184

static uint32_t get_max_pixel_clock_for_all_paths(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

215

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

496

const struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

548

static uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

600

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

614

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

673

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

700

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

727

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dce/dce_clk_mgr.c

754

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

556

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

705

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c

750

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1030

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1045

static bool is_dtbclk_required(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1057

static enum dcn_zstate_support_state decide_zstate_support(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1141

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1315

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1730

void dcn20_calculate_wm(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2028

static bool dcn20_validate_bandwidth_internal(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2078

bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2155

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2235

static void dcn21_calculate_wm(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2319

bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h

36

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h

40

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h

45

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h

49

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h

64

bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h

76

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h

79

bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, enum

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

289

void dcn30_fpu_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

304

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

621

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

41

void dcn30_fpu_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

44

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h

64

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

427

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h

37

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

454

void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

465

void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

483

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h

38

void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h

39

void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h

42

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.h

56

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

307

int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn314/dcn314_fpu.h

36

int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1038

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1093

static void assign_subvp_index(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1169

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1201

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1267

static void update_pipes_with_slice_table(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1285

static bool update_pipes_with_split_flags(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1301

struct dc_state *context, struct vba_vars_st *v, int *split,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1395

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1425

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1438

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1600

static bool is_dtbclk_required(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1645

static void dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1811

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

183

static bool dcn32_apply_merge_split_flags_helper(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1939

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2139

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2302

void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

276

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

334

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3433

bool dcn32_allow_subvp_high_refresh_rate(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3489

double dcn32_determine_max_vratio_prefetch(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3523

void dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *context, struct dc_stream_state **fpo_candidate_stream)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3560

bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, struct dc_stream_state *fpo_candidate_stream, uint32_t vactive_margin_req_us)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3600

void dcn32_override_min_req_memclk(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

467

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

558

static unsigned int dcn32_get_num_free_pipes(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

600

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

680

static bool dcn32_enough_pipes_for_subvp(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

726

static bool subvp_subvp_schedulable(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

797

static bool subvp_drr_schedulable(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

898

static bool subvp_vblank_schedulable(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

986

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

35

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

40

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

48

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

54

void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

62

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

72

void dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *context, struct dc_stream_state **fpo_candidate_stream);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

74

bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, struct dc_stream_state *fpo_candidate_stream, uint32_t vactive_margin_req);

sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.h

76

void dcn32_override_min_req_memclk(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

438

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

578

void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.h

38

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn35/dcn35_fpu.h

42

void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

471

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

611

void dcn351_decide_zstate_support(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.h

13

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml/dcn351/dcn351_fpu.h

17

void dcn351_decide_zstate_support(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

469

const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

498

const struct dc_state *context, unsigned int stream_index)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

644

static bool dml21_wrapper_get_plane_id(const struct dc_state *context, unsigned int stream_id, const struct dc_plane_state *plane, unsigned int *plane_id)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

681

const struct dc_plane_state *plane, const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

727

bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

804

void dml21_copy_clocks_to_dc_state(struct dml2_context *in_ctx, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

882

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h

10

struct dc_state;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h

21

bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h

22

void dml21_copy_clocks_to_dc_state(struct dml2_context *in_ctx, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h

25

void dml21_get_pipe_mcache_config(struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog, struct dml2_pipe_configuration_descriptor *mcache_pipe_config);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h

27

unsigned int map_plane_to_dml21_display_cfg(const struct dml2_context *dml_ctx, unsigned int stream_id, const struct dc_plane_state *plane, const struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

146

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

162

void dml21_populate_mall_allocation_size(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

196

static bool is_sub_vp_enabled(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

212

void dml21_program_dc_pipe(struct dml2_context *dml_ctx, struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

243

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

280

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

320

void dml21_handle_phantom_streams_planes(const struct dc *dc, struct dc_state *context, struct dml2_context *dml_ctx)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

36

bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

378

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

85

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

20

bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

22

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

25

void dml21_populate_mall_allocation_size(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

34

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

40

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

44

void dml21_handle_phantom_streams_planes(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

47

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

9

struct dc_state;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

175

static void dml21_prepare_mcache_params(struct dml2_context *dml_ctx, struct dc_state *context, struct dc_mcache_params *mcache_params)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

204

static bool dml21_mode_check_and_programming(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

266

static bool dml21_check_mode_support(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

297

bool dml21_validate(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

311

void dml21_prepare_mcache_programming(struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx)

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

87

static void dml21_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *context, struct resource_context *out_new_hw_state,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h

14

struct dc_state;

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h

61

bool dml21_validate(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx,

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h

65

void dml21_prepare_mcache_programming(struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1013

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1016

const struct dc_state *existing_state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1035

bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const struct dml_display_cfg_st *disp_cfg, struct dml2_dml_to_dc_pipe_mapping *mapping, const struct dc_state *existing_state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

109

static struct pipe_ctx *find_master_pipe_of_stream(struct dml2_context *ctx, struct dc_state *state, unsigned int stream_id)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

124

struct dc_state *state, unsigned int plane_id)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

142

struct dc_state *state, unsigned int plane_id, unsigned int *pipes)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

179

static bool validate_pipe_assignment(const struct dml2_context *ctx, const struct dc_state *state, const struct dml_display_cfg_st *disp_cfg, const struct dml2_dml_to_dc_pipe_mapping *mapping)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

243

static unsigned int find_preferred_pipe_candidates(const struct dc_state *existing_state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

290

static unsigned int find_last_resort_pipe_candidates(const struct dc_state *existing_state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

341

struct dc_state *state, // The state we want to find a free mapping in

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

346

const struct dc_state *existing_state) // The state (optional) that we want to minimize remapping relative to

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

407

struct dc_state *state, // The state we want to find a free mapping in

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

412

const struct dc_state *existing_state) // The state (optional) that we want to minimize remapping relative to

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

534

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

558

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

58

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

583

static unsigned int find_pipes_assigned_to_stream(struct dml2_context *ctx, struct dc_state *state, unsigned int stream_id, unsigned int *pipes)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

603

static struct pipe_ctx *assign_pipes_to_stream(struct dml2_context *ctx, struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

607

const struct dc_state *existing_state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

637

static struct pipe_ctx *assign_pipes_to_plane(struct dml2_context *ctx, struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

644

const struct dc_state *existing_state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

700

static void free_unused_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

717

static void remove_pipes_from_blend_trees(struct dml2_context *ctx, struct dc_state *state, struct dc_plane_pipe_pool *pipe_pool, unsigned int odm_slice)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

734

static void map_pipes_for_stream(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

735

struct dc_pipe_mapping_scratch *scratch, const struct dc_state *existing_state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

754

static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

755

int plane_index, struct dc_pipe_mapping_scratch *scratch, const struct dc_state *existing_state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

792

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

850

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

896

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

908

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

924

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

942

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

955

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

956

const struct dc_state *existing_state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

984

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

985

const struct dc_state *existing_state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.h

50

bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const struct dml_display_cfg_st *disp_cfg, struct dml2_dml_to_dc_pipe_mapping *mapping, const struct dc_state *existing_state);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

101

static void merge_pipes_for_subvp(struct dml2_context *ctx, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

146

static bool all_pipes_have_stream_and_plane(struct dml2_context *ctx, const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

162

static bool mpo_in_use(const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

185

static unsigned int get_num_free_pipes(struct dml2_context *ctx, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

228

static bool assign_subvp_pipe(struct dml2_context *ctx, struct dc_state *context, unsigned int *index)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

309

static bool enough_pipes_for_subvp(struct dml2_context *ctx, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

32

unsigned int dml2_helper_calculate_num_ways_for_subvp(struct dml2_context *ctx, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

357

static bool subvp_subvp_schedulable(struct dml2_context *ctx, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

431

bool dml2_svp_drr_schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_timing *drr_timing)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

507

static bool subvp_vblank_schedulable(struct dml2_context *ctx, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

601

bool dml2_svp_validate_static_schedulability(struct dml2_context *ctx, struct dc_state *context, enum dml_dram_clock_change_support pstate_change_type)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

650

static void set_phantom_stream_timing(struct dml2_context *ctx, struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

713

static struct dc_stream_state *enable_phantom_stream(struct dml2_context *ctx, struct dc_state *state, unsigned int dc_pipe_idx, unsigned int svp_height, unsigned int vstartup)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

735

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

782

static void add_phantom_pipes_for_main_pipe(struct dml2_context *ctx, struct dc_state *state, unsigned int main_pipe_idx, unsigned int svp_height, unsigned int vstartup)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

810

static bool remove_all_phantom_planes_for_stream(struct dml2_context *ctx, struct dc_stream_state *stream, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

840

bool dml2_svp_remove_all_phantom_pipes(struct dml2_context *ctx, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c

874

bool dml2_svp_add_phantom_pipe_to_dc_state(struct dml2_context *ctx, struct dc_state *state, struct dml_mode_support_info_st *mode_support_info)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.h

42

unsigned int dml2_helper_calculate_num_ways_for_subvp(struct dml2_context *ctx, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.h

44

bool dml2_svp_add_phantom_pipe_to_dc_state(struct dml2_context *ctx, struct dc_state *state, struct dml_mode_support_info_st *mode_support_info);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.h

46

bool dml2_svp_remove_all_phantom_pipes(struct dml2_context *ctx, struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.h

48

bool dml2_svp_validate_static_schedulability(struct dml2_context *ctx, struct dc_state *context, enum dml_dram_clock_change_support pstate_change_type);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.h

50

bool dml2_svp_drr_schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_timing *drr_timing);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1060

const struct dc_plane_state *in, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1146

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *context, const struct dc_plane_state *plane,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1171

const struct dc_state *context, const struct dml_display_cfg_st *dml_dispcfg, unsigned int stream_id, int plane_index)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1192

static void dml2_populate_pipe_to_plane_index_mapping(struct dml2_context *dml2, struct dc_state *state)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1267

static void dml2_map_hpo_stream_encoder_to_hpo_link_encoder_index(struct dml2_context *dml2, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1290

void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_state *context, struct dml_display_cfg_st *dml_dispcfg)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

979

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.h

37

void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_state *context, struct dml_display_cfg_st *dml_dispcfg);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

169

bool is_dtbclk_required(const struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

182

void dml2_copy_clocks_to_dc_state(struct dml2_dcn_clocks *out_clks, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

216

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

279

void dml2_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *context, struct resource_context *out_new_hw_state, struct dml2_context *in_ctx, unsigned int pipe_cnt)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

414

void dml2_extract_writeback_wm(struct dc_state *context, struct display_mode_lib_st *dml_core_ctx)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

511

bool dml2_verify_det_buffer_configuration(struct dml2_context *in_ctx, struct dc_state *display_state, struct dml2_helper_det_policy_scratch *det_scratch)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

122

void dml2_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *context, struct resource_context *out_new_hw_state, struct dml2_context *in_ctx, unsigned int pipe_cnt);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

141

bool dml2_verify_det_buffer_configuration(struct dml2_context *in_ctx, struct dc_state *display_state, struct dml2_helper_det_policy_scratch *det_scratch);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

34

struct dc_state;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

41

void dml2_copy_clocks_to_dc_state(struct dml2_dcn_clocks *out_clks, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

43

void dml2_extract_writeback_wm(struct dc_state *context, struct display_mode_lib_st *dml_core_ctx);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

45

bool is_dtbclk_required(const struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

71

void dml2_dc_construct_pipes(struct dc_state *context, struct dml_mode_support_info_st *dml_mode_support_st,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

84

bool dml2_predict_pipe_split(struct dc_state *context, display_pipe_params_st pipe, int index);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h

96

enum dc_status dml2_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

157

static int calculate_lowest_supported_state_for_temp_read(struct dml2_context *dml2, struct dc_state *display_state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

266

struct dc_state *display_state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

356

static bool call_dml_mode_support_and_programming(struct dc_state *context, enum dc_validate_mode validate_mode)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

398

static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

508

static bool dml2_validate_only(struct dc_state *context, enum dc_validate_mode validate_mode)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

548

bool dml2_validate(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml2,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

660

void dml2_prepare_mcache_programming(struct dc *in_dc, struct dc_state *context, struct dml2_context *dml2)

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

105

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

107

struct dc_stream_state *(*get_stream_from_id)(const struct dc_state *state, unsigned int id);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

111

bool (*allocate_mcache)(struct dc_state *context, const struct dc_mcache_params *mcache_params);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

118

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

121

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

124

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

127

bool (*add_phantom_plane)(const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state *plane_state, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

131

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

133

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

136

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

139

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

142

enum mall_stream_type (*get_pipe_subvp_type)(const struct dc_state *state, const struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

143

enum mall_stream_type (*get_stream_subvp_type)(const struct dc_state *state, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

144

struct dc_stream_state *(*get_paired_subvp_stream)(const struct dc_state *state, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

147

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

150

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

296

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

308

void dml2_prepare_mcache_programming(struct dc *in_dc, struct dc_state *context, struct dml2_context *dml2);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

76

bool (*can_support_mclk_switch_using_fw_based_vblank_stretch)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

77

bool (*acquire_secondary_pipe_for_mpc_odm)(const struct dc *dc, struct dc_state *state, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

79

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

80

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

85

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h

86

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

110

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

122

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce100/dce100_hwseq.h

33

struct dc_state;

sys/dev/pci/drm/amd/display/dc/hwss/dce100/dce100_hwseq.h

39

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dce100/dce100_hwseq.h

43

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1386

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1518

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1583

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1821

static void get_edp_streams(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1908

void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2049

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2200

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2266

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2290

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2362

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2453

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2723

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2803

static void dce110_init_pipes(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2889

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2903

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3030

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3068

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3072

static void dce110_power_down_fe(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

114

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

123

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

33

struct dc_state;

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

40

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

44

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

62

void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

72

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

76

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

116

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

385

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

51

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1180

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1284

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1441

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1553

void dcn10_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1569

void dcn10_init_pipes(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1948

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

220

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2540

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2733

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2980

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3204

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3251

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3284

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3315

static void dcn10_stereo_hw_frame_pack_wa(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3333

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3371

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4056

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4094

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

110

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

113

void dcn10_init_pipes(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

117

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

119

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

124

void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

127

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

203

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

206

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

45

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

49

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

52

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

84

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

85

void dcn10_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

88

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

92

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1191

void dcn20_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1313

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1491

void dcn20_detect_pipe_changes(struct dc_state *old_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1492

struct dc_state *new_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1682

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1906

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1930

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2046

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2246

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2376

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2427

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2486

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2540

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2812

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2903

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3136

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

750

void dcn20_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

833

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

117

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

121

void dcn20_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

158

struct dc_state *old_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

159

struct dc_state *new_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

165

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

169

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

39

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

42

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

57

void dcn20_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

72

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

75

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

78

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

81

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

84

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

92

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

229

struct dc_state *context = dc->current_state;

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

376

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.h

36

void dcn201_plane_atomic_disconnect(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

100

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

110

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

129

void dcn21_PLAT_58856_wa(struct dc_state *context, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

289

struct dc_state *context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h

41

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h

45

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h

47

void dcn21_PLAT_58856_wa(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h

57

struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1188

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

430

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

453

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

527

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

575

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

38

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

42

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

46

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

98

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

514

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

615

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h

53

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h

57

struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h

58

void dcn31_init_pipes(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

172

void dcn314_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

365

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

398

void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, unsigned int current_pipe_idx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.h

34

void dcn314_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.h

42

void dcn314_calculate_pix_rate_divider(struct dc *dc, struct dc_state *context, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.h

44

void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, unsigned int current_pipe_idx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1131

void dcn32_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1223

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1243

void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, unsigned int current_pipe_idx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1248

struct dc_state *dc_state = NULL;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1253

dc_state = context;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1256

dc_state = dc->current_state;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1263

&& dc_state_get_pipe_subvp_type(dc_state, pipe) != SUBVP_PHANTOM) {

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1429

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1514

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1536

void dcn32_disable_phantom_streams(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1569

void dcn32_enable_phantom_streams(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1718

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1719

const struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1736

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1737

const struct dc_state *new_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1789

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1819

struct dc_state *context, bool lock)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1842

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

220

static uint32_t dcn32_calculate_cab_allocation(struct dc *dc, struct dc_state *ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

345

void dcn32_commit_subvp_config(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

372

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

600

void dcn32_update_force_pstate(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

667

void dcn32_update_mall_sel(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

721

void dcn32_program_mall_pipe_config(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

101

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

111

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

114

void dcn32_enable_phantom_streams(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

116

void dcn32_disable_phantom_streams(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

123

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

124

const struct dc_state *new_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

127

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

130

struct dc_state *context, bool lock);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

133

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

48

void dcn32_commit_subvp_config(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

66

void dcn32_program_mall_pipe_config(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

68

void dcn32_update_mall_sel(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

70

void dcn32_update_force_pstate(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

72

void dcn32_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

78

void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, unsigned int current_pipe_idx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

81

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

94

void dcn32_calculate_pix_rate_divider(struct dc *dc, struct dc_state *context, const struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1026

void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1360

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1381

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

428

void dcn35_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

620

void dcn35_init_pipes(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

816

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

898

void dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

922

void dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

34

void dcn35_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

60

void dcn35_init_pipes(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

63

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

64

void dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

66

void dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

68

void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

79

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

83

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

38

void dcn351_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

58

void dcn351_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

32

void dcn351_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

34

void dcn351_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1240

static uint32_t dcn401_calculate_cab_allocation(struct dc *dc, struct dc_state *ctx)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1371

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1430

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1479

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1511

void dcn401_fams2_update_config(struct dc *dc, struct dc_state *context, bool enable)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1523

static void update_dsc_for_odm_change(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1562

void dcn401_update_odm(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1664

void dcn401_wait_for_det_buffer_update_under_otg_master(struct dc *dc, struct dc_state *context, struct pipe_ctx *otg_master)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1698

struct dc_state *context, bool lock)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1802

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1814

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1901

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1961

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1985

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2100

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2266

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2401

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2452

void dcn401_detect_pipe_changes(struct dc_state *old_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2453

struct dc_state *new_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

719

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

759

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

101

void dcn401_program_front_end_for_ctx(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

102

void dcn401_post_unlock_program_front_end(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

103

bool dcn401_update_bandwidth(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

105

struct dc_state *old_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

106

struct dc_state *new_state,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

49

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

70

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

74

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

77

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

79

void dcn401_fams2_update_config(struct dc *dc, struct dc_state *context, bool enable);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

83

void dcn401_update_odm(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

86

void dcn401_wait_for_det_buffer_update_under_otg_master(struct dc *dc, struct dc_state *context, struct pipe_ctx *otg_master);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

87

void dcn401_interdependent_update_lock(struct dc *dc, struct dc_state *context, bool lock);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

88

void dcn401_program_outstanding_updates(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

92

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

95

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

99

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

221

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

223

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

224

void (*disable_plane)(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

228

int num_planes, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

230

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

232

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

234

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

248

void (*update_dsc_pg)(struct dc *dc, struct dc_state *context, bool safe_to_disable);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

255

struct dc_state *context, bool lock);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

272

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

294

void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

295

bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

296

void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

333

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

336

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

347

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

349

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

351

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

36

struct dc_state;

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

405

void (*commit_subvp_config)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

406

void (*enable_phantom_streams)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

407

void (*disable_phantom_streams)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

409

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

419

struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

436

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

440

void (*calc_blocks_to_gate)(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

442

void (*calc_blocks_to_ungate)(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

451

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

452

const struct dc_state *new_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

456

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

459

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

464

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

467

void (*detect_pipe_changes)(struct dc_state *old_state,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

468

struct dc_state *new_state,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

473

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

476

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

520

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

539

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

558

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

561

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

564

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

567

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

570

struct dc_state *dc_context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

573

struct dc_state *dc_context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

102

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

141

void (*update_odm)(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

145

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

151

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

160

void (*PLAT_58856_wa)(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

164

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

165

void (*program_mall_pipe_config)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

166

void (*update_force_pstate)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

167

void (*update_mall_sel)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

172

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

176

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

181

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

56

struct dc_state;

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

78

void (*init_pipes)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

79

void (*reset_hw_ctx_wrap)(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h

81

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

101

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

110

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

122

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

132

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

137

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

140

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

141

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

146

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

147

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

151

void (*release_pipe)(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

161

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

166

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

184

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

205

struct dc *dc, struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

210

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

220

int (*get_power_profile)(const struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

221

unsigned int (*get_det_buffer_size)(const struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

224

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

226

bool (*program_mcache_pipe_config)(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

65

struct dc_state;

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

86

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

89

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/core_types.h

94

struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/dce_calcs.h

37

struct dc_state;

sys/dev/pci/drm/amd/display/dc/inc/dcn_calcs.h

38

struct dc_state;

sys/dev/pci/drm/amd/display/dc/inc/dcn_calcs.h

624

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr.h

286

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr.h

303

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

466

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

470

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

111

bool link_enc_cfg_validate(struct dc *dc, struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

118

void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state *new_state);

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

40

struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

45

void link_enc_cfg_copy(const struct dc_state *src_ctx, struct dc_state *dst_ctx);

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

59

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/link_enc_cfg.h

70

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/link_service.h

149

const struct dc_state *new_ctx);

sys/dev/pci/drm/amd/display/dc/inc/link_service.h

157

void (*set_dpms_on)(struct dc_state *state, struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

110

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

121

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

160

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

292

enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

301

void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

311

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

312

struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

323

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

343

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

344

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

367

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

368

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

466

bool resource_is_pipe_topology_changed(const struct dc_state *state_a,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

467

const struct dc_state *state_b);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

480

void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

573

const struct dc_state *old_context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

574

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

579

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

584

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

607

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

610

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

614

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

626

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

637

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/inc/resource.h

654

int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master);

sys/dev/pci/drm/amd/display/dc/inc/resource.h

656

bool resource_is_hpo_acquired(struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c

70

struct dc_state *state = link->dc->current_state;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

153

struct dc_state *state = link->dc->current_state;

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2036

static enum dc_status enable_link_dp(struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

207

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2160

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2186

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2227

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

2456

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.h

31

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_dpms.h

40

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

370

static const struct dc_tunnel_settings *get_dp_tunnel_settings(const struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/link/link_validation.c

392

enum dc_status link_validate_dp_tunnel_bandwidth(const struct dc *dc, const struct dc_state *new_ctx)

sys/dev/pci/drm/amd/display/dc/link/link_validation.h

35

const struct dc_state *new_ctx);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c

268

struct dc_state *state = link->dc->current_state;

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

825

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

842

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

882

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

903

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c

913

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h

46

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h

50

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h

55

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1048

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1094

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1104

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1122

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

1123

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

942

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c

965

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

1015

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

1034

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

871

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

888

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

960

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c

994

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.h

42

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.h

43

struct dc_state *old_context);

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.h

47

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.h

52

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1048

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1062

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1080

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1081

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1131

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1153

static enum dc_status dcn10_validate_global(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1310

enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1377

struct dc_state *dc_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1411

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1433

enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1453

enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1595

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1643

bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1758

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1817

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2005

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2127

enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2146

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2147

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2210

void dcn20_release_pipe(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

119

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

122

enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, enum dc_validate_mode validate_mode);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

125

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

128

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

135

bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

156

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

163

enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

164

enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

165

enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_stream_state *dc_stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

166

enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

62

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

63

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

66

void dcn20_release_pipe(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1000

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1001

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

767

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

926

static enum dc_status dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.h

49

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1280

enum dc_status dcn30_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1320

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1375

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1584

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1626

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1883

static int get_refresh_rate(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1912

static int get_frame_rate_at_max_stretch_100hz(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1942

static bool is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1959

bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2010

void dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2020

void dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2028

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2039

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

103

bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

104

void dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

105

int dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

50

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

59

enum dc_status dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

63

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

70

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

74

void dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

79

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h

98

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1374

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1617

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1642

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1724

const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1730

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1752

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1762

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2245

struct dc_state *state = link->dc->current_state;

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h

41

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h

44

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h

49

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h

58

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h

67

const struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1670

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1700

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.h

43

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1634

static bool allow_pixel_rate_crb(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1665

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1812

static int dcn315_get_power_profile(const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1611

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1641

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1685

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1712

void dcn32_add_phantom_pipes(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1746

static bool dml1_validate(struct dc *dc, struct dc_state *context, enum dc_validate_mode validate_mode)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1815

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1867

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2056

void dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2082

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2727

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2799

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2800

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2836

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2837

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

102

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

106

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

111

struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

123

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

126

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

129

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

132

struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

134

bool dcn32_mpo_in_use(struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

136

bool dcn32_any_surfaces_rotated(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

147

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

148

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

153

const struct dc_state *cur_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

154

struct dc_state *new_ctx,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

158

void dcn32_release_pipe(struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

163

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

166

void dcn32_set_det_allocations(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

169

struct dc_stream_state *dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

173

bool dcn32_allow_subvp_high_refresh_rate(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

177

double dcn32_determine_max_vratio_prefetch(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

181

bool dcn32_subvp_drr_admissable(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

183

bool dcn32_subvp_vblank_admissable(struct dc *dc, struct dc_state *context, int vlevel);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

185

void dcn32_update_dml_pipes_odm_policy_based_on_context(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

187

void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

192

struct dc_state *state,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

96

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

108

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

154

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

171

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

184

bool dcn32_mpo_in_use(struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

196

bool dcn32_any_surfaces_rotated(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

243

static void override_det_for_subvp(struct dc *dc, struct dc_state *context, uint8_t pipe_segments[])

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

312

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

381

void dcn32_set_det_allocations(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

515

struct dc_stream_state *dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

644

bool dcn32_subvp_drr_admissable(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

704

bool dcn32_subvp_vblank_admissable(struct dc *dc, struct dc_state *context, int vlevel)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

750

void dcn32_update_dml_pipes_odm_policy_based_on_context(struct dc *dc, struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

776

void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

92

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1736

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1764

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1716

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1736

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1717

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1738

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1638

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1686

struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1756

static int dcn401_get_power_profile(const struct dc_state *context)

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h

26

struct dc_state *context,

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h

29

void dcn401_prepare_mcache_programming(struct dc *dc, struct dc_state *context);

sys/dev/pci/drm/amd/display/include/logger_interface.h

35

struct dc_state;

sys/dev/pci/drm/amd/display/include/logger_interface.h

52

struct dc_state *context);

sys/dev/pci/drm/amd/display/modules/power/power_helpers.c

938

bool mod_power_only_edp(const struct dc_state *context, const struct dc_stream_state *stream)

sys/dev/pci/drm/amd/display/modules/power/power_helpers.h

73

bool mod_power_only_edp(const struct dc_state *context,

sys/dev/pci/drm/i915/display/intel_display_power.h

141

u32 dc_state;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

1007

u32 old_state = power_domains->dc_state;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

744

power_domains->dc_state, val);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

745

power_domains->dc_state = val;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

794

if ((val & mask) != power_domains->dc_state)

sys/dev/pci/drm/i915/display/intel_display_power_well.c

796

power_domains->dc_state, val & mask);

sys/dev/pci/drm/i915/display/intel_display_power_well.c

799

dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_display_power_well.c

811

power_domains->dc_state = val & mask;

sys/dev/pci/drm/i915/display/intel_dmc.c

1574

dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

sys/dev/pci/drm/i915/display/intel_dmc.c

907

power_domains->dc_state = 0;

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

245

u32 dc_state)

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

263

switch (dc_state) {

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

343

void intel_dmc_wl_enable(struct intel_display *display, u32 dc_state)

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

353

wl->dc_state = dc_state;

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

446

!intel_dmc_wl_check_range(display, reg, wl->dc_state))

sys/dev/pci/drm/i915/display/intel_dmc_wl.c

479

!intel_dmc_wl_check_range(display, reg, wl->dc_state))

sys/dev/pci/drm/i915/display/intel_dmc_wl.h

28

u32 dc_state;

sys/dev/pci/drm/i915/display/intel_dmc_wl.h

33

void intel_dmc_wl_enable(struct intel_display *display, u32 dc_state);