Symbol: dc_plane_state
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
11837
struct dc_plane_state *dc_new_plane_state;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6153
struct dc_plane_state *dc_plane_state,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6167
dc_plane_state->src_rect = scaling_info.src_rect;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6168
dc_plane_state->dst_rect = scaling_info.dst_rect;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6169
dc_plane_state->clip_rect = scaling_info.clip_rect;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6170
dc_plane_state->scaling_quality = scaling_info.scaling_quality;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6175
&dc_plane_state->address,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6180
dc_plane_state->format = plane_info.format;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6181
dc_plane_state->color_space = plane_info.color_space;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6182
dc_plane_state->format = plane_info.format;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6183
dc_plane_state->plane_size = plane_info.plane_size;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6184
dc_plane_state->rotation = plane_info.rotation;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6185
dc_plane_state->horizontal_mirror = plane_info.horizontal_mirror;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6186
dc_plane_state->stereo_format = plane_info.stereo_format;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6187
dc_plane_state->tiling_info = plane_info.tiling_info;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6188
dc_plane_state->visible = plane_info.visible;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6189
dc_plane_state->per_pixel_alpha = plane_info.per_pixel_alpha;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6190
dc_plane_state->pre_multiplied_alpha = plane_info.pre_multiplied_alpha;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6191
dc_plane_state->global_alpha = plane_info.global_alpha;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6192
dc_plane_state->global_alpha_value = plane_info.global_alpha_value;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6193
dc_plane_state->dcc = plane_info.dcc;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6194
dc_plane_state->layer_index = plane_info.layer_index;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6195
dc_plane_state->flip_int_enabled = true;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
6203
dc_plane_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7830
struct dc_plane_state *dc_plane_state = NULL;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7836
dc_plane_state = dc_create_plane_state(dc);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7837
if (!dc_plane_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7845
dc_plane_state->src_rect.height = stream->src.height;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7846
dc_plane_state->src_rect.width = stream->src.width;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7847
dc_plane_state->dst_rect.height = stream->src.height;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7848
dc_plane_state->dst_rect.width = stream->src.width;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7849
dc_plane_state->clip_rect.height = stream->src.height;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7850
dc_plane_state->clip_rect.width = stream->src.width;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7851
dc_plane_state->plane_size.surface_pitch = ((stream->src.width + 255) / 256) * 256;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7852
dc_plane_state->plane_size.surface_size.height = stream->src.height;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7853
dc_plane_state->plane_size.surface_size.width = stream->src.width;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7854
dc_plane_state->plane_size.chroma_size.height = stream->src.height;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7855
dc_plane_state->plane_size.chroma_size.width = stream->src.width;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7856
dc_plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ARGB8888;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7857
dc_plane_state->tiling_info.gfx9.swizzle = DC_SW_UNKNOWN;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7858
dc_plane_state->rotation = ROTATION_ANGLE_0;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7859
dc_plane_state->is_tiling_rotated = false;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7860
dc_plane_state->tiling_info.gfx8.array_mode = DC_ARRAY_LINEAR_GENERAL;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7864
dc_result = dc_validate_plane(dc, dc_plane_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7872
dc_plane_state,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7883
if (dc_plane_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7884
dc_plane_state_release(dc_plane_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9369
struct dc_plane_state *surface,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
9765
struct dc_plane_state *dc_plane;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h
1064
struct dc_plane_state *dc_plane_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h
87
struct dc_plane_state;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.h
878
struct dc_plane_state *dc_state;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1053
struct dc_plane_state *dc_plane_state,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1062
switch (dc_plane_state->format) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1077
dc_plane_state->in_transfer_func.type = TF_TYPE_DISTRIBUTED_POINTS;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1104
dc_plane_state->in_transfer_func.tf = tf;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1106
dc_plane_state->in_transfer_func.tf =
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1109
r = __set_input_tf(caps, &dc_plane_state->in_transfer_func,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1118
dc_plane_state->in_transfer_func.type = TF_TYPE_PREDEFINED;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1119
dc_plane_state->in_transfer_func.tf = tf;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1123
&dc_plane_state->in_transfer_func,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1133
struct dc_plane_state *dc_plane_state,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1157
dc_plane_state->in_transfer_func.tf = amdgpu_tf_to_dc_tf(tf);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1162
dc_plane_state->in_transfer_func.type =
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1165
ret = __set_input_tf(color_caps, &dc_plane_state->in_transfer_func,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1170
dc_plane_state->in_transfer_func.type =
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1174
&dc_plane_state->in_transfer_func, NULL, false))
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1182
struct dc_plane_state *dc_plane_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1191
dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(dm_plane_state->hdr_mult);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1199
amdgpu_dm_atomic_lut3d(lut3d, lut3d_size, &dc_plane_state->lut3d_func);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1203
&dc_plane_state->in_shaper_func);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1218
blend_size, &dc_plane_state->blend_tf);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1245
struct dc_plane_state *dc_plane_state)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1260
if (dc_plane_state->ctx && dc_plane_state->ctx->dc)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1261
color_caps = &dc_plane_state->ctx->dc->caps.color;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1264
dc_plane_state->in_transfer_func.type = TF_TYPE_BYPASS;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1265
dc_plane_state->in_transfer_func.tf = TRANSFER_FUNCTION_LINEAR;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1270
ret = __set_dm_plane_degamma(plane_state, dc_plane_state, color_caps);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1297
ret = map_crtc_degamma_to_dc_plane(crtc, dc_plane_state, color_caps);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1316
__drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1318
dc_plane_state->gamut_remap_matrix.enable_remap = true;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1319
dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1322
dc_plane_state->gamut_remap_matrix.enable_remap = false;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1323
dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1326
return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1003
struct dc_plane_state *plane_state =
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1437
struct dc_plane_state *dc_plane_state;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1442
dc_plane_state = dm_plane_state->dc_state;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1444
dc_plane_force_dcc_and_tiling_disable(dc_plane_state, fb->modifier ? true : false);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
385
TP_PROTO(int pipe_idx, const struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/basics/dc_common.c
83
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/basics/dc_common.h
40
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/core/dc.c
1275
struct dc_plane_state *plane_state = NULL;
sys/dev/pci/drm/amd/display/dc/core/dc.c
1997
struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc.c
2633
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc.c
3081
struct dc_plane_state *surface,
sys/dev/pci/drm/amd/display/dc/core/dc.c
3514
struct dc_plane_state *new_planes[MAX_SURFACES] = {0};
sys/dev/pci/drm/amd/display/dc/core/dc.c
3549
struct dc_plane_state *surface = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc.c
3778
struct dc_plane_state *plane_state = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc.c
3834
struct dc_plane_state *plane_state = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc.c
3916
struct dc_plane_state *plane_state = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc.c
4002
struct dc_plane_state *plane_state = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc.c
4255
struct dc_plane_state *plane_state = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc.c
4353
struct dc_plane_state *plane_state = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc.c
4372
struct dc_plane_state *plane_state = srf_updates[i].surface;
sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c
1035
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c
1061
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c
732
struct dc_plane_state *plane = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
1140
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
1256
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
1445
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
2010
int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
2505
const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
2922
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
2972
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
3023
struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
3049
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
3378
const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
5098
enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
107
static bool dc_state_untrack_phantom_plane(struct dc_state *state, struct dc_plane_state *phantom_plane)
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
133
static bool dc_state_is_phantom_plane_tracked(struct dc_state *state, struct dc_plane_state *phantom_plane)
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
466
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
534
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
599
struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
627
struct dc_plane_state * const *plane_states,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
749
struct dc_plane_state *dc_state_create_phantom_plane(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
751
struct dc_plane_state *main_plane)
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
753
struct dc_plane_state *phantom_plane = dc_create_plane_state(dc);
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
772
struct dc_plane_state *phantom_plane)
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
847
struct dc_plane_state *phantom_plane,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
864
struct dc_plane_state *phantom_plane,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
878
struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
909
struct dc_plane_state * const *phantom_planes,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
944
struct dc_plane_state *phantom_planes[MAX_PHANTOM_PIPES];
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
953
memcpy(phantom_planes, state->phantom_planes, sizeof(struct dc_plane_state *) * MAX_PHANTOM_PIPES);
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
97
struct dc_plane_state *phantom_plane)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
112
const struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
162
void dc_plane_state_retain(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
169
struct dc_plane_state *plane_state = container_of(kref, struct dc_plane_state, refcount);
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
174
void dc_plane_state_release(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
275
void dc_plane_force_dcc_and_tiling_disable(struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
300
void dc_plane_copy_config(struct dc_plane_state *dst, const struct dc_plane_state *src)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
308
memcpy(dst, src, sizeof(struct dc_plane_state));
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
40
void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
58
void dc_plane_destruct(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
68
uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
86
struct dc_plane_state *dc_create_plane_state(const struct dc *dc)
sys/dev/pci/drm/amd/display/dc/core/dc_surface.c
88
struct dc_plane_state *plane_state = kvzalloc(sizeof(*plane_state),
sys/dev/pci/drm/amd/display/dc/dc.h
1528
struct dc_plane_state plane_states[MAX_SURFACES];
sys/dev/pci/drm/amd/display/dc/dc.h
1801
struct dc_plane_state *surface;
sys/dev/pci/drm/amd/display/dc/dc.h
1879
struct dc_plane_state *plane_states[MAX_SURFACES];
sys/dev/pci/drm/amd/display/dc/dc.h
1891
enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/dc.h
1933
struct dc_plane_state *dc_get_surface_for_mpcc(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc.h
1938
uint32_t dc_get_opp_for_plane(struct dc *dc, struct dc_plane_state *plane);
sys/dev/pci/drm/amd/display/dc/dc.h
460
struct dc_plane_state;
sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c
1849
struct dc_plane_state *plane_state;
sys/dev/pci/drm/amd/display/dc/dc_plane.h
38
struct dc_plane_state *dc_create_plane_state(const struct dc *dc);
sys/dev/pci/drm/amd/display/dc/dc_plane.h
40
const struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/dc_plane.h
42
void dc_plane_state_retain(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/dc_plane.h
43
void dc_plane_state_release(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/dc_plane.h
45
void dc_plane_force_dcc_and_tiling_disable(struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/dc_plane.h
49
void dc_plane_copy_config(struct dc_plane_state *dst, const struct dc_plane_state *src);
sys/dev/pci/drm/amd/display/dc/dc_plane_priv.h
31
void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/dc_plane_priv.h
32
void dc_plane_destruct(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/dc_plane_priv.h
33
uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/dc_spl_translate.c
78
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/dc_state.h
53
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/dc_state.h
59
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/dc_state.h
70
struct dc_plane_state * const *plane_states,
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
50
struct dc_plane_state *dc_state_create_phantom_plane(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
52
struct dc_plane_state *main_plane);
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
60
struct dc_plane_state *phantom_plane);
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
74
struct dc_plane_state *phantom_plane,
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
80
struct dc_plane_state *phantom_plane,
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
92
struct dc_plane_state * const *phantom_planes,
sys/dev/pci/drm/amd/display/dc/dc_stream.h
104
struct dc_plane_state *writeback_source_plane;
sys/dev/pci/drm/amd/display/dc/dc_stream.h
61
struct dc_plane_state *plane_states[MAX_SURFACES];
sys/dev/pci/drm/amd/display/dc/dc_types.h
46
struct dc_plane_state;
sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
1588
struct dc_plane_state *pln = res_ctx->pipe_ctx[i].plane_state;
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
1119
struct dc_plane_state *plane;
sys/dev/pci/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
1146
struct pipe_ctx *dpp_pipe, struct dc_plane_state *plane, int diff)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
434
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
468
const struct dc_plane_state *in,
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
497
struct dml2_plane_parameters *plane, const struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
644
static bool dml21_wrapper_get_plane_id(const struct dc_state *context, unsigned int stream_id, const struct dc_plane_state *plane, unsigned int *plane_id)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
681
const struct dc_plane_state *plane, const struct dc_state *context)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h
14
struct dc_plane_state;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h
27
unsigned int map_plane_to_dml21_display_cfg(const struct dml2_context *dml_ctx, unsigned int stream_id, const struct dc_plane_state *plane, const struct dc_state *context);
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c
278
static struct dc_plane_state *dml21_add_phantom_plane(struct dml2_context *dml_ctx,
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c
282
struct dc_plane_state *main_plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c
285
struct dc_plane_state *phantom_plane;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c
326
struct dc_plane_state *main_plane;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c
36
bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c
96
struct dc_plane_state *dc_main_plane;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c
99
struct dc_plane_state *dc_phantom_plane;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h
10
struct dc_plane_state;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h
20
bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id);
sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
559
const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
58
static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
639
const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
701
const struct dc_plane_state *plane, const struct dc_plane_pipe_pool *pool, unsigned int stream_id, int plane_index)
sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
754
static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
909
const struct dc_plane_state *plane)
sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c
739
struct dc_plane_state *phantom_plane = NULL;
sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c
740
struct dc_plane_state *prev_phantom_plane = NULL;
sys/dev/pci/drm/amd/display/dc/dml2/dml2_mall_phantom.c
814
struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };
sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c
1060
const struct dc_plane_state *in, struct dc_state *context,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c
1146
static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *context, const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c
1170
static unsigned int map_plane_to_dml_display_cfg(const struct dml2_context *dml2, const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c
911
static void populate_dml_surface_cfg_from_plane_state(enum dml_project_id dml2_project, struct dml_surface_cfg_st *out, unsigned int location, const struct dc_plane_state *in)
sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c
978
const struct dc_plane_state *in,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c
216
static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
101
int (*get_dpp_pipes_for_plane)(const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
120
struct dc_plane_state* (*create_phantom_plane)(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
122
struct dc_plane_state *main_plane);
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
127
bool (*add_phantom_plane)(const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state *plane_state, struct dc_state *context);
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
130
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
137
struct dc_plane_state *plane);
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
38
struct dc_plane_state;
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
88
const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c
155
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/hwss/dce100/dce100_hwseq.h
50
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
256
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
2641
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
2656
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
285
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
2920
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c
274
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
1981
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2010
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2032
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2858
static void dcn10_update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2985
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3599
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
4128
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h
218
struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h
79
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1070
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1090
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1117
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1687
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2704
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2733
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h
34
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h
36
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h
46
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c
137
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c
59
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
232
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
315
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
916
struct dc_plane_state *plane = NULL;
sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h
60
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h
64
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1433
struct dc_plane_state *phantom_plane = phantom_pipe->plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
259
struct dc_plane_state *plane = NULL;
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
477
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
524
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h
51
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h
55
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1277
struct dc_plane_state *plane = NULL;
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
612
const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h
39
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h
249
void (*clear_surface_dcc_and_tiling)(struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state, bool clear_tiling);
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h
83
struct dc_plane_state *plane_state;
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h
155
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h
157
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h
159
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h
86
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
156
const struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
170
struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
447
struct dc_plane_state *plane_state;
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
617
struct dc_plane_state *phantom_planes[MAX_PHANTOM_PIPES];
sys/dev/pci/drm/amd/display/dc/inc/resource.h
157
struct dc_plane_state *const *plane_state,
sys/dev/pci/drm/amd/display/dc/inc/resource.h
315
struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/inc/resource.h
325
const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/inc/resource.h
370
const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/inc/resource.h
407
int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
938
enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h
42
enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps);
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
1037
static enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
1060
struct dc_plane_state *plane =
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1143
static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1173
struct dc_plane_state *plane =
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1211
static enum dc_status dcn10_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
2198
enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h
167
enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1353
static enum dc_status dcn21_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1645
struct dc_plane_state *phantom_plane = NULL;
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1646
struct dc_plane_state *prev_phantom_plane = NULL;
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c
319
struct dc_plane_state *current_plane = NULL;
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1755
enum dc_status dcn35_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
38
enum dc_status dcn35_patch_unknown_plane_state(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1630
enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
23
enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/modules/freesync/freesync.c
1130
const struct dc_plane_state *plane,
sys/dev/pci/drm/amd/display/modules/inc/mod_freesync.h
127
const struct dc_plane_state *plane,