BUS_SPACE_MAP_LINEAR
if (flags & BUS_SPACE_MAP_LINEAR)
if (flags & BUS_SPACE_MAP_LINEAR)
int linear = flags & BUS_SPACE_MAP_LINEAR;
int linear = flags & BUS_SPACE_MAP_LINEAR;
if (flags & BUS_SPACE_MAP_LINEAR)
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_CACHEABLE, &memh)) {
BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR,
BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, &ioh))
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_CACHEABLE, &ioh)) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &ioh)) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &ioh)) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &ioh)) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &ioh)) {
memsize, BUS_SPACE_MAP_LINEAR, &sc->sc_bsh);
if (flags & BUS_SPACE_MAP_LINEAR)
BUS_SPACE_MAP_LINEAR, &fbt, &fbh,
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR, &radeonfbcn.fbh);
BUS_SPACE_MAP_LINEAR, &radeonfbcn.mmioh);
BUS_SPACE_MAP_LINEAR, &fbt, &fbh, NULL, &fbsize, 0) != 0) {
BUS_SPACE_MAP_LINEAR, &sisfbcn.fbh);
BUS_SPACE_MAP_LINEAR, &sisfbcn.mmioh);
BUS_SPACE_MAP_LINEAR, &memt, &memh, NULL, NULL, 0) != 0) {
BUS_SPACE_MAP_LINEAR, &fbh);
BUS_SPACE_MAP_LINEAR, &mmioh);
BUS_SPACE_MAP_LINEAR, &sc->sc_fbt, &sc->sc_fbh,
BUS_SPACE_MAP_LINEAR, &sc->sc_mmiot, &sc->sc_mmioh,
BUS_SPACE_MAP_LINEAR, &sc->sc_ioh)) {
off, prot, BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cshandle) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &sc->sc_pdmahandle) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &sc->sc_cdmahandle) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &sc->sc_auxhandle) != 0) {
ma->ma_reg[FFB_REG_DFB24].ur_len, BUS_SPACE_MAP_LINEAR,
BUS_SPACE_MAP_LINEAR);
BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR, 0, &fdc->sc_handle) != 0) {
BUS_SPACE_MAP_LINEAR, &sc->sc_ureg)) {
BUS_SPACE_MAP_LINEAR, &sc->sc_treg)) {
BUS_SPACE_MAP_LINEAR, &sc->sc_freg)) {
BUS_SPACE_MAP_LINEAR, &sc->sc_sreg)) {
ma->ma_reg[5].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_treg)) {
ma->ma_reg[2].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_freg)) {
ma->ma_reg[3].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_sreg)) {
ma->ma_reg[4].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_ureg)) {
ma->ma_reg[6].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_pixel_h))
BUS_SPACE_MAP_LINEAR, &sc->sc_memt, &sc->sc_memh,
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
off, prot, BUS_SPACE_MAP_LINEAR));
off, prot, BUS_SPACE_MAP_LINEAR);
off, prot, BUS_SPACE_MAP_LINEAR);
off, prot, BUS_SPACE_MAP_LINEAR);
BUS_SPACE_MAP_LINEAR, NULL, &sc->sc_mem_h,
BUS_SPACE_MAP_LINEAR, &sc->sc_memt, &sc->sc_memh,
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
off, prot, BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR, &sc->sc_memt, &sc->sc_memh,
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR, &sc->sc_memt, &sc->sc_memh,
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
off, prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
prot, BUS_SPACE_MAP_LINEAR));
off, prot, BUS_SPACE_MAP_LINEAR));
sa->sa_size, BUS_SPACE_MAP_LINEAR, 0, &kvaddr) != 0) {
BUS_SPACE_MAP_LINEAR, &kvaddr) != 0) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_READONLY,
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_READONLY,
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_READONLY, &cwi.cwi_bh) != 0) {
if (flags & BUS_SPACE_MAP_LINEAR) {
BUS_SPACE_MAP_LINEAR, &sc->sc_ioh)) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &sc->sc_ioh)) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &ioh))
BUS_SPACE_MAP_LINEAR);
BUS_SPACE_MAP_LINEAR | (r->cache ?
BUS_SPACE_MAP_LINEAR, &isc->gtt_bst, &isc->gtt_bsh,
isc->gtt_size, BUS_SPACE_MAP_LINEAR, &isc->gtt_bsh)) {
if (bus_space_map(bst, adev->fb_aper_offset, size, BUS_SPACE_MAP_LINEAR, &bsh) != 0)
pci_mapreg_map(pa, rmmio_bar, type, BUS_SPACE_MAP_LINEAR,
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE,
BUS_SPACE_MAP_LINEAR, &ioh);
BUS_SPACE_MAP_LINEAR, &dev_priv->opregion_rvda_ioh))
BUS_SPACE_MAP_LINEAR, &dev_priv->opregion_ioh)) {
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &bsh))
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &bsh))
flags | BUS_SPACE_MAP_LINEAR, &ggtt->gsm_bsh);
BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE, &bsh))
if (pci_mapreg_map(pa, mmio_bar, mmio_type, BUS_SPACE_MAP_LINEAR,
pci_mapreg_map(pa, 0x18, type, BUS_SPACE_MAP_LINEAR, NULL,
pci_mapreg_map(pa, rmmio_bar, type, BUS_SPACE_MAP_LINEAR, NULL,
rdev->sf.sf_fbsize, BUS_SPACE_MAP_LINEAR, &rdev->memh)) {
size, BUS_SPACE_MAP_LINEAR | flags,
bo->base.size, BUS_SPACE_MAP_LINEAR | flags,
mem->size, BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE,
mem->size, BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE,
mem->size, BUS_SPACE_MAP_LINEAR, &iter_io->dmap.bsh)) {
BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, &dc->dc_memh))
getpropint(node, "i128_fb_size", 0x400000), BUS_SPACE_MAP_LINEAR,
BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
sc->sc_physoffset + offset, prot, BUS_SPACE_MAP_LINEAR));
sc->sc_sunfb.sf_fbsize, BUS_SPACE_MAP_LINEAR,
BWTWO_VID_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));
sc->sc_sunfb.sf_fbsize, BUS_SPACE_MAP_LINEAR,
prot, BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR));
sc->sc_sunfb.sf_fbsize, BUS_SPACE_MAP_LINEAR,
CGTHREE_VID_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
CG12_SIZE_OVERLAY), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
CG12_SIZE_COLOR24), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
prot, BUS_SPACE_MAP_LINEAR));
BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &lesc->sc_reg) != 0) {
BUS_SPACE_MAP_LINEAR,
BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
MGX_REG_ATREG_SIZE, BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
offset, prot, BUS_SPACE_MAP_LINEAR));
RFX_RAMDAC_SIZE, BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
RFX_CONTROL_SIZE, BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR,
RFX_VRAM_ADDR + offset, prot, BUS_SPACE_MAP_LINEAR));
RFX_INIT_ADDR, RFX_INIT_SIZE, BUS_SPACE_MAP_LINEAR, 0, &bh)) != 0) {
PX_REG_SIZE, BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR, 0,
round_page(4 * sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR, 0,
PX_PLANE24_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));
sa->sa_reg[VIGRA_REG_CSR].sbr_size, BUS_SPACE_MAP_LINEAR, 0,
sa->sa_reg[VIGRA_REG_RAMDAC].sbr_size, BUS_SPACE_MAP_LINEAR, 0,
round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR, 0,
offset, prot, BUS_SPACE_MAP_LINEAR));
sizeof(struct zx_command), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
sizeof(struct zx_draw), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
sizeof(struct zx_draw_ss1), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
sizeof(struct zx_cross), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
sizeof(struct zx_cursor), BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR,
ZX_OFF_SS0 + offset, prot, BUS_SPACE_MAP_LINEAR));