sys/dev/pci/if_bnx.c

1057

REG_WR(sc, BNX_CTX_CTX_DATA, ctx_val);

sys/dev/pci/if_bnx.c

1058

REG_WR(sc, BNX_CTX_CTX_CTRL,

sys/dev/pci/if_bnx.c

1076

REG_WR(sc, BNX_CTX_DATA_ADR, offset);

sys/dev/pci/if_bnx.c

1077

REG_WR(sc, BNX_CTX_DATA, ctx_val);

sys/dev/pci/if_bnx.c

1110

REG_WR(sc, BNX_EMAC_MDIO_MODE, val);

sys/dev/pci/if_bnx.c

1119

REG_WR(sc, BNX_EMAC_MDIO_COMM, val);

sys/dev/pci/if_bnx.c

1150

REG_WR(sc, BNX_EMAC_MDIO_MODE, val);

sys/dev/pci/if_bnx.c

1192

REG_WR(sc, BNX_EMAC_MDIO_MODE, val1);

sys/dev/pci/if_bnx.c

1201

REG_WR(sc, BNX_EMAC_MDIO_COMM, val1);

sys/dev/pci/if_bnx.c

1222

REG_WR(sc, BNX_EMAC_MDIO_MODE, val1);

sys/dev/pci/if_bnx.c

1298

REG_WR(sc, BNX_EMAC_MODE, val);

sys/dev/pci/if_bnx.c

1325

REG_WR(sc, BNX_EMAC_RX_MODE, rx_mode);

sys/dev/pci/if_bnx.c

1348

REG_WR(sc, BNX_NVM_SW_ARB, BNX_NVM_SW_ARB_ARB_REQ_SET2);

sys/dev/pci/if_bnx.c

1384

REG_WR(sc, BNX_NVM_SW_ARB, BNX_NVM_SW_ARB_ARB_REQ_CLR2);

sys/dev/pci/if_bnx.c

1419

REG_WR(sc, BNX_MISC_CFG, val | BNX_MISC_CFG_NVM_WR_EN_PCI);

sys/dev/pci/if_bnx.c

1424

REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);

sys/dev/pci/if_bnx.c

1425

REG_WR(sc, BNX_NVM_COMMAND,

sys/dev/pci/if_bnx.c

1462

REG_WR(sc, BNX_MISC_CFG, val & ~BNX_MISC_CFG_NVM_WR_EN);

sys/dev/pci/if_bnx.c

1484

REG_WR(sc, BNX_NVM_ACCESS_ENABLE,

sys/dev/pci/if_bnx.c

1506

REG_WR(sc, BNX_NVM_ACCESS_ENABLE,

sys/dev/pci/if_bnx.c

1540

REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);

sys/dev/pci/if_bnx.c

1541

REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);

sys/dev/pci/if_bnx.c

1542

REG_WR(sc, BNX_NVM_COMMAND, cmd);

sys/dev/pci/if_bnx.c

1594

REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);

sys/dev/pci/if_bnx.c

1595

REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);

sys/dev/pci/if_bnx.c

1596

REG_WR(sc, BNX_NVM_COMMAND, cmd);

sys/dev/pci/if_bnx.c

1656

REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);

sys/dev/pci/if_bnx.c

1659

REG_WR(sc, BNX_NVM_WRITE, val32);

sys/dev/pci/if_bnx.c

1660

REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);

sys/dev/pci/if_bnx.c

1661

REG_WR(sc, BNX_NVM_COMMAND, cmd);

sys/dev/pci/if_bnx.c

1755

REG_WR(sc, BNX_NVM_CFG1, flash->config1);

sys/dev/pci/if_bnx.c

1756

REG_WR(sc, BNX_NVM_CFG2, flash->config2);

sys/dev/pci/if_bnx.c

1757

REG_WR(sc, BNX_NVM_CFG3, flash->config3);

sys/dev/pci/if_bnx.c

1758

REG_WR(sc, BNX_NVM_WRITE1, flash->write1);

sys/dev/pci/if_bnx.c

2775

REG_WR(sc, BNX_RV2P_INSTR_HIGH, *rv2p_code);

sys/dev/pci/if_bnx.c

2777

REG_WR(sc, BNX_RV2P_INSTR_LOW, *rv2p_code);

sys/dev/pci/if_bnx.c

2782

REG_WR(sc, BNX_RV2P_PROC1_ADDR_CMD, val);

sys/dev/pci/if_bnx.c

2785

REG_WR(sc, BNX_RV2P_PROC2_ADDR_CMD, val);

sys/dev/pci/if_bnx.c

2791

REG_WR(sc, BNX_RV2P_COMMAND, BNX_RV2P_COMMAND_PROC1_RESET);

sys/dev/pci/if_bnx.c

2793

REG_WR(sc, BNX_RV2P_COMMAND, BNX_RV2P_COMMAND_PROC2_RESET);

sys/dev/pci/if_bnx.c

3118

REG_WR(sc, BNX_CTX_COMMAND, val);

sys/dev/pci/if_bnx.c

3135

REG_WR(sc, BNX_CTX_HOST_PAGE_TBL_DATA0, val |

sys/dev/pci/if_bnx.c

3139

REG_WR(sc, BNX_CTX_HOST_PAGE_TBL_DATA1, val);

sys/dev/pci/if_bnx.c

3140

REG_WR(sc, BNX_CTX_HOST_PAGE_TBL_CTRL, i |

sys/dev/pci/if_bnx.c

3167

REG_WR(sc, BNX_CTX_VIRT_ADDR, 0);

sys/dev/pci/if_bnx.c

3168

REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);

sys/dev/pci/if_bnx.c

3174

REG_WR(sc, BNX_CTX_VIRT_ADDR, vcid_addr);

sys/dev/pci/if_bnx.c

3175

REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);

sys/dev/pci/if_bnx.c

3236

REG_WR(sc, BNX_EMAC_MAC_MATCH0, val);

sys/dev/pci/if_bnx.c

3241

REG_WR(sc, BNX_EMAC_MAC_MATCH1, val);

sys/dev/pci/if_bnx.c

3267

REG_WR(sc, BNX_MISC_ENABLE_CLR_BITS, 0x5ffffff);

sys/dev/pci/if_bnx.c

3319

REG_WR(sc, BNX_MISC_ENABLE_CLR_BITS,

sys/dev/pci/if_bnx.c

3331

REG_WR(sc, BNX_MISC_NEW_CORE_CTL, val);

sys/dev/pci/if_bnx.c

3351

REG_WR(sc, BNX_MISC_COMMAND, BNX_MISC_COMMAND_SW_RESET);

sys/dev/pci/if_bnx.c

3364

REG_WR(sc, BNX_PCICFG_MISC_CONFIG, val);

sys/dev/pci/if_bnx.c

3420

REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_MASK_INT);

sys/dev/pci/if_bnx.c

3448

REG_WR(sc, BNX_DMA_CONFIG, val);

sys/dev/pci/if_bnx.c

3460

REG_WR(sc, BNX_MISC_ENABLE_SET_BITS,

sys/dev/pci/if_bnx.c

3489

REG_WR(sc, BNX_MQ_CONFIG, val);

sys/dev/pci/if_bnx.c

3492

REG_WR(sc, BNX_MQ_KNL_BYP_WIND_START, val);

sys/dev/pci/if_bnx.c

3493

REG_WR(sc, BNX_MQ_KNL_WIND_END, val);

sys/dev/pci/if_bnx.c

3496

REG_WR(sc, BNX_RV2P_CONFIG, val);

sys/dev/pci/if_bnx.c

3502

REG_WR(sc, BNX_TBDR_CONFIG, val);

sys/dev/pci/if_bnx.c

3535

REG_WR(sc, BNX_EMAC_BACKOFF_SEED, val);

sys/dev/pci/if_bnx.c

3541

REG_WR(sc, BNX_EMAC_ATTENTION_ENA, BNX_EMAC_ATTENTION_ENA_LINK);

sys/dev/pci/if_bnx.c

3542

REG_WR(sc, BNX_HC_ATTN_BITS_ENABLE, STATUS_ATTN_BITS_LINK_STATE);

sys/dev/pci/if_bnx.c

3545

REG_WR(sc, BNX_HC_STATUS_ADDR_L, (u_int32_t)(sc->status_block_paddr));

sys/dev/pci/if_bnx.c

3546

REG_WR(sc, BNX_HC_STATUS_ADDR_H,

sys/dev/pci/if_bnx.c

3550

REG_WR(sc, BNX_HC_STATISTICS_ADDR_L,

sys/dev/pci/if_bnx.c

3552

REG_WR(sc, BNX_HC_STATISTICS_ADDR_H,

sys/dev/pci/if_bnx.c

3556

REG_WR(sc, BNX_HC_TX_QUICK_CONS_TRIP, (sc->bnx_tx_quick_cons_trip_int

sys/dev/pci/if_bnx.c

3558

REG_WR(sc, BNX_HC_RX_QUICK_CONS_TRIP, (sc->bnx_rx_quick_cons_trip_int

sys/dev/pci/if_bnx.c

3560

REG_WR(sc, BNX_HC_COMP_PROD_TRIP, (sc->bnx_comp_prod_trip_int << 16) |

sys/dev/pci/if_bnx.c

3562

REG_WR(sc, BNX_HC_TX_TICKS, (sc->bnx_tx_ticks_int << 16) |

sys/dev/pci/if_bnx.c

3564

REG_WR(sc, BNX_HC_RX_TICKS, (sc->bnx_rx_ticks_int << 16) |

sys/dev/pci/if_bnx.c

3566

REG_WR(sc, BNX_HC_COM_TICKS, (sc->bnx_com_ticks_int << 16) |

sys/dev/pci/if_bnx.c

3568

REG_WR(sc, BNX_HC_CMD_TICKS, (sc->bnx_cmd_ticks_int << 16) |

sys/dev/pci/if_bnx.c

3570

REG_WR(sc, BNX_HC_STATS_TICKS, (sc->bnx_stats_ticks & 0xffff00));

sys/dev/pci/if_bnx.c

3571

REG_WR(sc, BNX_HC_STAT_COLLECT_TICKS, 0xbb8); /* 3ms */

sys/dev/pci/if_bnx.c

3572

REG_WR(sc, BNX_HC_CONFIG,

sys/dev/pci/if_bnx.c

3577

REG_WR(sc, BNX_HC_COMMAND, BNX_HC_COMMAND_CLR_STAT_NOW);

sys/dev/pci/if_bnx.c

3613

REG_WR(sc, BNX_MISC_NEW_CORE_CTL, val);

sys/dev/pci/if_bnx.c

3621

REG_WR(sc, BNX_MISC_ENABLE_SET_BITS,

sys/dev/pci/if_bnx.c

3624

REG_WR(sc, BNX_MISC_ENABLE_SET_BITS, BNX_MISC_ENABLE_DEFAULT);

sys/dev/pci/if_bnx.c

3627

REG_WR(sc, BNX_MISC_ENABLE_SET_BITS, 0x5ffffff);

sys/dev/pci/if_bnx.c

3930

REG_WR(sc, BNX_MQ_MAP_L2_5, val | BNX_MQ_MAP_L2_5_ARM);

sys/dev/pci/if_bnx.c

3990

REG_WR(sc, MB_RX_CID_ADDR + BNX_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);

sys/dev/pci/if_bnx.c

4203

REG_WR(sc, BNX_PCICFG_STATUS_BIT_SET_CMD,

sys/dev/pci/if_bnx.c

4207

REG_WR(sc, BNX_PCICFG_STATUS_BIT_CLEAR_CMD,

sys/dev/pci/if_bnx.c

4214

REG_WR(sc, BNX_EMAC_STATUS, BNX_EMAC_STATUS_LINK_CHANGE);

sys/dev/pci/if_bnx.c

4595

REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_MASK_INT);

sys/dev/pci/if_bnx.c

4610

REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_INDEX_VALID |

sys/dev/pci/if_bnx.c

4613

REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_INDEX_VALID |

sys/dev/pci/if_bnx.c

4617

REG_WR(sc, BNX_HC_COMMAND, val | BNX_HC_COMMAND_COAL_NOW);

sys/dev/pci/if_bnx.c

4669

REG_WR(sc, BNX_EMAC_RX_MTU_SIZE, ether_mtu |

sys/dev/pci/if_bnx.c

4720

REG_WR(sc, BNX_RV2P_CONFIG, val);

sys/dev/pci/if_bnx.c

4723

REG_WR(sc, BNX_MISC_ENABLE_SET_BITS,

sys/dev/pci/if_bnx.c

4942

REG_WR(sc, MB_TX_CID_ADDR + BNX_L2CTX_TX_HOST_BSEQ, sc->tx_prod_bseq);

sys/dev/pci/if_bnx.c

5099

REG_WR(sc, BNX_PCICFG_INT_ACK_CMD,

sys/dev/pci/if_bnx.c

5214

REG_WR(sc, BNX_EMAC_MULTICAST_HASH0 + (i * 4),

sys/dev/pci/if_bnx.c

5232

REG_WR(sc, BNX_EMAC_MULTICAST_HASH0 + (i * 4),

sys/dev/pci/if_bnx.c

5244

REG_WR(sc, BNX_EMAC_RX_MODE, rx_mode);

sys/dev/pci/if_bnx.c

5248

REG_WR(sc, BNX_RPM_SORT_USER0, 0x0);

sys/dev/pci/if_bnx.c

5249

REG_WR(sc, BNX_RPM_SORT_USER0, sort_mode);

sys/dev/pci/if_bnx.c

5250

REG_WR(sc, BNX_RPM_SORT_USER0, sort_mode | BNX_RPM_SORT_USER0_ENA);

sys/dev/pci/if_bnxreg.h

682

#define BNX_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))

sys/dev/pci/if_bnxreg.h

683

#define BNX_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))