sys/dev/pci/if_bnx.c

1062

val = REG_RD(sc, BNX_CTX_CTX_CTRL);

sys/dev/pci/if_bnx.c

1107

val = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1111

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1124

val = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1128

val = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1140

val = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1147

val = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1151

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1189

val1 = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1193

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1206

val1 = REG_RD(sc, BNX_EMAC_MDIO_COMM);

sys/dev/pci/if_bnx.c

1219

val1 = REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1223

REG_RD(sc, BNX_EMAC_MDIO_MODE);

sys/dev/pci/if_bnx.c

1246

val = REG_RD(sc, BNX_EMAC_MODE);

sys/dev/pci/if_bnx.c

1350

val = REG_RD(sc, BNX_NVM_SW_ARB);

sys/dev/pci/if_bnx.c

1387

val = REG_RD(sc, BNX_NVM_SW_ARB);

sys/dev/pci/if_bnx.c

1418

val = REG_RD(sc, BNX_MISC_CFG);

sys/dev/pci/if_bnx.c

1431

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1461

val = REG_RD(sc, BNX_MISC_CFG);

sys/dev/pci/if_bnx.c

1482

val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);

sys/dev/pci/if_bnx.c

1503

val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);

sys/dev/pci/if_bnx.c

1550

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1604

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1606

val = REG_RD(sc, BNX_NVM_READ);

sys/dev/pci/if_bnx.c

1667

if (REG_RD(sc, BNX_NVM_COMMAND) & BNX_NVM_COMMAND_DONE)

sys/dev/pci/if_bnx.c

1704

val = REG_RD(sc, BNX_NVM_CFG1);

sys/dev/pci/if_bnx.c

2172

u_int32_t val = REG_RD(sc, BNX_MISC_DUAL_MEDIA_CTRL);

sys/dev/pci/if_bnx.c

3122

val = REG_RD(sc, BNX_CTX_COMMAND);

sys/dev/pci/if_bnx.c

3145

val = REG_RD(sc, BNX_CTX_HOST_PAGE_TBL_CTRL);

sys/dev/pci/if_bnx.c

3268

REG_RD(sc, BNX_MISC_ENABLE_CLR_BITS);

sys/dev/pci/if_bnx.c

3324

val = REG_RD(sc, BNX_MISC_ENABLE_CLR_BITS);

sys/dev/pci/if_bnx.c

3329

val = REG_RD(sc, BNX_MISC_NEW_CORE_CTL);

sys/dev/pci/if_bnx.c

3347

val = REG_RD(sc, BNX_MISC_ID);

sys/dev/pci/if_bnx.c

3352

REG_RD(sc, BNX_MISC_COMMAND);

sys/dev/pci/if_bnx.c

3368

val = REG_RD(sc, BNX_PCICFG_MISC_CONFIG);

sys/dev/pci/if_bnx.c

3387

val = REG_RD(sc, BNX_PCI_SWAP_DIAG0);

sys/dev/pci/if_bnx.c

3478

val = REG_RD(sc, BNX_MQ_CONFIG);

sys/dev/pci/if_bnx.c

3499

val = REG_RD(sc, BNX_TBDR_CONFIG);

sys/dev/pci/if_bnx.c

3611

val = REG_RD(sc, BNX_MISC_NEW_CORE_CTL);

sys/dev/pci/if_bnx.c

3628

REG_RD(sc, BNX_MISC_ENABLE_SET_BITS);

sys/dev/pci/if_bnx.c

3929

val = REG_RD(sc, BNX_MQ_MAP_L2_5);

sys/dev/pci/if_bnx.c

4596

REG_RD(sc, BNX_PCICFG_INT_ACK_CMD);

sys/dev/pci/if_bnx.c

4616

val = REG_RD(sc, BNX_HC_COMMAND);

sys/dev/pci/if_bnx.c

4727

REG_RD(sc, BNX_MISC_ENABLE_SET_BITS);

sys/dev/pci/if_bnx.c

5045

if (REG_RD(sc, BNX_EMAC_TX_STATUS) & BNX_EMAC_TX_STATUS_XOFFED)

sys/dev/pci/if_bnx.c

5094

!ISSET(REG_RD(sc, BNX_PCICFG_MISC_STATUS),

sys/dev/pci/if_bnx.c

6170

val1 = REG_RD(sc, BNX_MISC_ENABLE_STATUS_BITS);

sys/dev/pci/if_bnx.c

6174

val1 = REG_RD(sc, BNX_DMA_STATUS);

sys/dev/pci/if_bnx.c

6177

val1 = REG_RD(sc, BNX_CTX_STATUS);

sys/dev/pci/if_bnx.c

6180

val1 = REG_RD(sc, BNX_EMAC_STATUS);

sys/dev/pci/if_bnx.c

6184

val1 = REG_RD(sc, BNX_RPM_STATUS);

sys/dev/pci/if_bnx.c

6187

val1 = REG_RD(sc, BNX_TBDR_STATUS);

sys/dev/pci/if_bnx.c

6191

val1 = REG_RD(sc, BNX_TDMA_STATUS);

sys/dev/pci/if_bnx.c

6195

val1 = REG_RD(sc, BNX_HC_STATUS);

sys/dev/pci/if_bnx.c

6210

i, REG_RD(sc, i), REG_RD(sc, i + 0x4),

sys/dev/pci/if_bnx.c

6211

REG_RD(sc, i + 0x8), REG_RD(sc, i + 0xC));

sys/dev/pci/if_bnx.c

680

sc->bnx_chipid = REG_RD(sc, BNX_MISC_ID);

sys/dev/pci/if_bnx.c

701

val = REG_RD(sc, BNX_PCICFG_MISC_STATUS);

sys/dev/pci/if_bnx.c

707

clkreg = REG_RD(sc, BNX_PCICFG_PCI_CLOCK_CONTROL_BITS);

sys/dev/pci/if_bnxreg.h

682

#define BNX_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))

sys/dev/pci/if_bnxreg.h

683

#define BNX_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))