sys/arch/arm/arm/arm32_machdep.c

194

if (__get_cpsr() & PSR_I) {

sys/arch/arm/arm/arm32_machdep.c

201

__set_cpsr_c(PSR_I, 0);

sys/arch/arm/arm/fault.c

187

if (__predict_true((tf->tf_spsr & PSR_I) == 0))

sys/arch/arm/arm/fault.c

188

enable_interrupts(PSR_I);

sys/arch/arm/arm/fault.c

547

if (__predict_true((tf->tf_spsr & PSR_I) == 0))

sys/arch/arm/arm/fault.c

548

enable_interrupts(PSR_I);

sys/arch/arm/arm/fiq.c

51

#define IRQ_BIT PSR_I

sys/arch/arm/arm/process_machdep.c

134

&& tf->tf_spsr & PSR_I)

sys/arch/arm/arm/process_machdep.c

168

&& tf->tf_spsr & PSR_I)

sys/arch/arm/arm/sig_machdep.c

209

(ksc.sc_spsr & (PSR_I | PSR_F)) != 0)

sys/arch/arm/arm/syscall.c

106

enable_interrupts(PSR_I);

sys/arch/arm/arm/undefined.c

157

if (!(frame->tf_spsr & PSR_I))

sys/arch/arm/arm/undefined.c

158

enable_interrupts(PSR_I);

sys/arch/arm/arm/vfp.c

127

disable_interrupts(PSR_I|PSR_F);

sys/arch/arm/arm/vfp.c

143

psw = disable_interrupts(PSR_I|PSR_F);

sys/arch/arm/cortex/ampintc.c

371

enable_interrupts(PSR_I);

sys/arch/arm/cortex/ampintc.c

409

psw = disable_interrupts(PSR_I);

sys/arch/arm/cortex/ampintc.c

676

enable_interrupts(PSR_I);

sys/arch/arm/cortex/ampintc.c

678

disable_interrupts(PSR_I);

sys/arch/arm/cortex/ampintc.c

761

psw = disable_interrupts(PSR_I);

sys/arch/arm/cortex/ampintc.c

792

psw = disable_interrupts(PSR_I);

sys/arch/arm/include/cpu.h

321

__asm volatile ("msr cpsr_c, %0" :: "r"(cpsr | PSR_I));

sys/arch/arm/include/cpufunc.h

296

(__set_cpsr_c((mask) & (PSR_I | PSR_F), \

sys/arch/arm/include/cpufunc.h

297

(mask) & (PSR_I | PSR_F)))

sys/arch/arm/include/cpufunc.h

300

(__set_cpsr_c((mask) & (PSR_I | PSR_F), 0))

sys/arch/arm/include/cpufunc.h

303

(__set_cpsr_c((PSR_I | PSR_F), (old_cpsr) & (PSR_I | PSR_F)))

sys/arch/arm/include/frame.h

185

bic r4, r4, #(PSR_I) ;\

sys/arch/arm/include/frame.h

186

1: orr r0, r4, #(PSR_I) /* Disable IRQs */ ;\

sys/arch/arm64/arm64/sig_machdep.c

209

(ksc.sc_spsr & (PSR_I | PSR_F)) != 0)

sys/arch/armv7/armv7/intr.c

700

oldirqstate = disable_interrupts(PSR_I);

sys/arch/armv7/armv7/intr.c

716

oldirqstate = disable_interrupts(PSR_I);

sys/arch/armv7/armv7/intr.c

725

oldirqstate = disable_interrupts(PSR_I); \

sys/arch/armv7/broadcom/bcm2836_intr.c

226

enable_interrupts(PSR_I);

sys/arch/armv7/broadcom/bcm2836_intr.c

355

psw = disable_interrupts(PSR_I);

sys/arch/armv7/broadcom/bcm2836_intr.c

530

psw = disable_interrupts(PSR_I);

sys/arch/armv7/broadcom/bcm2836_intr.c

561

psw = disable_interrupts(PSR_I);

sys/arch/armv7/marvell/mvmpic.c

265

psw = disable_interrupts(PSR_I);

sys/arch/armv7/marvell/mvmpic.c

291

psw = disable_interrupts(PSR_I);

sys/arch/armv7/omap/intc.c

187

enable_interrupts(PSR_I);

sys/arch/armv7/omap/intc.c

290

psw = disable_interrupts(PSR_I);

sys/arch/armv7/omap/intc.c

357

psw = disable_interrupts(PSR_I);

sys/arch/armv7/omap/intc.c

394

psw = disable_interrupts(PSR_I);

sys/arch/armv7/omap/omgpio.c

669

psw = disable_interrupts(PSR_I);

sys/arch/armv7/omap/omgpio.c

700

psw = disable_interrupts(PSR_I);

sys/arch/armv7/sunxi/sxiintc.c

209

enable_interrupts(PSR_I);

sys/arch/armv7/sunxi/sxiintc.c

316

psw = disable_interrupts(PSR_I);

sys/arch/armv7/sunxi/sxiintc.c

390

psw = disable_interrupts(PSR_I);

sys/arch/armv7/sunxi/sxiintc.c

431

psw = disable_interrupts(PSR_I);