Symbol: PLANE_SPRITE0
sys/dev/pci/drm/i915/display/i9xx_wm.c
1152
g4x_raw_plane_wm_is_valid(crtc_state, PLANE_SPRITE0, level) &&
sys/dev/pci/drm/i915/display/i9xx_wm.c
1549
return (active_planes & (BIT(PLANE_SPRITE0) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
1580
raw->plane[PLANE_SPRITE0] +
sys/dev/pci/drm/i915/display/i9xx_wm.c
1603
fifo_state->plane[PLANE_SPRITE0] += sprite0_fifo_extra;
sys/dev/pci/drm/i915/display/i9xx_wm.c
1736
vlv_raw_plane_wm_is_valid(crtc_state, PLANE_SPRITE0, level) &&
sys/dev/pci/drm/i915/display/i9xx_wm.c
1777
raw->plane[PLANE_SPRITE0],
sys/dev/pci/drm/i915/display/i9xx_wm.c
1878
sprite1_start = fifo_state->plane[PLANE_SPRITE0] + sprite0_start;
sys/dev/pci/drm/i915/display/i9xx_wm.c
2065
wm->ddl[pipe].plane[PLANE_SPRITE0] = DDL_PRECISION_HIGH | 2;
sys/dev/pci/drm/i915/display/i9xx_wm.c
2949
pipe_wm->sprites_enabled = crtc_state->active_planes & BIT(PLANE_SPRITE0);
sys/dev/pci/drm/i915/display/i9xx_wm.c
2950
pipe_wm->sprites_scaled = crtc_state->scaled_planes & BIT(PLANE_SPRITE0);
sys/dev/pci/drm/i915/display/i9xx_wm.c
317
fifo_state->plane[PLANE_SPRITE0] = sprite1_start - sprite0_start;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3680
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEB);
sys/dev/pci/drm/i915/display/i9xx_wm.c
3682
wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM(tmp, SPRITEA);
sys/dev/pci/drm/i915/display/i9xx_wm.c
3704
wm->ddl[pipe].plane[PLANE_SPRITE0] =
sys/dev/pci/drm/i915/display/i9xx_wm.c
3719
wm->pipe[PIPE_A].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEA);
sys/dev/pci/drm/i915/display/i9xx_wm.c
3727
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);
sys/dev/pci/drm/i915/display/i9xx_wm.c
3731
wm->pipe[PIPE_C].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEE);
sys/dev/pci/drm/i915/display/i9xx_wm.c
3740
wm->pipe[PIPE_C].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEE_HI) << 8;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3743
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3746
wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3751
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEC);
sys/dev/pci/drm/i915/display/i9xx_wm.c
3756
wm->pipe[PIPE_B].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEC_HI) << 8;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3759
wm->pipe[PIPE_A].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEA_HI) << 8;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3816
raw->plane[PLANE_SPRITE0] = 0;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3826
raw->plane[PLANE_SPRITE0] = 0;
sys/dev/pci/drm/i915/display/i9xx_wm.c
3846
wm->pipe[pipe].plane[PLANE_SPRITE0]);
sys/dev/pci/drm/i915/display/i9xx_wm.c
4003
wm->pipe[pipe].plane[PLANE_SPRITE0],
sys/dev/pci/drm/i915/display/i9xx_wm.c
822
FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEB) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
824
FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));
sys/dev/pci/drm/i915/display/i9xx_wm.c
848
(wm->ddl[pipe].plane[PLANE_SPRITE0] << DDL_SPRITE_SHIFT(0)) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
871
FW_WM_VLV(wm->pipe[PIPE_A].plane[PLANE_SPRITE0], SPRITEA));
sys/dev/pci/drm/i915/display/i9xx_wm.c
878
FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));
sys/dev/pci/drm/i915/display/i9xx_wm.c
881
FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE));
sys/dev/pci/drm/i915/display/i9xx_wm.c
888
FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
891
FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
894
FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
899
FW_WM_VLV(wm->pipe[PIPE_B].plane[PLANE_SPRITE0], SPRITEC));
sys/dev/pci/drm/i915/display/i9xx_wm.c
903
FW_WM(wm->pipe[PIPE_B].plane[PLANE_SPRITE0] >> 8, SPRITEC_HI) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
906
FW_WM(wm->pipe[PIPE_A].plane[PLANE_SPRITE0] >> 8, SPRITEA_HI) |
sys/dev/pci/drm/i915/display/i9xx_wm.c
946
case PLANE_SPRITE0:
sys/dev/pci/drm/i915/display/intel_display_irq.c
1159
{ .fault = GEN8_PIPE_SPRITE_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
1783
{ .fault = SPRITEA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
1787
{ .fault = SPRITEC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
1791
{ .fault = SPRITEE_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
725
{ .fault = ERR_INT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
728
{ .fault = ERR_INT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
731
{ .fault = ERR_INT_SPRITE_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
842
{ .fault = GTT_FAULT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_display_irq.c
843
{ .fault = GTT_FAULT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
sys/dev/pci/drm/i915/display/intel_sprite.c
1697
plane->id = PLANE_SPRITE0 + sprite;
sys/dev/pci/drm/i915/display/intel_sprite_regs.h
231
_PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
sys/dev/pci/drm/i915/display/intel_sprite_regs.h
352
_MMIO(VLV_DISPLAY_BASE + ((plane_id) - PLANE_SPRITE0) * 0x1000 + (reg))
sys/dev/pci/drm/i915/gvt/handlers.c
1052
int event = SKL_FLIP_EVENT(pipe, PLANE_SPRITE0);
sys/dev/pci/drm/i915/gvt/handlers.c
2312
MMIO_DH(REG_50080(PIPE_A, PLANE_SPRITE0), D_ALL, NULL,
sys/dev/pci/drm/i915/gvt/handlers.c
2315
MMIO_DH(REG_50080(PIPE_B, PLANE_SPRITE0), D_ALL, NULL,
sys/dev/pci/drm/i915/gvt/handlers.c
2318
MMIO_DH(REG_50080(PIPE_C, PLANE_SPRITE0), D_ALL, NULL,
sys/dev/pci/drm/i915/gvt/reg.h
88
(PLANE_SPRITE0) : (I915_MAX_PLANES))); })
sys/dev/pci/drm/i915/intel_gvt_mmio_table.c
215
MMIO_D(REG_50080(PIPE_A, PLANE_SPRITE0));
sys/dev/pci/drm/i915/intel_gvt_mmio_table.c
228
MMIO_D(REG_50080(PIPE_B, PLANE_SPRITE0));
sys/dev/pci/drm/i915/intel_gvt_mmio_table.c
241
MMIO_D(REG_50080(PIPE_C, PLANE_SPRITE0));