#ifndef _MACHINE_DIG64_H_
#define _MACHINE_DIG64_H_
struct dig64_gas {
uint8_t addr_space;
uint8_t bit_width;
uint8_t bit_offset;
uint8_t _reserved_;
uint32_t addr_low;
uint32_t addr_high;
};
struct dig64_hcdp_entry {
uint8_t type;
#define DIG64_HCDP_CONSOLE DIG64_ENTRYTYPE_TYPE0
#define DIG64_HCDP_DBGPORT DIG64_ENTRYTYPE_TYPE1
uint8_t databits;
uint8_t parity;
#define DIG64_HCDP_PARITY_NO 1
#define DIG64_HCDP_PARITY_EVEN 2
#define DIG64_HCDP_PARITY_ODD 3
#define DIG64_HCDP_PARITY_MARK 4
#define DIG64_HCDP_PARITY_SPACE 5
uint8_t stopbits;
#define DIG64_HCDP_STOPBITS_1 1
#define DIG64_HCDP_STOPBITS_15 2
#define DIG64_HCDP_STOPBITS_2 3
uint8_t pci_segment;
uint8_t pci_bus;
uint8_t pci_device:5;
uint8_t _reserved1_:3;
uint8_t pci_function:3;
uint8_t _reserved2_:3;
uint8_t interrupt:1;
uint8_t pci_flag:1;
uint32_t baud_low;
uint32_t baud_high;
struct dig64_gas address;
uint16_t pci_devid;
uint16_t pci_vendor;
uint32_t irq;
uint32_t pclock;
uint8_t pci_interface;
uint8_t _reserved3_[7];
};
struct dig64_vga_spec {
uint8_t num;
struct {
uint8_t data[56];
} edesc[0];
} __packed;
#define DIG64_FLAGS_INTR_LEVEL (0 << 0)
#define DIG64_FLAGS_INTR_EDGE (1 << 0)
#define DIG64_FLAGS_INTR_ACTH (0 << 1)
#define DIG64_FLAGS_INTR_ACTL (1 << 1)
#define DIG64_FLAGS_TRANS_DENSE (0 << 3)
#define DIG64_FLAGS_TRANS_SPARSE (1 << 3)
#define DIG64_FLAGS_TYPE_STATIC (0 << 4)
#define DIG64_FLAGS_TYPE_TRANS (1 << 4)
#define DIG64_FLAGS_INTR_SUPP (1 << 6)
#define DIG64_FLAGS_MMIO_TRA_VALID (1 << 8)
#define DIG64_FLAGS_IOPORT_TRA_VALID (1 << 9)
struct dig64_acpi_spec {
uint8_t type;
uint8_t resv;
uint16_t length;
uint32_t uid;
uint32_t hid;
uint32_t acpi_gsi;
uint64_t mmio_tra;
uint64_t ioport_tra;
uint16_t flags;
} __packed;
struct dig64_pci_spec {
uint8_t type;
uint8_t resv;
uint16_t length;
uint8_t sgn;
uint8_t bus;
uint8_t device;
uint8_t function;
uint16_t device_id;
uint16_t vendor_id;
uint32_t acpi_gsi;
uint64_t mmio_tra;
uint64_t ioport_tra;
uint16_t flags;
} __packed;
struct dig64_pcdp_entry {
uint8_t type;
uint8_t primary;
uint16_t length;
uint16_t index;
#define DIG64_PCDP_CONOUTDEV 0
#define DIG64_PCDP_NOT_VALID 1
#define DIG64_PCDP_CONOUTDEV2 2
#define DIG64_PCDP_CONINDEV 3
union {
uint8_t type;
#define DIG64_PCDP_SPEC_ACPI 0
struct dig64_acpi_spec acpi;
#define DIG64_PCDP_SPEC_PCI 1
struct dig64_pci_spec pci;
} specs;
} __packed;
struct dig64_hcdp_table {
char signature[4];
#define HCDP_SIGNATURE "HCDP"
uint32_t length;
uint8_t revision;
uint8_t checksum;
char oem_id[6];
char oem_tbl_id[8];
uint32_t oem_rev;
char creator_id[4];
uint32_t creator_rev;
uint32_t entries;
union dev_desc {
uint8_t type;
#define DIG64_ENTRYTYPE_TYPE0 0
#define DIG64_ENTRYTYPE_TYPE1 1
#define DIG64_ENTRYTYPE_BIDIRECT (0<<0)
#define DIG64_ENTRYTYPE_DEBUGPORT (1<<0)
#define DIG64_ENTRYTYPE_OUTONLY (2<<0)
#define DIG64_ENTRYTYPE_INONLY (3<<0)
#define DIG64_ENTRYTYPE_UART (0<<3)
#define DIG64_ENTRYTYPE_VGA (1<<3)
#define DIG64_ENTRYTYPE_VENDOR (1<<7)
struct dig64_hcdp_entry uart;
struct dig64_pcdp_entry pcdp;
} entry[0];
};
#endif