#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: c_jazz_eisa.c,v 1.14 2012/10/13 17:58:53 jdc Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kcore.h>
#include <sys/device.h>
#include <machine/autoconf.h>
#include <sys/bus.h>
#include <machine/pio.h>
#include <machine/platform.h>
#include <dev/clock_subr.h>
#include <dev/ic/mc146818var.h>
#include <arc/arc/arcbios.h>
#include <arc/jazz/pica.h>
#include <arc/jazz/jazziovar.h>
#include <arc/jazz/mcclock_jazziovar.h>
#include "pc.h"
#if NPC_JAZZIO > 0
#include <arc/jazz/pccons_jazziovar.h>
#endif
#include "vga_isa.h"
#if NVGA_ISA > 0
#include <dev/isa/vga_isavar.h>
#endif
#include "vga_jazzio.h"
#if NVGA_JAZZIO > 0
#include <arc/jazz/vga_jazziovar.h>
#endif
#include "rasdisplay_jazzio.h"
#if NRASDISPLAY_JAZZIO > 0
#include <arc/jazz/rasdisplay_jazziovar.h>
#endif
#include "pckbc_jazzio.h"
#if NPCKBC_JAZZIO > 0
#include <arc/jazz/pckbc_jazzioreg.h>
#include <dev/ic/pckbcvar.h>
#endif
#include "com.h"
#if NCOM > 0
#include <sys/termios.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#endif
const char *c_jazz_eisa_mainbusdevs[] = {
"jazzio",
"jazzisabr",
NULL,
};
static u_int mc_jazz_eisa_read(struct mc146818_softc *, u_int);
static void mc_jazz_eisa_write(struct mc146818_softc *, u_int, u_int);
struct mcclock_jazzio_config mcclock_jazz_eisa_conf = {
0x80004000,
1,
mc_jazz_eisa_read,
mc_jazz_eisa_write
};
static u_int
mc_jazz_eisa_read(struct mc146818_softc *sc, u_int reg)
{
u_int i, as;
as = in32(arc_bus_io.bs_vbase + C_JAZZ_EISA_TODCLOCK_AS) & 0x80;
out32(arc_bus_io.bs_vbase + C_JAZZ_EISA_TODCLOCK_AS, as | reg);
i = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 0);
return i;
}
static void
mc_jazz_eisa_write(struct mc146818_softc *sc, u_int reg, u_int datum)
{
u_int as;
as = in32(arc_bus_io.bs_vbase + C_JAZZ_EISA_TODCLOCK_AS) & 0x80;
out32(arc_bus_io.bs_vbase + C_JAZZ_EISA_TODCLOCK_AS, as | reg);
bus_space_write_1(sc->sc_bst, sc->sc_bsh, 0, datum);
}
void
c_jazz_eisa_init(void)
{
mcclock_jazzio_conf = &mcclock_jazz_eisa_conf;
}
void
c_jazz_eisa_cons_init(void)
{
if (!com_console) {
#if NRASDISPLAY_JAZZIO > 0
if (rasdisplay_jazzio_cnattach(arc_displayc_id) == 0) {
#if NPCKBC_JAZZIO > 0
pckbc_cnattach(&jazzio_bus, PICA_SYS_KBD,
JAZZIO_KBCMDP, PCKBC_KBD_SLOT, 0);
#endif
return;
}
#endif
#if NVGA_JAZZIO > 0
if (vga_jazzio_cnattach(arc_displayc_id) == 0) {
#if NPCKBC_JAZZIO > 0
pckbc_cnattach(&jazzio_bus, PICA_SYS_KBD,
JAZZIO_KBCMDP, PCKBC_KBD_SLOT, 0);
#endif
return;
}
#endif
#if NVGA_ISA > 0
if (strcmp(arc_displayc_id, "necvdfrb") == 0
) {
if (vga_isa_cnattach(&arc_bus_io, &arc_bus_mem) == 0) {
#if NPCKBC_JAZZIO > 0
pckbc_cnattach(&jazzio_bus, PICA_SYS_KBD,
JAZZIO_KBCMDP, PCKBC_KBD_SLOT, 0);
#endif
return;
}
}
#endif
#if NPC_JAZZIO > 0
if (pccons_jazzio_cnattach(arc_displayc_id, &jazzio_bus) == 0)
return;
#endif
printf("jazz: display controller [%s] is not configured\n",
arc_displayc_id);
}
#if NCOM > 0
if (com_console_address == 0) {
com_console_address = jazzio_bus.bs_start + 0x6000;
}
comcnattach(&jazzio_bus, com_console_address,
com_console_speed, com_freq, COM_TYPE_NORMAL, com_console_mode);
#endif
}