#ifndef _SDMMC_CHIP_H_
#define _SDMMC_CHIP_H_
#include <sys/device.h>
#include <sys/bus.h>
struct sdmmc_command;
typedef struct sdmmc_chip_functions *sdmmc_chipset_tag_t;
typedef struct sdmmc_spi_chip_functions *sdmmc_spi_chipset_tag_t;
typedef void *sdmmc_chipset_handle_t;
struct sdmmc_chip_functions {
int (*host_reset)(sdmmc_chipset_handle_t);
uint32_t (*host_ocr)(sdmmc_chipset_handle_t);
int (*host_maxblklen)(sdmmc_chipset_handle_t);
int (*card_detect)(sdmmc_chipset_handle_t);
int (*write_protect)(sdmmc_chipset_handle_t);
int (*bus_power)(sdmmc_chipset_handle_t, uint32_t);
int (*bus_clock)(sdmmc_chipset_handle_t, int);
int (*bus_width)(sdmmc_chipset_handle_t, int);
int (*bus_rod)(sdmmc_chipset_handle_t, int);
void (*exec_command)(sdmmc_chipset_handle_t,
struct sdmmc_command *);
void (*card_enable_intr)(sdmmc_chipset_handle_t, int);
void (*card_intr_ack)(sdmmc_chipset_handle_t);
int (*signal_voltage)(sdmmc_chipset_handle_t, int);
int (*bus_clock_ddr)(sdmmc_chipset_handle_t, int, bool);
int (*execute_tuning)(sdmmc_chipset_handle_t, int);
void (*hw_reset)(sdmmc_chipset_handle_t);
};
#define sdmmc_chip_host_reset(tag, handle) \
((tag)->host_reset((handle)))
#define sdmmc_chip_host_ocr(tag, handle) \
((tag)->host_ocr((handle)))
#define sdmmc_chip_host_maxblklen(tag, handle) \
((tag)->host_maxblklen((handle)))
#define sdmmc_chip_card_detect(tag, handle) \
((tag)->card_detect((handle)))
#define sdmmc_chip_write_protect(tag, handle) \
((tag)->write_protect((handle)))
#define sdmmc_chip_bus_power(tag, handle, ocr) \
((tag)->bus_power((handle), (ocr)))
#define sdmmc_chip_bus_clock(tag, handle, freq, ddr) \
((tag)->bus_clock_ddr ? (tag)->bus_clock_ddr((handle), (freq), (ddr)) : ((ddr) ? EINVAL : ((tag)->bus_clock((handle), (freq)))))
#define sdmmc_chip_bus_width(tag, handle, width) \
((tag)->bus_width((handle), (width)))
#define sdmmc_chip_bus_rod(tag, handle, width) \
((tag)->bus_rod((handle), (width)))
#define sdmmc_chip_exec_command(tag, handle, cmdp) \
((tag)->exec_command((handle), (cmdp)))
#define sdmmc_chip_card_enable_intr(tag, handle, enable) \
((tag)->card_enable_intr((handle), (enable)))
#define sdmmc_chip_card_intr_ack(tag, handle) \
((tag)->card_intr_ack((handle)))
#define sdmmc_chip_signal_voltage(tag, handle, voltage) \
((tag)->signal_voltage ? (tag)->signal_voltage((handle), (voltage)) : EINVAL)
#define sdmmc_chip_execute_tuning(tag, handle, timing) \
((tag)->execute_tuning ? (tag)->execute_tuning((handle), (timing)) : EINVAL)
#define sdmmc_chip_hw_reset(tag, handle) \
((tag)->hw_reset ? (tag)->hw_reset((handle)) : 0)
#define SDMMC_SDCLK_OFF 0
#define SDMMC_SDCLK_400K 400
#define SDMMC_SIGNAL_VOLTAGE_330 0
#define SDMMC_SIGNAL_VOLTAGE_180 1
#define SDMMC_TIMING_UHS_SDR50 0
#define SDMMC_TIMING_UHS_SDR104 1
#define SDMMC_TIMING_MMC_HS200 2
struct sdmmc_spi_chip_functions {
void (*initialize)(sdmmc_chipset_handle_t);
};
#define sdmmc_spi_chip_initialize(tag, handle) \
((tag)->initialize((handle)))
struct sdmmcbus_attach_args {
const char *saa_busname;
sdmmc_chipset_tag_t saa_sct;
sdmmc_spi_chipset_tag_t saa_spi_sct;
sdmmc_chipset_handle_t saa_sch;
bus_dma_tag_t saa_dmat;
u_int saa_clkmin;
u_int saa_clkmax;
uint32_t saa_caps;
uint32_t saa_max_seg;
bus_addr_t saa_dma_align_mask;
};
void sdmmc_needs_discover(device_t);
void sdmmc_card_intr(device_t);
void sdmmc_delay(u_int);
#endif