#define _SUN3X_ XXX
#include <sys/param.h>
#include <machine/mon.h>
#include <stand.h>
#include "libsa.h"
#include "dvma.h"
#include "saio.h"
#include <arch/sun3/include/pte3x.h>
#include <arch/sun3/sun3x/iommu.h>
#include <arch/sun3/sun3x/vme.h>
#define MON_LOMEM_BASE 0
#define MON_LOMEM_SIZE 0x400000
#define MON_LOMEM_END (MON_LOMEM_BASE+MON_LOMEM_SIZE)
#define MON_KDB_BASE SUN3X_MON_KDB_BASE
#define MON_KDB_SIZE SUN3X_MON_KDB_SIZE
#define MON_KDB_END (MON_KDB_BASE+MON_KDB_SIZE)
#define MON_DVMA_BASE SUN3X_MON_DVMA_BASE
#define MON_DVMA_SIZE SUN3X_MON_DVMA_SIZE
static void mmu_atc_flush(vaddr_t);
static void set_iommupte(vaddr_t, paddr_t);
#ifdef DEBUG_PROM
static u_int sun3x_get_pte(vaddr_t);
#endif
static void sun3x_set_pte(vaddr_t, paddr_t);
static void dvma3x_init(void);
static char * dvma3x_alloc(int);
static void dvma3x_free(char *, int);
static char * dvma3x_mapin(char *, int);
static void dvma3x_mapout(char *, int);
static char * dev3x_mapin(int, u_long, int);
struct mapinfo {
int maptype;
u_int base;
u_int mask;
};
struct mapinfo
sun3x_mapinfo[MAP__NTYPES] = {
{ MAP_MAINMEM, 0, ~0 },
{ MAP_OBIO, 0, ~0 },
{ MAP_MBMEM, VME24D16_BASE, VME24_MASK },
{ MAP_MBIO, VME16D16_BASE, VME16_MASK },
{ MAP_VME16A16D, VME16D16_BASE, VME16_MASK },
{ MAP_VME16A32D, VME16D32_BASE, VME16_MASK },
{ MAP_VME24A16D, VME24D16_BASE, VME24_MASK },
{ MAP_VME24A32D, VME24D32_BASE, VME24_MASK },
{ MAP_VME32A16D, VME32D16_BASE, VME32_MASK },
{ MAP_VME32A32D, VME32D32_BASE, VME32_MASK },
};
u_int sun3x_devmap = MON_KDB_BASE;
static char *
dev3x_mapin(int maptype, u_long physaddr, int length)
{
u_int i, pa, pte, pgva, va;
if ((sun3x_devmap + length) > (MON_KDB_BASE + MON_KDB_SIZE))
panic("dev3x_mapin: length=%d", length);
for (i = 0; i < MAP__NTYPES; i++)
if (sun3x_mapinfo[i].maptype == maptype)
goto found;
panic("dev3x_mapin: bad maptype");
found:
if (physaddr & ~(sun3x_mapinfo[i].mask))
panic("dev3x_mapin: bad address");
pa = sun3x_mapinfo[i].base + physaddr;
pte = pa | MMU_DT_PAGE | MMU_SHORT_PTE_CI;
va = pgva = sun3x_devmap;
do {
sun3x_set_pte(pgva, pte);
pgva += NBPG;
pte += NBPG;
length -= NBPG;
} while (length > 0);
sun3x_devmap = pgva;
va += (physaddr & PGOFSET);
#ifdef DEBUG_PROM
if (debug)
printf("dev3x_mapin: va=0x%x pte=0x%x\n",
va, sun3x_get_pte(va));
#endif
return ((char*)va);
}
#define SA_MIN_VA 0x200000
#define SA_MAX_VA (SA_MIN_VA + MON_DVMA_SIZE - (8 * NBPG))
#define MON_DVMA_MAPLEN (MON_DVMA_SIZE - NBPG)
u_int dvma3x_end = MON_DVMA_BASE + MON_DVMA_MAPLEN;
static void
dvma3x_init(void)
{
u_int va, pa;
pa = SA_MIN_VA;
va = MON_DVMA_BASE;
while (pa < SA_MAX_VA) {
sun3x_set_pte(va, pa | MMU_DT_PAGE | MMU_SHORT_PTE_CI);
set_iommupte(va, pa | IOMMU_PDE_DT_VALID | IOMMU_PDE_CI);
va += NBPG;
pa += NBPG;
}
}
char *
dvma3x_mapin(char *addr, int len)
{
int va = (int)addr;
if ((va < SA_MIN_VA) || (va >= SA_MAX_VA))
panic("dvma3x_mapin");
va -= SA_MIN_VA;
va += MON_DVMA_BASE;
return ((char *) va);
}
static void
dvma3x_mapout(char *addr, int len)
{
int va = (int)addr;
if ((va < MON_DVMA_BASE) ||
(va >= (MON_DVMA_BASE + MON_DVMA_MAPLEN)))
panic("dvma3x_mapout");
}
static char *
dvma3x_alloc(int len)
{
len = m68k_round_page(len);
dvma3x_end -= len;
return((char *)dvma3x_end);
}
static void
dvma3x_free(char *dvma, int len)
{
}
#ifdef DEBUG_PROM
static u_int
sun3x_get_pte(vaddr_t va)
{
u_int pn;
mmu_short_pte_t *tbl;
if (va >= MON_LOMEM_BASE && va < MON_LOMEM_END) {
tbl = (mmu_short_pte_t *) *romVectorPtr->lomemptaddr;
} else if (va >= MON_KDB_BASE && va < MON_KDB_END) {
va -= MON_KDB_BASE;
tbl = (mmu_short_pte_t *) *romVectorPtr->monptaddr;
} else if (va >= MON_DVMA_BASE) {
va -= MON_DVMA_BASE;
tbl = (mmu_short_pte_t *) *romVectorPtr->shadowpteaddr;
} else {
return 0;
}
pn = (va >> MMU_PAGE_SHIFT);
return tbl[pn].attr.raw;
}
#endif
static void
sun3x_set_pte(vaddr_t va, paddr_t pa)
{
u_int pn;
mmu_short_pte_t *tbl;
if (va >= MON_LOMEM_BASE && va < (MON_LOMEM_BASE + MON_LOMEM_SIZE)) {
tbl = (mmu_short_pte_t *) *romVectorPtr->lomemptaddr;
} else if (va >= MON_KDB_BASE && va < (MON_KDB_BASE + MON_KDB_SIZE)) {
va -= MON_KDB_BASE;
tbl = (mmu_short_pte_t *) *romVectorPtr->monptaddr;
} else if (va >= MON_DVMA_BASE) {
va -= MON_DVMA_BASE;
tbl = (mmu_short_pte_t *) *romVectorPtr->shadowpteaddr;
} else {
return;
}
pn = (va >> MMU_PAGE_SHIFT);
tbl[pn].attr.raw = pa;
mmu_atc_flush(va);
}
static void
mmu_atc_flush(vaddr_t va)
{
__asm volatile ("pflush #0,#0,%0@" : : "a" (va));
}
static void
set_iommupte(vaddr_t va, paddr_t pa)
{
iommu_pde_t *iommu_va;
int pn;
iommu_va = (iommu_pde_t *) *romVectorPtr->dvmaptaddr;
va -= MON_DVMA_BASE;
pn = IOMMU_BTOP(va);
iommu_va[pn].addr.raw = pa;
}
void
sun3x_init(void)
{
dev_mapin_p = dev3x_mapin;
dvma_alloc_p = dvma3x_alloc;
dvma_free_p = dvma3x_free;
dvma_mapin_p = dvma3x_mapin;
dvma_mapout_p = dvma3x_mapout;
dvma3x_init();
}