/* $NetBSD: cia_pci.c,v 1.36 2021/09/11 21:30:46 andvar Exp $ */

/*
 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

#include <sys/cdefs.h>                  /* RCS ID & Copyright macro defns */

__KERNEL_RCSID(0, "$NetBSD: cia_pci.c,v 1.36 2021/09/11 21:30:46 andvar Exp $");

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>

#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <alpha/pci/ciareg.h>
#include <alpha/pci/ciavar.h>

static pcireg_t cia_conf_read(void *, pcitag_t, int);
static void     cia_conf_write(void *, pcitag_t, int, pcireg_t);

void
cia_pci_init(pci_chipset_tag_t pc, void *v)
{

        pc->pc_conf_v = v;
        pc->pc_conf_read = cia_conf_read;
        pc->pc_conf_write = cia_conf_write;
}

static pcireg_t
cia_conf_read(void *cpv, pcitag_t tag, int offset)
{
        struct cia_config *ccp = cpv;
        pcireg_t *datap, data;
        int s, secondary, ba;
        uint32_t old_cfg, errbits;

        if ((unsigned int)offset >= PCI_CONF_SIZE)
                return (pcireg_t) -1;

#ifdef __GNUC__
        s = 0;                                  /* XXX gcc -Wuninitialized */
        old_cfg = 0;                            /* XXX gcc -Wuninitialized */
#endif

        /*
         * Some (apparently-common) revisions of EB164 and AlphaStation
         * firmware do the Wrong thing with PCI master and target aborts,
         * which are caused by accessing the configuration space of devices
         * that don't exist (for example).
         *
         * To work around this, we clear the CIA error register's PCI
         * master and target abort bits before touching PCI configuration
         * space and check it afterwards.  If it indicates a master or target
         * abort, the device wasn't there so we return 0xffffffff.
         */
        REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
        alpha_mb();
        alpha_pal_draina();     

        /* secondary if bus # != 0 */
        pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
        if (secondary) {
                s = splhigh();
                old_cfg = REGVAL(CIA_CSR_CFG);
                alpha_mb();
                REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
                alpha_mb();
        }

        /*
         * We just inline the BWX support, since this is the only
         * difference between BWX and swiz for config space.
         */
        if (ccp->cc_flags & CCF_PCI_USE_BWX) {
                if (secondary) {
                        datap =
                            (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
                                tag | (offset & ~0x03));
                } else {
                        datap =
                            (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
                                tag | (offset & ~0x03));
                }
        } else {
                datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
                    tag << 5UL |                                /* XXX */
                    (offset & ~0x03) << 5 |                     /* XXX */
                    0 << 5 |                                    /* XXX */
                    0x3 << 3);                                  /* XXX */
        }
        data = (pcireg_t)-1;
        alpha_mb();
        if (!(ba = badaddr(datap, sizeof *datap)))
                data = *datap;
        alpha_mb();
        alpha_mb();

        if (secondary) {
                alpha_mb();
                REGVAL(CIA_CSR_CFG) = old_cfg;
                alpha_mb();
                splx(s);
        }

        alpha_pal_draina();     
        alpha_mb();
        errbits = REGVAL(CIA_CSR_CIA_ERR);
        if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
                ba = 1;
                data = 0xffffffff;
        }

        if (errbits) {
                REGVAL(CIA_CSR_CIA_ERR) = errbits;
                alpha_mb();
                alpha_pal_draina();
        }

#if 0
        printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
            data, datap, ba ? " (badaddr)" : "");
#endif

        return data;
}

static void
cia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
{
        struct cia_config *ccp = cpv;
        pcireg_t *datap;
        int s, secondary;
        uint32_t old_cfg;

        if ((unsigned int)offset >= PCI_CONF_SIZE)
                return;

#ifdef __GNUC__
        s = 0;                                  /* XXX gcc -Wuninitialized */
        old_cfg = 0;                            /* XXX gcc -Wuninitialized */
#endif

        /* secondary if bus # != 0 */
        pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
        if (secondary) {
                s = splhigh();
                old_cfg = REGVAL(CIA_CSR_CFG);
                alpha_mb();
                REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
                alpha_mb();
        }

        /*
         * We just inline the BWX support, since this is the only
         * difference between BWX and swiz for config space.
         */
        if (ccp->cc_flags & CCF_PCI_USE_BWX) {
                if (secondary) {
                        datap =
                            (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
                                tag | (offset & ~0x03));
                } else {
                        datap =
                            (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
                                tag | (offset & ~0x03));
                }
        } else {
                datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
                    tag << 5UL |                                /* XXX */
                    (offset & ~0x03) << 5 |                     /* XXX */
                    0 << 5 |                                    /* XXX */
                    0x3 << 3);                                  /* XXX */
        }
        alpha_mb();
        *datap = data;
        alpha_mb();
        alpha_mb();

        if (secondary) {
                alpha_mb();
                REGVAL(CIA_CSR_CFG) = old_cfg;
                alpha_mb();
                splx(s);
        }

#if 0
        printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
            reg, data, datap);
#endif
}