MPIDR_U
if ((mpidr & (MPIDR_MP|MPIDR_U)) == MPIDR_MP) {
arm_has_mpext_p = (armreg_mpidr_read() & (MPIDR_MP|MPIDR_U)) == MPIDR_MP;
if (mpidr == 0 || (mpidr & MPIDR_U))
if (mpidr == 0 || (mpidr & MPIDR_U))
if (mpidr == 0 || (mpidr & MPIDR_U))
if (mpidr == 0 || (mpidr & MPIDR_U))
is_hardclock = (mpidr & MPIDR_U) == 0; /* Use private timer for SMP */
is_hardclock = (mpidr & MPIDR_U) != 0; /* Global timer for UP */
#define CORTEXA9_MPIDR_U MPIDR_U
#define PJ4B_MPIDR_U MPIDR_U
if ((mpidr & MPIDR_U) == 0)