sys/arch/arc/isa/isabus.c

445

cf->sr &= ~MIPS_SR_INT_IE;

sys/arch/evbmips/cavium/autoconf.c

69

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/evbmips/evbmips/interrupt.c

110

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/evbmips/evbmips/interrupt.c

61

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/evbmips/evbmips/interrupt.c

66

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/evbmips/evbmips/interrupt.c

68

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/mips/cavium/octeon_cpunode.c

242

KASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/mips/cavium/octeon_intr.c

484

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/mips/cavium/octeon_intr.c

527

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/mips/cavium/octeon_intr.c

531

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/mips/include/asm.h

800

ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \

sys/arch/mips/include/psl.h

48

#define MIPS3_PSL_LOWIPL (MIPS3_INT_MASK | MIPS_SR_INT_IE)

sys/arch/mips/include/psl.h

59

MIPS_SR_INT_IE | \

sys/arch/mips/include/psl.h

69

#define MIPS1_PSL_LOWIPL (MIPS_INT_MASK | MIPS_SR_INT_IE)

sys/arch/mips/mips/cache_r5k.c

232

mips_cp0_status_write(ostatus & ~MIPS_SR_INT_IE);

sys/arch/mips/mips/cache_r5k.c

252

mips_cp0_status_write(ostatus & ~MIPS_SR_INT_IE);

sys/arch/mips/mips/cache_r5k.c

302

mips_cp0_status_write(ostatus & ~MIPS_SR_INT_IE);

sys/arch/mips/mips/cache_r5k.c

322

mips_cp0_status_write(ostatus & ~MIPS_SR_INT_IE);

sys/arch/mips/mips/cache_r5k.c

358

mips_cp0_status_write(ostatus & ~MIPS_SR_INT_IE);

sys/arch/mips/mips/cache_r5k.c

378

mips_cp0_status_write(ostatus & ~MIPS_SR_INT_IE);

sys/arch/mips/mips/cache_r5k.c

440

mips_cp0_status_write(ostatus & ~MIPS_SR_INT_IE);

sys/arch/mips/mips/cpu_subr.c

967

KASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/mips/mips/mips_fpu.c

115

: "r"(tf->tf_regs[_R_SR] & (MIPS_SR_COP_1_BIT|MIPS3_SR_FR|MIPS_SR_KX|MIPS_SR_INT_IE)),

sys/arch/mips/mips/mips_fpu.c

246

: "r"(tf->tf_regs[_R_SR] & (MIPS_SR_COP_1_BIT|MIPS3_SR_FR|MIPS_SR_KX|MIPS_SR_INT_IE)), "n"(MIPS_COP_0_STATUS));

sys/arch/mips/mips/mips_machdep.c

2149

pcb->pcb_context.val[_L_SR] = MIPS_SR_INT_IE

sys/arch/mips/mips/mips_machdep.c

2378

KASSERT((status & MIPS_SR_INT_IE) == 0);

sys/arch/mips/mips/mips_softint.c

116

KDASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);

sys/arch/mips/mips/vm_machdep.c

155

KASSERTMSG(pcb2->pcb_context.val[_L_SR] & MIPS_SR_INT_IE,